TW200843070A - Flexible substrate and semiconductor device - Google Patents

Abstract

To provide a flexible board improved in a discharge effect of bubbles from inside to outside of a semiconductor chip mount region, and also to provide a semiconductor device having the flexible board. The flexible board 101 comprises: a base material 100 having the semiconductor chip mount region 103 on one surface; a plurality of inner leads 106 formed on that surface; and jumper wiring 111 connected to two of the plurality of inner leads 106. A first wiring section 121 in the jumper wiring 111 crosses the semiconductor chip mount region 103, thus improving a discharge effect of bubbles from inside to outside of the semiconductor chip mount region 103.

Description

200843070 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a flexible substrate and a semiconductor device. [Prior Art] Fig. 7 is a schematic view of a conventional COF (Chip 〇n Film) type semiconductor device viewed obliquely from above. The semiconductor device includes a flexible substrate 7 (H, and a semiconductor wafer 7〇4 mounted on the flexible substrate 701. The semiconductor wafer 704 is flip-chip bonded to the flexible substrate 701. Further, the semiconductor wafer 7 is A resin is usually filled between the crucible 4 and the flexible substrate 7〇1. Fig. 8 is a schematic view of a main part of the flexible substrate 8〇1 disclosed in Japanese Laid-Open Patent Publication No. Hei 2-237265. The flexible substrate 801 includes a substrate 800 having a semiconductor wafer mounting region 803 on one surface thereof. A semiconductor wafer (not shown) is mounted on the semiconductor wafer mounting region 803. More specifically, the semiconductor wafer The bump electrode is connected to the inner lead 8〇6 by thermocompression bonding using an ACF (anisotropic conductive film: Anis〇tr〇pic c〇nductive Fiim) (not shown) as the middle w'. The inner lead 806 is The opening 813 of the solder resist layer 812 is exposed and enters the semiconductor wafer mounting region 803. j The semiconductor wafer mounting region 803 is formed with a guide groove 814 for guiding air bubbles generated during ACF heating and pressure bonding. guide The discharge port 815 is discharged to the outside of the semiconductor wafer mounting region 8〇3. 127707.doc 200843070 Since the inside of the bubble traps moisture and impurities in the inside of the bubble, the cause of the malfunction is caused, so that it is necessary to discharge the bubble to the outside of the semiconductor wafer mounting region 8〇3. Fig. 9 is a schematic view of a main part of a flexible substrate 901 disclosed in Japanese Laid-Open Patent Publication No. Hei. No. Hei. No. Hei. No. 6642. The flexible substrate 901 includes a jumper 9 11 formed in a semiconductor wafer mounting region 903. In the semiconductor wafer mounting region 903, an LSI (large-scale integrated circuit) f-wafer component is mounted on the semiconductor resin by the adhesive resin. The wafer component is heated by the adhesive resin to the semiconductor wafer mounting region 903. Since the jumper 911 is formed in the semiconductor wafer mounting region 9A3, the fluidity of the adhesive resin is improved. The jumper 911 includes a linear trunk portion 921 and a straight line connected to the end of the trunk wiring portion 921. The shape wiring portion 922 is similar to the linear wiring portion that is connected to the other end of the trunk wiring portion 921. The line portion 921 is formed to extend along the longitudinal direction of the lower surface of the rectangular shape of the wafer component, that is, in the horizontal direction in Fig. 9. The direction in which the branch wiring portions 922 and 923 extend is set to be relative to the main cloth. The extension direction of the line 21 is ". Further, the branch wiring portions 922, 923 攸 the main wiring portion 921 extends and is wired to the inner lead 906. Here, the above angle α is 135 ± 15. The inner lead 906 is resistant to soldering. The opening 913 of the layer 912 is exposed and enters the semiconductor wafer mounting region 9〇3. A bump electrode of the wafer is connected to the inner lead_. 7 As in the flexible substrate 9〇1 described above, the adhesive tree 127707.doc 200843070 il is well-grounded by the jumper 911 to prevent air bubbles from remaining between the flexible substrate 9A and the wafer zero. 7 However, the above flexible substrates 801 and 910 have the following problems. In the flexible substrate 801, the guide grooves 814 are spaced apart from each other, and are narrower at the peripheral portion than the central portion of the semiconductor day-and-slice mounting region 803. In other words, the space for guiding the bubble by the guide groove 814 is wide, but the discharge port 8 1 5 for discharging the bubble to the outside of the semiconductor wafer mounting region 8〇3 is narrow. Therefore, the flexible substrate 801 has a problem that air bubbles cannot be smoothly discharged from the discharge port 81 5 . On the other hand, in the above flexible substrate 901, an opening such as the discharge port 81 5 of the flexible substrate 8〇1 is not formed on the jumper wire 910. Further, since the connection portion between the bump electrode of the wafer component and the inner lead 9〇6 is dense due to the narrow pitch, air bubbles are discharged from the connection portion to each other outside the semiconductor wafer mounting region 9〇3. Essentially difficult. Therefore, since the air bubbles are trapped in the semiconductor wafer mounting region 9A3, there is a problem that the air bubbles cannot be discharged outside the semiconductor wafer mounting region 903. In other words, both of the flexible substrates 801 and 901 have a problem that the discharge effect of the bubbles from the inside of the semiconductor wafer mounting region to the outside of the semiconductor wafer mounting region is low. SUMMARY OF THE INVENTION [Problems to be Solved by the Invention] 127707.doc 200843070 The purpose of the invention is to provide a flexible substrate and a device for cutting the same, and the flexible substrate for loading can improve the carrier of the bubble-rich conductor wafer. The discharge effect outside the semiconductor wafer mounting area in the area. [Technical means for solving the problem] It is characterized in that it solves the above problem; IP, too; ^β j砀 The flexible substrate of the present invention

1 a substrate having a semiconductor wafer mounting region on a surface thereof; a plurality of inner leads formed on the one surface of the substrate; and a wiring 'connected to the inner surface to slow down < m V丨 deep, know the teeth + conductor wafer mounting area. According to the flexible substrate having the above configuration, since the wiring traverses the semiconductor B-chip mounting region, the air bubbles in the semiconductor wafer mounting region can be smoothly guided to the outside of the semiconductor wafer mounting region by the wiring. Therefore, it is possible to enhance the discharge effect of the bubbles from the inside of the semiconductor wafer mounting region to the outside of the semiconductor wafer mounting region. Further, since the wiring traverses the semiconductor wafer mounting region, no loop is formed in the semiconductor wafer mounting region. Therefore, the above-mentioned wiring can prevent the air bubbles from being trapped in the semiconductor wafer mounting region. Further, since the above wiring is wired to the inner lead, the wiring can have the potential of the inner lead. In the flexible substrate of the Bayesian type, the line ι' of the above-mentioned 127707.doc 200843070 I i wired to the above wiring is different from the line width of the above-mentioned inner lead which is not wired to the above wiring. According to the flexible substrate of the above-described embodiment, when the line width of the inner lead wired to the wiring is wider than the line of the inner lead not wired to the wiring, for example, even if the semiconductor wafer is connected to the wiring The electrode that processes the maximum current in the electrode also prevents burnout when current is applied to the wiring.

U Therefore, the reliability of the semiconductor device including the above flexible substrate and semiconductor wafer can be ensured. In the flexible substrate of the embodiment, the pattern protection film is formed on the one surface of the substrate; and at least a part of the portion other than the semiconductor wafer mounting region of the wiring and the wiring is not included in the pattern. The protective film is covered and exposed. According to the flexible substrate of the above-described embodiment, for example, when the electrode of the semiconductor wafer is connected to the wiring, at least one of the portions other than the mounting area of the r- 1 to T-days on the wiring is provided. The above-mentioned pattern protective film is not "out of the way", so that at least a part of the heat of the semiconductor wafer can be released to prevent the failure of the semiconductor wafer due to heat. In the embodiment, the flexibility is also

The wiring in the substrate is a metal foil having a thickness of U μ-inclusive and a line width of 6 to 3 μm. A semiconductor device of the present invention includes: a flexible substrate of the present invention; and a conductor wafer mounted on the flexible substrate. Half of the body piece mounting region 127707.doc 200843070 The semiconductor device having the above configuration has the above-described flexible base $', thereby preventing semiconductor wafer failure due to air bubbles and improving the sinfulness. More specifically, when a resin is filled between the flexible substrate and the semiconductor wafer, for example, since the wiring of the flexible substrate traverses the semiconductor wafer mounting region, the wiring can be used in the semiconductor wafer mounting region. The tree month is smoothly guided to the outside of the semiconductor wafer mounting area. Therefore, the air bubbles which prevent the cause of the trouble remain between the above-mentioned flexible substrate and the semiconductor wafer, thereby improving the reliability. Further, since it is not necessary to make a special material or device for preventing the above-mentioned air bubbles from remaining, it is possible to prevent an increase in the manufacturing cost of the semiconductor device. In the semiconductor device of the embodiment, a plurality of bump electrodes are formed on a surface of the semiconductor wafer on the side of the flexible substrate; and a surface of the semiconductor wafer on the side of the flexible substrate is a rectangular shape; A portion other than the short side of the surface of the semiconductor wafer on the side of the flexible substrate. According to the semiconductor device of the above-described embodiment, since the bump electrode is formed on the semiconductor wafer < the flexible substrate side < the vicinity of the short side of the surface, the surface of the semiconductor wafer can be formed from the surface of the flexible substrate side. Air bubbles are discharged near the short side. Further, by forming the bump electrodes in the vicinity of the long side of the surface of the flexible substrate side of the semiconductor wafer, the number of the bump electrodes can be increased. In a semiconductor device according to one embodiment, a plurality of bump electrodes are formed on a surface of the semiconductor wafer on the flexible substrate side; and a potential of the bump electrode connected to the wiring is grounded Potential. According to the semiconductor device of the above-described embodiment, since the potential of the bump electrode connected to the wiring is at the ground potential, the electrical characteristics can be stabilized, and the effect of improving the quality can be obtained. In the semiconductor device of the embodiment, a plurality of bump electrodes are formed on a surface of the semiconductor wafer on the side of the flexible substrate; and the current of the bump electrode connected to the wiring is processed to be external to the semiconductor wafer Output current. According to the semiconductor device of the above-described embodiment, since the current supplied to the current-based semiconductor wafer processed by the bump electrode of the wiring is externally outputted, the above-described wiring can be taken out by the wiring inside the wiring. According to the flexible substrate of the present invention, the gas in the semiconductor wafer mounting region can be smoothly guided by the wiring across the semiconductor wafer mounting region ′ to the outside of the semiconductor wafer mounting region, so that the air bubbles can be mounted from the semiconductor wafer. The discharge effect in the area outside the semiconductor wafer mounting area. According to the semi-conducting time of the present invention, because of the (4) domain's sustainability base, it is possible to prevent semiconductor wafer failure due to bubbles, and to mention it; 127707.doc 200843070 [Embodiment] FIG. 1 is a schematic view of a principal part of a flexible substrate 1 j according to a first embodiment of the present invention as seen from above. As shown in FIG. 1 and FIG. 2, the flexible substrate 1A1 includes a substrate 100 having a semiconductor wafer mounting region 103 having a rectangular shape in plan view; Leads 1〇6, which are formed on one of the above surfaces: and jumper wires 1i, which are connected to two of the plurality of inner leads 106. The above jumper 111 is an example of wiring. The substrate 100 is made of, for example, a polyimide film having a thickness of 40 μm. The jumper 111 includes the first wiring portion 121, the second wiring portion 122, the third wiring portion 123, the fourth wiring portion 124, and the fifth wiring portion 125. The first wiring portion 121 extends along the long side of the semiconductor wafer mounting region ι 3 to traverse the semiconductor wafer mounting region 丨〇3. In other words, the second wiring portion 121 is formed to extend over the semiconductor wafer mounting region 1〇3 and the region outside the semiconductor wafer mounting region 103. The second wiring unit described above! 2 2 extends along the short side of the semiconductor wafer mounting region i 〇 3 . One end of the second wiring portion 122 is connected to one end of the i-th wiring portion 121. The third wiring portion 123 extends along the short side of the semiconductor wafer mounting region 1〇3. One end of the third wiring portion 123 is connected to the other end of the second wiring portion 121. The fourth wiring portion 124 extends in parallel with respect to the first wiring portion 121 along the long side of the semiconductor wafer mounting region 1〇3. Further, similarly to the first wiring portion 121, the fourth wiring portion 127707.doc ^ 200843070 124 is formed over the semiconductor wafer mounting region 103 and the region outside the semiconductor wafer mounting region. One end of the fourth wiring portion 124 is connected to the other end of the second wiring portion 122. On the other hand, the other end of the fourth wiring portion 124 is connected to the top end of the inner lead 1?6. The line width of the inner lead 106 is substantially the same as the line width of the fourth wiring portion 124. The fifth wiring portion 125 extends in parallel with respect to the first wiring portion 121 along the long side of the semiconductor wafer mounting region 103 and f. Further, similarly to the first wiring portion 121, the fifth wiring portion 125 is formed to extend over the semiconductor wafer mounting region 103 and the region other than the semiconductor wafer mounting region 1A3. One end of the fifth wiring portion 125 is connected to the other end of the third wiring portion 123. On the other hand, the other end of the fifth wiring portion 125 is connected to the top end of the inner lead 1?6. The line width of the inner lead 106 is substantially the same as the line width of the fifth wiring portion 125. Further, the line widths of the first wiring portion 121, the second wiring portion 122, the third wiring portion L123, the fourth wiring portion 124, and the fifth wiring portion 125 are substantially the same. Further, the inner leads 106 connected to the other ends of the fourth and fifth wiring portions 124 and 125 are formed to be longer than the other inner leads ι 6 . Further, the distance between the first wiring portion 121 and the fourth wiring portion 124 is substantially the same as the distance between the first wiring portion 121 and the fifth wiring portion 125. Further, some of the portions other than the semiconductor wafer mounting region 1?3 of the jumper 111 are not covered by the solder resist layer 112 and are exposed. More specifically, in the semiconductor wafer mounting region 1〇3, one of the first wiring portions 127707.doc-13/200843070 121, one portion of the fourth wiring portion 124, and a portion of the fifth wiring portion 125 are not The solder resist layer 112 is covered and thus exposed. An example of the above-mentioned solder resist layer ι 2 is a pattern protective film. Further, at both end portions of the first wiring portion 121, all of the second and third wiring portions 122 and 123, and one end portions of the fourth and fifth wiring portions 124 and 125 are covered by the solder resist layer 112. Thereby, the reliability of the above jumper U1 can be improved. The inner lead 106 is formed to be located in the opening 113 of the solder resist layer m. Further, the pitch of formation of the inner leads 106, that is, the inner lead pitch p is set to 5 〇 μη in accordance with the pitch of formation of the bump electrodes 105 to be described later. Further, the inner leads 106 are spaced apart from each other, i.e., the inner lead gap 〇 is 25. Further, the line width W of the inner lead 106 is also 25 μm. The line width w of the inner lead gap G and the inner lead 丨06 is set in consideration of the balance of the risk, that is, the etching residue, the migration due to the etching residue, and the like, causing the inner leads 1 to 6 to approach each other. The risk is balanced with the risk caused by the thinning of the pattern of the inner lead 1〇6 and the reduction of the current capacity. Fig. 2 is a schematic view of a semiconductor device according to a third embodiment of the present invention as seen obliquely from above. 3 is an enlarged view of the semiconductor wafer mounting region 1〇3 of FIG. 2. In addition, in FIG. 3, in order to facilitate understanding, the resin 1 1 〇 is illustrated as a transparent material. As shown in FIG. 2 and FIG. 3, the semiconductor device includes a flexible substrate 101 and a semiconductor wafer 104 which is connected to the switchable substrate by flip chip connection and mounted on the semiconductor wafer mounting region 1. 〇3; and resin 11〇, which covers the opening 113 of the solder resist layer 112. 127707.doc -14· 200843070 A plurality of bump electrodes 105 are formed on the lower surface of the semiconductor wafer 104 (the surface of the flexible substrate 1〇1 side. More specifically, the lower surface of the semiconductor wafer 104 has a rectangular shape along the The lower side of the lower side is formed with a bump electrode 105. This simplifies the pattern of the wiring 102 to be described later in a straight line shape. In the plurality of bump electrodes 105, one side of the lower side of the semiconductor wafer 104 is long. The bump electrode 105 near the side is a side electrode, and the bump electrode 1〇5 near the long side of the other side of the semiconductor wafer 104 is an input side electrode. Further, no bump is formed near the short side of the lower surface of the semiconductor wafer 104. The electrode 105° is formed with a wiring 1〇2 on one surface (surface on the side of the semiconductor wafer 104) of one of the substrates 1 constituting the flexible substrate 1〇1, and covers most of the wiring 102. The solder resist layer 112 is formed. The wiring 102 is formed of a copper foil having a thickness of 8 μm, and the end portion of the wiring 102 on the side of the semiconductor wafer mounting region 1〇3 is formed as an inner lead 106. That is, the inner lead is formed. 1 The resin 110 is present around the semiconductor wafer 1〇4. The σ of the resin is divided into the gap s between the flexible substrate 101 and the semiconductor wafer 1 〇4. In the vicinity of the long side under the wafer 1〇4, the bump electrode 105 and the inner lead 106 are densely arranged in a line, so that the gap between the flexible substrate 1〇1 and the semiconductor wafer 1〇4 is substantially formed like a wall. In other words, there is no bump electrode 105 near the short side under the semiconductor wafer 1 〇4, and the first wiring portion ι21 of the jumper 1U extends along the long side of the semiconductor wafer 127707.doc -15-200843070 104 The semiconductor wafer mounting region 1〇3 is traversed, and protrudes from the inside of the semiconductor wafer mounting region 103 toward the semiconductor wafer mounting region 1〇3. Thus, no bump is formed in the vicinity of the short side under the semiconductor wafer 1〇4. The electrode 105 and the first wiring portion 12 of the jumper 1 are extended along the long side of the lower surface of the semiconductor wafer 104 to traverse the semiconductor wafer mounting region 1〇3, and the flexible substrate 1〇1 and the semiconductor can be used. The bubble of the gap S of the sheet 104 is discharged from the vicinity of the short side of the lower surface of the semiconductor wafer 104 to the outside of the semiconductor wafer mounting region 103. Therefore, the flexible substrate 101 is inwardly directed from the semiconductor wafer mounting region 1〇3 to the semiconductor wafer. In the semiconductor wafer mounting region 丨〇3, the jumper 111 is not formed in the semiconductor wafer mounting region 丨〇3, so that the air bubbles are prevented from being trapped in the semiconductor wafer mounting region 103. In the first embodiment, the second wiring portion 122 is formed at a position outside the opening U3 of the solder resist layer U2, but may be formed at a position inside the opening 113 of the solder resist layer 112. In other words, the second wiring portion 122 may not be covered with the solder resist layer 112. In the first embodiment, the third wiring portion 123 is formed at a position outside the opening 113 of the solder resist layer m, but may be formed at a position inside the opening 113 of the anti-fresh layer. In other words, the third wiring portion 123 may not be covered with the solder resist layer 112. In the first embodiment described above, the line width of the inner leads 1〇6 is rated as 25 pm, but may be other than the line width. Further, the thickness of the inner lead 106 is 127707.doc -16 - 200843070, which is 8 μπι, but may be a degree other than this. That is, in the above-described first embodiment, an inner lead formed of a metal case having a line width in the range of 1 to 50 μm and a line width in the range of 〜300 μη can be used. In the first embodiment described above, a jumper having a line width narrower than the line width of the inner lead 106 is also used. In the first embodiment described above, the motor may be distributed in the jumper iu or the current may not flow through the jumper.

(Second Embodiment) Fig. 4 is a schematic view of a main part of a semiconductor device according to a second embodiment of the present invention as seen from above. The same components as those of the constituent portions of the embodiment shown in Fig. 4 are denoted by the same reference numerals as those of the components of the schematic diagram, and the description thereof is omitted. X' is an illustration of the semiconductor wafer 204 included in the above semiconductor device in Fig. 4 . The semiconductor device includes a flexible substrate 2 and a semiconductor wafer 104 which are connected to the flexible substrate 2〇1 by a flip chip connection and are mounted on the semiconductor wafer mounting region 103. The flexible substrate 201 includes a jumper 211 including a first wiring portion 221, a second wiring portion 222, a third wiring portion 223, a fourth wiring portion 224, and a fifth wiring portion 225. Further, the jumper wire 211 is an example of wiring. The first wiring portion 221 extends across the long side of the semiconductor wafer mounting region 1A and traverses the semiconductor wafer mounting region 103. In other words, the first wiring portion 221' is formed across the semiconductor wafer mounting region 1A and the region outside the semiconductor wafer mounting region 103. The second wiring portion 2 2 2 extends along the short side of the semiconductor wafer mounting region 1 〇 3 by 127707.doc -17- 200843070. One end of the second wiring portion 222 is connected to one end of the first wiring portion 221 . The third wiring portion 223 extends along the short side of the semiconductor wafer mounting region 1 〇3. One end of the third wiring portion 223 is connected to the other end of the first wiring portion 221. The fourth wiring portion 224 extends in parallel with respect to the first wiring portion 221 along the long side of the semiconductor wafer mounting region 1〇3. Further, similarly to the i-th wiring portion 221, the fourth wiring portion 224 is formed across the semiconductor wafer mounting region 103 to a region outside the semiconductor wafer mounting region 103. One end of the wiring portion 2 2 4 of the above-described fourth wiring is connected to the other end of the second wiring portion 2 2 2 . On the other hand, the other end of the fourth wiring portion 224 is connected to the top end of the inner lead 206. The line width of the inner lead 206 is substantially the same as the line width of the fourth wiring portion 224, and is wider than the line width of the inner leads 1?6. The fifth wiring portion 225 extends in parallel with respect to the first wiring portion 221 along the long side of the semiconductor wafer mounting region 1〇3. Further, similarly to the first wiring portion 221, the fifth wiring portion 225 is formed to extend over the semiconductor wafer mounting region 103 and the region other than the semiconductor wafer mounting region 1A3. One end of the fifth wiring portion 225 is connected to the other end of the third wiring portion 223. On the other hand, the other end of the fifth wiring portion 225 is connected to the top end of the inner lead 206. The line width of the inner lead 206 is substantially the same as the line width of the fifth wiring portion 225 and is wider than the line width of the inner lead 106. Further, the line widths of the first wiring portion 22 1 , the second wiring portion 222 , the third wiring portion 223 , the fourth wiring portion 224 , and the fifth wiring portion 225 are substantially the same as 0 127 707 . doc -18 - 200843070 The inner leads 206 connected to the other ends of the fourth and fifth wiring portions 224 and 225 are formed to be longer than the other inner leads ι 6 . Further, the distance between the first wiring portion 221 and the fourth wiring portion 224 is substantially the same as the distance between the first wiring portion 221 and the fifth wiring portion 225. Further, a part of the portion other than the semiconductor wafer mounting region ι3 of the jumper wire 211 is not covered by the solder resist layer i12 and is exposed. More specifically, in the outside of the semiconductor wafer mounting region 103, a portion of the first wiring portion f 221, a portion of the fourth wiring portion 224, and a portion of the fifth wiring portion 225 are not covered by the solder resist layer 112. Exposed. Further, both end portions of the first wiring portion 221, all of the second and third wiring portions 222 and 223, and one end portions of the fourth and fifth wiring portions 224 and 225 are covered by the solder resist layer i12. Thereby, the reliability of the above jumper 211 can be improved. The solder resist layer 112 is an example of a pattern protective film. Further, the first wiring portion 22 1 and the inner lead 206 are connected to the bump electrode 205. Fig. 5 is a schematic cross-sectional view taken along line V_V of Fig. 4. The bump electrodes 105 and 205 are formed on the lower surface of the semiconductor wafer 204 (the surface on the side of the flexible substrate 2〇1). Further, the surface of the semiconductor wafer 2〇4 has a rectangular shape. The bump electrode 2A5 connected to the first wiring portion 221 is formed to be slightly offset from the long side of the semiconductor wafer 104. The bump electrode 2A5 connected to the inner lead 206 is formed near the long side under the semiconductor wafer 104. The semiconductor wafer 204 is supplied with a voltage 127707.doc -19-200843070 print driver to a print head (not shown), and a current generated when a voltage is supplied to the print head flows through the inner lead 206 and the jumper 2 11 . . Therefore, the inner leads and the jumper wires 211 are designed to avoid burning due to the above current, and therefore must be designed to sufficiently reduce the wiring size of the resistors. Specifically, the inner leads 2〇6 and the jumper wires 211 are formed of a copper foil having a thickness of 8 μm and a line width of 40 μm. Since the cross-sectional area of the inner lead 206 and the jumper 211 is 32 〇 μηη2, the inner lead 206 and the jumper 211 can be sufficiently prevented from being burned by the current. The inventors discovered by experiment that in the design of a limit having a practical processing current of 0.2 对于 for the semiconductor wafer 2〇4, when considering the wiring line width of 2 times the current 2 A, the cross-sectional area of the wiring is required. 3〇〇gw. Therefore, if the thickness of the current flexible substrate is limited to 1 μm, the wiring line width needs to be 300 μm. On the other hand, if the wiring is thickened, the wiring line width can be reduced, and the wiring used in the conventional Tcp (Tray Carrier Package, Tape Carrier Package) can be wired if a copper foil having a thickness of % is used. The line width is reduced to 6 μηι. Further, in the flexible substrate 201, similarly to the flexible substrate 1〇1, bubbles between the flexible substrate 2〇1 and the semiconductor wafer 2〇4 can be separated from the short side of the lower surface of the semiconductor wafer 204. The discharge is performed outside the semiconductor wafer mounting region 103. Therefore, the flexible substrate 2〇1 has a high bubble discharge effect from the inside of the semiconductor wafer mounting region 1A to the outside of the semiconductor wafer mounting region 103. In the second embodiment, the second wiring portion 222 is formed at a position "outside the opening 113 of the solder resist layer 112, but may be formed at a position inside the opening 113 of the solder resist layer ι2. That is, the second wiring portion 222 may not be covered with the 127707.doc -20-200843070 anti-Ting layer 112. In the second embodiment, the position of the opening 113 outside the opening 113 of the layer 112 is located. That is, the solder resist layer 112 is covered. The third wiring portion 223 is formed to be solder-resistant, but may be formed in the solder resist layer 112. The third wiring portion 223 may not be used. In the second embodiment, the semiconductor device may have an opening covering the solder resist layer 112. 113 resin.

(Embodiment 3) FIG. 6 is a schematic view of a main part of a semiconductor device according to a third embodiment of the present invention as seen from above. It is to be noted that the same reference numerals are given to the same components as those of the components of the drawings, and the description thereof is omitted. Further, in Fig. 6, the illustration of the semiconductor wafer included in the semiconductor device is omitted. In the above semiconductor device, the bump electrode 305 is connected to the second wiring portion i2i of the jumper lu, and this point and the first! The implementation is different. The above semiconductor wafer is a liquid crystal driver. Further, bump electrode milk 305 is formed on the lower surface of the semiconductor wafer (the surface on the side of the flexible substrate 1 〇 1). Further, the lower surface of the semiconductor wafer has a rectangular shape. The above-mentioned bump electrode 305 is formed slightly below the long side of the semiconductor wafer 1?. Furthermore, the potential of the bump electrode 305 is a ground potential. In recent years, the design elements of the liquid crystal drive crystal high frequency circuit in which the operating frequency is increased due to the serialization of the input signal are indispensable, and in order to stabilize the ground potential, the electrode of the ground potential should be placed at the desired position. . Therefore, the above-mentioned bump electrode 3〇5 is formed under the semiconductor wafer 127707.doc 200843070 and connected to the first wiring portion 121 of the jumper ni. Thus, by forming the bump electrode 305 on the lower surface of the semiconductor wafer and connecting it to the first wiring portion 121 of the jumper 111, the electrical function of the semiconductor device can be improved. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic plan view of a principal part of a flexible substrate according to a first embodiment of the present invention. Fig. 2 is a schematic perspective view showing a semiconductor device according to a third embodiment of the present invention. 3 is an enlarged view of a semiconductor wafer mounting region of FIG. 2. Fig. 4 is a schematic plan view of a principal part of a semiconductor device according to a second embodiment of the present invention. Figure 5 is a cross-sectional view taken along line V-V of Figure 4. Fig. 6 is a schematic plan view of a principal part of a semiconductor device according to a third embodiment of the present invention. Fig. 7 is a schematic perspective view of a COF-type semiconductor device of uranium. Fig. 8 is a schematic plan view of a principal part of a conventional flexible substrate. Fig. 9 is a schematic plan view of a principal part of another prior flexible substrate. [Description of main component symbols] 100 substrate ιοί, 201 flexible substrate 102 wiring 103 semiconductor wafer mounting region 105, 205, 305 bump electrodes 106, 206 inner leads 127707.doc -22- 200843070 111 , 211 112 121 , 221 122 ^ 222 123 , 223 124 ^ 224 125 , 225 jumper solder resist layer first wiring portion second wiring portion third wiring portion fourth wiring portion fifth wiring portion

•23- 127707.doc

Claims (1)

200843070 X. Patent Application Area: 1 . A flexible substrate comprising: a substrate having a semiconductor wafer mounting region on one surface; and a plurality of inner leads formed on the substrate And a wiring connected to the inner lead and crossing the semiconductor wafer mounting region. 2. The flexible substrate according to claim 1, wherein a line width ' of said inner leads wired to said wiring is different from a line width of said inner leads not wired to said wiring. 3. The flexible substrate according to claim 1, comprising: a pattern protective film formed on the one surface of the substrate; and at least a portion of the portion of the wiring outside the semiconductor wafer mounting region is not The pattern protective film is covered and exposed. 4. A flexible substrate as claimed, wherein the wiring system has a thickness of a metal box in the range of 5 〇 Mm and a line width of g6 to 3 〇〇 ym. A semiconductor device comprising: the flexible substrate of claim 1, and the semiconductor wafer semiconductor wafer mounted on the flexible substrate. The semiconductor device according to claim 5, wherein a plurality of convex electrodes are formed on a surface of the semiconductor substrate on the side of the flexible substrate, and the surface of the flexible substrate is rectangular 127707. Doc 200843070 The bump electrode is formed on a portion other than the short side of the surface of the semiconductor wafer on the side of the flexible substrate. A semiconductor device according to claim 5, wherein a plurality of bump electrodes are formed on a surface of said semiconductor wafer on said flexible substrate side; 8. a potential of said bump electrode connected to said wiring is a ground potential. The semiconductor device of claim 5, wherein the table (4) on the side of the flexible substrate is formed on the current system of the "+, 屯, #4 bump electrode" to which the bump electrode is connected by the wiring. & + conductor chip Xiao external output H. 127707.doc