200835411 17147twf.doc/n 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種線路結構及其製程，且特別是關 於一種應用於線路板（circuit board )之線路結構及其製程。 【先前技術】BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit structure and a process thereof, and more particularly to a circuit structure applied to a circuit board and a process thereof. [Prior Art]
近年來’隨著電子技術的日新月異，以及高科技電子 產業的相繼問世，使得更人性化、功能更佳的電子產^不 斷地推陳出新，並朝向輕、薄、短、小的趨勢邁進。:此 趨勢之下，由於線路板具有佈線細密、組裝緊湊以及性能 良好等優點，因此線路板便成為承載多個電子元件以及: 這些電子元件彼此電性連接的主要媒介之—。 圖1A至圖1E為習知之一種線路板製程。如圖lA 示，首先提供一載板110，其中载板11〇之材質係介電斤 只之後於載板之一表面形成一犧牲層120，其中导、. 牲層120的材質為銅，並且形成犧牲層12〇的方式係將義 銅箔直接貼附於載板110之表面上。接著於犧牲層12〇 7 形成一圖案化光阻層130,其中圖案化光阻層13〇係j 出犧牲層120之部份表面。 X略 如圖1B所不，在形成圖案化光阻層13〇之後，从略 鍍（plating)的方式，並以犧牲層12〇為電鍍種子層，= 圖案化光阻層130所暴露出犧牲層12〇之表面上形成〜^ 電圖案140,其中導電圖案140之材質為銅。接著如^ 所示，移除圖案化光阻層13〇,而保留導電醜⑽ 5 200835411 17147twf.doc/n 牲層上。然後如圖ID所示，提供一膠·片（prepreg) 150，之後利用熱壓合（h〇t pressing)的方式將載板 壓合至膠片150上，以使得導電圖案14〇鑲嵌於膠片15〇 上。之後如圖1E所示，將載板110及犧牲層120移除， 以形成線路板1〇〇，其中移除犧牲層12〇之方式為蝕刻。 一般而言，在以蝕刻方式移除犧牲層120的過程中， 由於犧牲層120與導電圖案140係為相同的材質（即銅）， ，此姓刻液不但會將犧牲層12G移除，更會侵烟部份的 導電圖案140。是以線路板1⑻之導電圖案140的表面142 通常會比#片15G之表面152低—深度]3(如圖扭所 此外，當導電圖案140受到蝕刻液的蝕刻時，由於導電圖 案14〇之表面的各個部位可能受到不同程度的侵 路板而言’習知之線路板製程難以製作 出导度均勻的導電圖案14〇。 【發明内容】. 本發明的目的就是在提供一種線路結構，1 凸出於介電層的導電圖案。 有相對 本發㈣再—目㈣是在提供_猶路結構，盆 厚度均勻的導電圖案。 /、/、有 ^發_另—目的是提供—鎌路結難程， 出/、有相對凸出於介電層之導電圖案的線路妹構。 本發明的更-目的是提供—種線路結構^ ° Ο 出具有均勻厚度之導電圖案的線路結構 衣乍 6 200835411 17147twf.doc/n 基於本發明之上述目的或其他目的，本發明提出一種 線路結構，其適用於線路板。此線路結構包括一核心層以In recent years, with the rapid development of electronic technology and the advent of the high-tech electronics industry, more humanized and functional electronic products have been continuously introduced, and they are moving towards a trend of light, thin, short and small. Under this trend, the circuit board has the advantages of fine wiring, compact assembly, and good performance, so the circuit board becomes the main medium for carrying a plurality of electronic components and: these electronic components are electrically connected to each other. 1A to 1E are a conventional circuit board process. As shown in FIG. 1A, a carrier 110 is first provided, wherein the material of the carrier 11 is formed by forming a sacrificial layer 120 on one surface of the carrier, wherein the material of the substrate 120 is copper, and The sacrificial layer 12 is formed by attaching the copper foil directly to the surface of the carrier 110. A patterned photoresist layer 130 is then formed on the sacrificial layer 12A, wherein the patterned photoresist layer 13 is out of a portion of the surface of the sacrificial layer 120. X is slightly as shown in FIG. 1B. After the patterned photoresist layer 13 is formed, the plating layer is formed by a plating method and the sacrificial layer 12 is used as a plating seed layer, and the patterned photoresist layer 130 is exposed to sacrifice. An electrical pattern 140 is formed on the surface of the layer 12, wherein the conductive pattern 140 is made of copper. Next, as shown in FIG. 2, the patterned photoresist layer 13 is removed, while remaining on the conductive layer (10) 5 200835411 17147 twf.doc/n. Then, as shown in FIG. ID, a prepreg 150 is provided, and then the carrier is pressed onto the film 150 by means of thermal pressing so that the conductive pattern 14 is embedded in the film 15. 〇上. Thereafter, as shown in FIG. 1E, the carrier 110 and the sacrificial layer 120 are removed to form a wiring board 1 , wherein the sacrificial layer 12 is removed by etching. In general, in the process of removing the sacrificial layer 120 by etching, since the sacrificial layer 120 and the conductive pattern 140 are the same material (ie, copper), the surname engraving not only removes the sacrificial layer 12G, but A conductive pattern 140 that will invade the portion of the smoke. The surface 142 of the conductive pattern 140 of the circuit board 1 (8) is generally lower than the surface 152 of the #15G-depth] 3 (as shown in the figure, when the conductive pattern 140 is etched by the etching liquid, the conductive pattern 14 is The various parts of the surface may be subjected to different degrees of intrusion boards. [The conventional circuit board process is difficult to produce a conductive pattern 14〇 with uniform conductivity. [Invention] The object of the present invention is to provide a line structure, 1 convex Because of the conductive pattern of the dielectric layer. There is a relative conductive (4) re-- (4) is to provide a conductive pattern with uniform thickness of the basin. /, /, there is ^ hair _ another - the purpose is to provide - 镰 结 结Difficulty, out/, there is a line structure that is relatively convex from the conductive pattern of the dielectric layer. A further object of the present invention is to provide a line structure ^ Ο a line structure 乍 6 having a conductive pattern of uniform thickness 200835411 17147twf.doc/n Based on the above object or other objects of the present invention, the present invention provides a wiring structure suitable for a circuit board. The wiring structure includes a core layer
及一導電圖案。核心層具有一凹陷部，並且凹陷部位於核 心層之一面，其中凹陷部具有一底面。導電圖案係鑲嵌於 核心層，其中導電圖案位於凹陷部内且凸出於底面一高度。 在本發明之一實施例中，上述之高度例如介於丨微米 至15微米之間。 在本發明之一實施例中，核心層例如為一介電層。此 外，此線路結構更包括-第二線路層，其配置於核:層之 另一面0 在本發明之一實施例中，核心層例如包括至少二介電 =以及至少-第—線路層，而第—線路層係配置於這些介 2之任二相鄰者之間。此外，此線路結構更包括一第二 線路層，配置於核心層之另一面。 基於本發明之上述目的或其他目的，本發明提出一種 ===’其適用於製作—線路板。此製程之步驟包 牲声^板。之雜餘之—表面上形成—圖案化犧 “配^於載板之表面上形成—導電圖案，其中導電圖 圖案化犧牲層之間所暴露之表面上，並且導電 大於®案化難層之厚度。之後將載板壓合於 载板。然後移除圖案化犧牲層。 按者牙夕除 宰的發明之一實施例中，形成圖案化犧牲層與導電圖 木的方去例如包減於載板之表面上形成—導電層。接著 7 200835411 17147twf.doc/n 於導電層上形成-圖案化罩幕層。之㈣_ 罩幕’勤j導電層’以形成_化犧。^導 電圖案以後，移除®案化罩幕層。 ’、、、後於形成導 在本發明之一實施例φ , 在上述形成圖案化犧牲層盥 的方法中，當额之材f為導電材質時，莫 =案的方式例如包括電鍍。此外，形 ^更 包括形成-保護層於圖案化犧牲層所暴露之表t之則更And a conductive pattern. The core layer has a recessed portion, and the recessed portion is located on one side of the core layer, wherein the recessed portion has a bottom surface. The conductive pattern is embedded in the core layer, wherein the conductive pattern is located in the recess and protrudes from the bottom surface to a height. In one embodiment of the invention, the height is, for example, between 丨 microns and 15 microns. In an embodiment of the invention, the core layer is, for example, a dielectric layer. In addition, the line structure further includes a second circuit layer disposed on the other side of the core: 0. In an embodiment of the invention, the core layer includes, for example, at least two dielectric = and at least - a first circuit layer. The first-line layer is disposed between any two neighbors of these media. In addition, the line structure further includes a second circuit layer disposed on the other side of the core layer. Based on the above object or other objects of the present invention, the present invention proposes a ===' which is suitable for making a circuit board. The steps of this process include the sound board. Miscellaneous - surface formation - patterning "formed on the surface of the carrier plate to form a conductive pattern, wherein the conductive pattern is patterned on the exposed surface between the sacrificial layers, and the conductivity is greater than the hard layer of the case Thickness. The carrier is then pressed onto the carrier. The patterned sacrificial layer is then removed. In one embodiment of the invention, the patterned sacrificial layer and the conductive pattern are formed, for example, by A conductive layer is formed on the surface of the carrier. Next, 7 200835411 17147twf.doc/n forms a patterned mask layer on the conductive layer. (4) _ mask 'dusty j conductive layer' to form a _ sacred. ^ conductive pattern , removing the case cover layer. ',, and then forming an embodiment of the present invention φ, in the above method of forming a patterned sacrificial layer ,, when the amount of material f is a conductive material, The method of the case includes, for example, electroplating. In addition, the shape further includes a surface formed by the protective layer on the patterned sacrificial layer.
f本發明之-實蘭中，上述之_化犧牲層 係採用不同於保護層之材質。 材貝 於伴實當圖案化犧牲層之材質不同 於保漫層之材A，更包括以保護層為罩幕， 化犧外’移除圖案化犧牲層後更包括移除保護口層。 由於本發明之線路結構的導案係位 凸出於凹陷部之底面一黑硌、丄丄 曰1 且 連接至線路結構之導電圖;所才晶片之覆晶凸塊 ^ ^ A /L ^ 口茶所構成的接墊。因此，木菸明 線^構與其他電子轉之間能夠具有較佳的連接: =卜，在本發日狀麵結_製財，祕本發明可 : = 護導電圖案，因此導電圖案不會在鍅 :==的過程中受_ ’是以本發明之線 ===圖案能夠具有均勻的厚度，這有助於高密度 #為讓本發明之上述和其他目&、特徵和優點能更明顯 易懂’下文特舉較佳實施例，並配合所附圖式，作詳細說 明如下。 8 200835411 17147twf.doc/n 【實施方式】 圖2A至圖2H為本發明一實施例之一種線路結構製 程的流程示意圖。請共同參照圖2A與2B，首先提供—載 板210。之後在載板210上形成圖2B之一圖案化犧牲層 220’。在本實施例中，形成圖案化犧牲層22〇,的方法例如 是先於載板210之一表面形成一未圖案化之犧牲層22〇(如 圖2A所示），其中犧牲層220的材質包括銅或其他的導 電材質，而形成犧牲層220的方式例如係直接將一銅箔貼 附於載板210之表面上，或是經由電鍍的方式將犧牲層22〇 形成於載板210上。 接著於犧牲層220上，形成一圖案化罩幕層23〇 (如 圖2A所示），其中圖案化罩幕層23〇之材質例如為感光 生材貝，並且圖案化罩幕層230係暴露出犧牲層220之部 份表面。然後以圖案化罩幕層230為罩幕，蝕刻犧牲層 22〇，以形成圖案化犧牲層22〇，（如圖2β所示）。θ 凊芩照圖2C，接著在載板210之表面上形成一導電 圖案240’其中導電圖t謂係配置於圖案化犧牲層22=， 之間所暴露之載板210的表面，㈣電圖案24()之1部位 於圖案化犧牲層220，_成之空_。值得注意的是，導 兒圖案240的厚度係大於圖案化犧牲層22〇， 而言’當載板训之材質採用導電材質時：例= 2载板210做為電鍍種子層，並且經由電錢的方式將電 錢材料填人圖案化罩幕層⑽及_化犧牲層22〇,所定義 9 200835411 17I47twf：d〇c/ii 的空間中，以在載板210之表面上形成導電圖案24〇。更 佳的是，本實施例更可以在形成導電圖案24〇之前，在圖 案化犧牲層220所暴j备之載板210的表面上例如以電鐘的 方式預先形成一保護層250,以在結構上將圖案化犧牲声 220’及導電圖案240隔離。 曰 請參照圖2D，在形成導電圖案240之後，移除圖案 化罩幕層230，因而暴露出圖案化犧牲層22〇,。 _ 請參照圖2E，在移除圖案化罩幕層230之後，將載板 210之具有導電圖案240的表面壓合於一核心層26〇上， 以使得導電圖案240鑲嵌於核心層260之一面，其中壓合 的方式例如包括熱壓，而核心層260例如為單一介電層。 凊参照圖2F，在將載板210壓合至核心層260之後， 移除載板210，而暴露出圖案化犧牲層220,。 明參照圖2G，在移除載板210之後，移除圖2F之圖 案化犧牲層220,，以形成一線路結構2〇〇，其中移除圖案 化犧牲層220’的方式例如為蝕刻。在移除圖案化犧牲層 _ 220’之後，可選擇保留保護層250，其配置在導電圖案240 之暴露出的局部表面上。在本實施例中，保護層25〇例如 ♦ 為一鎳金複合層。 由於在圖2B之步驟中已預先形成圖案化犧牲層 220 ’所以鑲嵌有導電圖案240之核心層260的一面便會 形成一凹陷部260a，其分佈區域相同於已移除之圖案化犧 牲層220’的分佈區域，並且導電圖案24〇會相對凸出於凹 陷部260a之底面260b —高度Η，其中高度H可介於1微 200835411 17147twf.doc/n 米至15微米之間。 更佳的是，㈣麵 已經預先在載板m及圖案化犧牲二〇= 保護導電圖請，藉由保護層25。來 化犧牲層220,的麵巾受在侧移除圖案 之厚度的均勻性。 因而維持導電圖案鳩 需伴S’在移除圖案化犧牲層22G，之後，若不 = 23：：將位於導電圖案_上的保護層祝 矛夕除其中移除保護層25G之方法例如為則。 中，意的是，在爛移除圖案化犧牲層22G，的過程 省略:Tr刻液不會蝕刻移除導電圖案240時，則可 噌略圖2C之保護層25〇的製作。 的示’其林發實_之—種線路結構 2〇〇,‘；卢4目乂於圖2H之線路結構200 ’圖3之線路結構 -第ΙΪΓ層260之相對於導電圖案的—面形成 弟二線路層270 ’使得線路結構2〇〇，成為一雙層板。 的示^“、、^4 ’其為本發日収—實補之—種線路結構 路結路結構細”與圖3之雙層板的線 之間的差/、在於線路結構200”係為多層板。在 :、、路構200巾，核心層260包括多個介電層262 ϋΓ第—線路層264，其中第—線路層264係介於兩 二m62之間，而導電圖案24〇則讓嵌於外側之介電層 上，且線路結構200”更包括一第二線路層27〇，其配 11 200835411 17147twf.doc/n 2置6=二層之姆於導電圖案擔的外側的介電層 综上所述，由於本發明之導電圖案係位於核心層 ί:所目對凸出於凹陷部之底面一高度，這使得由導電 接㈣相對凸•凹陷部之底面—高度。ΐ 接的方式’將線路結構之導·案所構成之多; ίΐ:一晶片上之多個凸塊連接時，凸出之這些接墊鱼之 接因此’本發明之線路芯 ^、奸％圖案及圖案化犧牲層，因此導電圖宰便 t刻移除圖案化犧牲層的過程中受到侵勉，是以導^ 木^具有㈣的厚度，這有助於高密度線路板之= 雖然本發明已以多個實施例揭露如 明:任何熟習此技藝者，在叫發 =圍内’ _可作些許之更動與潤錦，因此本發 乾圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1A至圖1E為習知之一種線略板製程 程的】二=為本發明一實施例之?· 圖 圖3為本發明另一實施例之一種、緣路結構的示意 12 200835411 l/I4/twt.doc/n 圖4為本發明又一實施例之一種線路結構的示意圖。In the present invention, the above-mentioned sacrificial layer is made of a material different from the protective layer. The material of the patterned sacrificial layer is different from the material of the sacrificial layer, and the protective layer is used as a mask to remove the patterned sacrificial layer and remove the protective layer. Since the guide structure of the circuit structure of the present invention protrudes from the bottom surface of the depressed portion, a black 硌, 丄丄曰1 and is connected to the conductive pattern of the circuit structure; the flip chip of the wafer is ^ ^ A / L ^ The mat made up of tea. Therefore, there is a better connection between the wood smoke line and other electrons: = Bu, in the hair of the hairline, the invention can: = protect the conductive pattern, so the conductive pattern will not In the process of 鍅:==, it is possible to have a uniform thickness in the pattern of the line === of the present invention, which contributes to the high density# in order to make the above and other objects, features and advantages of the present invention It is to be understood that the preferred embodiments are described in the following, and are described in detail below with reference to the accompanying drawings. 8 200835411 17147twf.doc/n [Embodiment] FIG. 2A to FIG. 2H are schematic diagrams showing the flow of a circuit structure process according to an embodiment of the present invention. Referring to Figures 2A and 2B in common, a carrier 210 is first provided. A patterned sacrificial layer 220' of Figure 2B is then formed on carrier 210. In this embodiment, the method of forming the patterned sacrificial layer 22 is, for example, forming an unpatterned sacrificial layer 22 (as shown in FIG. 2A ) on one surface of the carrier 210 , wherein the material of the sacrificial layer 220 is The copper or other conductive material is included, and the sacrificial layer 220 is formed by, for example, directly attaching a copper foil to the surface of the carrier 210 or forming the sacrificial layer 22 on the carrier 210 via electroplating. Then, on the sacrificial layer 220, a patterned mask layer 23 is formed (as shown in FIG. 2A), wherein the material of the patterned mask layer 23 is, for example, a photosensitive green material, and the patterned mask layer 230 is exposed. A portion of the surface of the sacrificial layer 220 is removed. The sacrificial layer 22 is then etched with the patterned mask layer 230 as a mask to form a patterned sacrificial layer 22 (as shown in Figure 2β). θ Referring to FIG. 2C, a conductive pattern 240' is then formed on the surface of the carrier 210. The conductive pattern t is disposed on the surface of the carrier 210 exposed between the patterned sacrificial layer 22=, and (4) an electrical pattern. One of the 24() is located on the patterned sacrificial layer 220, _ into the empty _. It should be noted that the thickness of the guide pattern 240 is greater than that of the patterned sacrificial layer 22, and 'when the material of the carrier is made of a conductive material: Example = 2 carrier 210 as a plating seed layer, and via the electric money The method of filling the pattern of the electric money material with the patterned mask layer (10) and the sacrificial layer 22, defined in the space of 200835411 17I47twf:d〇c/ii, to form a conductive pattern 24 on the surface of the carrier 210 . More preferably, in this embodiment, before the conductive pattern 24 is formed, a protective layer 250 is pre-formed on the surface of the carrier 210 on which the patterned sacrificial layer 220 is formed, for example, by an electric clock. The patterned sacrificial sound 220' and the conductive pattern 240 are structurally isolated. Referring to FIG. 2D, after the conductive pattern 240 is formed, the patterned mask layer 230 is removed, thereby exposing the patterned sacrificial layer 22A. Referring to FIG. 2E, after the patterned mask layer 230 is removed, the surface of the carrier 210 having the conductive pattern 240 is pressed onto a core layer 26〇 such that the conductive pattern 240 is embedded in one of the core layers 260. The manner in which the pressing is performed includes, for example, hot pressing, and the core layer 260 is, for example, a single dielectric layer. Referring to FIG. 2F, after the carrier 210 is pressed to the core layer 260, the carrier 210 is removed to expose the patterned sacrificial layer 220. Referring to FIG. 2G, after the carrier 210 is removed, the patterned sacrificial layer 220 of FIG. 2F is removed to form a wiring structure 2, wherein the patterned sacrificial layer 220' is removed, for example, by etching. After removing the patterned sacrificial layer _ 220', a retention protective layer 250 can be selected that is disposed on the exposed partial surface of the conductive pattern 240. In this embodiment, the protective layer 25 is, for example, a nickel-gold composite layer. Since the patterned sacrificial layer 220' has been previously formed in the step of FIG. 2B, one side of the core layer 260 in which the conductive pattern 240 is embedded is formed with a recess 260a having the same distribution area as the removed patterned sacrificial layer 220. The distribution area of 'and the conductive pattern 24 相对 will protrude from the bottom surface 260b of the recess 260a - the height Η, wherein the height H may be between 1 micro 200835411 17147 twf.doc / n meters to 15 microns. More preferably, the (four) face has been pre-loaded on the carrier m and the patterned sacrificial 〇 = protective conductive pattern, by means of the protective layer 25. The face towel of the sacrificial layer 220 is subjected to the uniformity of the thickness of the side removal pattern. Therefore, maintaining the conductive pattern is not required to be accompanied by S' in removing the patterned sacrificial layer 22G, and then, if not = 23:: the protective layer on the conductive pattern is removed, wherein the method of removing the protective layer 25G is, for example, . In the meantime, the process of removing the patterned sacrificial layer 22G in the ruin is omitted: when the Tr engraving does not etch and remove the conductive pattern 240, the fabrication of the protective layer 25A of FIG. 2C can be omitted. The structure of the structure of the structure of the structure of the circuit structure The second circuit layer 270' makes the circuit structure 2〇〇 a two-layer board. The difference between the lines of the "^, , ^4 ' is the same as the daily collection - the actual compensation - the structure of the line structure road junction" and the line of the double-layer board of Figure 3 is the line structure 200" In the multi-layer board, the core layer 260 includes a plurality of dielectric layers 262 ϋΓ first-circuit layer 264, wherein the first-line layer 264 is between two two m62, and the conductive pattern 24〇 Then, it is embedded on the outer dielectric layer, and the circuit structure 200" further includes a second circuit layer 27〇, which is equipped with 11 200835411 17147twf.doc/n 2 and 6=2 layers of the outer layer of the conductive pattern. Dielectric Layer As described above, since the conductive pattern of the present invention is located at the height of the bottom layer of the core layer, the bottom surface of the recessed portion is height-adjusted by the conductive joint (four). ΐ 的 ' 将 将 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路 线路Patterning and patterning the sacrificial layer, so the conductive pattern is invaded during the process of removing the patterned sacrificial layer, so that the thickness of the conductive layer is (4), which contributes to the high-density circuit board. The invention has been disclosed in various embodiments. Anyone skilled in the art can make a few changes and run-ups in the name of the inside of the company. Therefore, the scope of the patent application scope is defined by the scope of the patent application. Prevail. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A to FIG. 1E are diagrams of a conventional line drawing process. FIG. 3 is an embodiment of the present invention. Illustrated 12 200835411 l/I4/twt.doc/n FIG. 4 is a schematic diagram of a circuit structure according to still another embodiment of the present invention.
【主要元件符號說明】 100 :線路板 110 :載板 120 :犧牲層 130 :圖案化光阻層 140 :導電圖案 142 :表面 150 :膠片 152 :表面 200 :線路結構 200’ ：線路結構 200” ：線路結構 210 :載板 220 :犧牲層 220’ ：圖案化犧牲層 230 :圖案化罩幕層 240 :導電圖案 250 :保護層 260 :核心層 260a :凹陷部 260b :底面 262 :介電層 264 :第一線路層 270 :第二線路層 D :深度 Η :高度 13[Main component symbol description] 100: circuit board 110: carrier board 120: sacrificial layer 130: patterned photoresist layer 140: conductive pattern 142: surface 150: film 152: surface 200: line structure 200': line structure 200": Line structure 210: carrier 220: sacrificial layer 220': patterned sacrificial layer 230: patterned mask layer 240: conductive pattern 250: protective layer 260: core layer 260a: recessed portion 260b: bottom surface 262: dielectric layer 264: First circuit layer 270: second circuit layer D: depth Η: height 13