JP2002359464A - Method of manufacturing wiring board - Google Patents

Method of manufacturing wiring board

Info

Publication number
JP2002359464A
JP2002359464A JP2001163858A JP2001163858A JP2002359464A JP 2002359464 A JP2002359464 A JP 2002359464A JP 2001163858 A JP2001163858 A JP 2001163858A JP 2001163858 A JP2001163858 A JP 2001163858A JP 2002359464 A JP2002359464 A JP 2002359464A
Authority
JP
Japan
Prior art keywords
substrate
film
hole
thin film
metal thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001163858A
Other languages
Japanese (ja)
Inventor
Hideaki Oe
秀明 大江
Toshio Hagi
敏夫 萩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2001163858A priority Critical patent/JP2002359464A/en
Publication of JP2002359464A publication Critical patent/JP2002359464A/en
Withdrawn legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing wiring board, which is equipped with wiring and electrodes that are arranged on both its main surfaces and surely connected together via a through-hole, and improved in reliability without making the manufacturing process complicated and increasing the cost. SOLUTION: A film 10 is formed on one main surface (front surface) of a board 1 provided with a through-hole 4, then metal thin films 11 and 11a are each formed inside the through-hole 5 and the other main surface (rear surface) of the board 1, where the film 10 is not formed; and then the film 10 is removed, by which the metal thin film 11a (conduction electrode) of smooth surface is exposed to the other surface (rear surface). Then, a conductor pattern 12 is formed on the front surface of the board 1, and the conductor pattern 12 formed on the front surface of the board and the metal thin film 11 formed on the rear surface of the board 1 are surely made conductive via the metal thin film (conduction electrode) exposed on the surface of the board 1 via the through-hole 4.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、配線基板の製造方
法に関し、詳しくは、誘電体などからなる基板の表裏両
面に配線や電極が配設され、かつ、表裏両面側の配線や
電極がスルーホールを介して互いに接続された構造を有
する配線基板の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a wiring board, and more particularly, to a method for manufacturing a wiring board, in which wiring and electrodes are provided on both front and back surfaces of a substrate made of a dielectric material and the like. The present invention relates to a method of manufacturing a wiring board having a structure connected to each other through a hole.

【0002】[0002]

【従来の技術及び発明が解決しようとする課題】近年、
例えば、図2に示すように、誘電体などからなる基板5
1の下面に電極52を配設するとともに、上面に配線パ
ターン53を配設し、これらの電極52と配線パターン
53を、貫通孔54内に導通用電極56を配設してなる
スルーホール57を介して互いに導通させた構造を有す
る配線基板が種々の用途に広く用いられている。
2. Description of the Related Art In recent years,
For example, as shown in FIG.
1, an electrode 52 is provided on the lower surface, a wiring pattern 53 is provided on the upper surface, and these electrodes 52 and the wiring pattern 53 are connected to a through hole 57 in which a conduction electrode 56 is provided in a through hole 54. 2. Description of the Related Art Wiring boards having a structure in which they are electrically connected to each other via a wire are widely used for various applications.

【0003】ところで、図2に示すような配線基板は、
通常、以下に説明するような方法により製造されてい
る。 (1)まず、図3(a)に示すように、基板51にスルーホ
ール用の貫通孔54を形成する。 (2)次に、図3(b)に示すように、貫通孔54に金属ペ
ースト55を充填した後、焼き付け(焼結)を行う。 (3)それから、基板51の両主面を、貫通孔54内に充
填、配設された導通用電極(金属ペースト55の焼結
体)56とともに研磨し、図3(c)に示すように、基板
51の両主面を平滑にする。これにより、貫通孔54内
に導通用電極56が充填されたスルーホール57が形成
される。 (4)そして、図3(d)に示すように、基板51の一方の
主面(下面)に電極52として、金属薄膜を成膜した
後、図3(e)に示すように、基板51の他方の主面(上
面)に配線パターン53を形成し、電極52と配線パタ
ーン53を、スルーホール57を介して互いに導通させ
る。これにより、図2に示すような配線基板が得られ
る。
By the way, a wiring board as shown in FIG.
Usually, it is manufactured by a method as described below. (1) First, as shown in FIG. 3A, a through hole 54 for a through hole is formed in the substrate 51. (2) Next, as shown in FIG. 3B, after filling the metal paste 55 into the through holes 54, baking (sintering) is performed. (3) Then, both main surfaces of the substrate 51 are polished together with the conducting electrodes (sintered body of the metal paste 55) 56 filled and arranged in the through holes 54, as shown in FIG. , Both main surfaces of the substrate 51 are smoothed. As a result, a through hole 57 in which the conduction electrode 56 is filled in the through hole 54 is formed. (4) Then, as shown in FIG. 3D, after forming a metal thin film as an electrode 52 on one main surface (lower surface) of the substrate 51, as shown in FIG. A wiring pattern 53 is formed on the other main surface (upper surface) of the device, and the electrode 52 and the wiring pattern 53 are conducted to each other via a through hole 57. Thereby, a wiring board as shown in FIG. 2 is obtained.

【0004】しかし、上記従来の配線基板の製造方法に
おいては、前記(2)の工程において、金属ペースト55
を焼き付ける際に、金属ペースト55(導通用電極5
6)の内部にボイド(空隙)が発生したり、上記(3)の
工程において、基板51の両主面を、貫通孔54内に充
填、配設された導通用電極56とともに研磨する際に、
導通用電極56の表面が十分に平滑にならず、表面粗さ
が粗くなったりするため、導通用電極56とその上に形
成される導体パターン(配線あるいは電極)の接続抵抗
が増大し、十分な導通信頼性を確保することが困難にな
るという問題点がある。また、貫通孔への金属ペースト
の充填や基板の両主面の研磨には手数がかかるととも
に、製造工程数が多くなり、コストを押し上げる要因に
なるという問題点がある。
However, in the above-described conventional method for manufacturing a wiring board, the metal paste 55 is required in the step (2).
When baking, the metal paste 55 (the conductive electrode 5
When voids (voids) are generated inside 6) or when the two main surfaces of the substrate 51 are polished together with the conduction electrodes 56 that are filled and disposed in the through holes 54 in the step (3), ,
Since the surface of the conduction electrode 56 is not sufficiently smooth and the surface roughness is rough, the connection resistance between the conduction electrode 56 and a conductor pattern (wiring or electrode) formed thereon is increased, and However, there is a problem that it is difficult to secure high conduction reliability. In addition, there is a problem in that the filling of the through hole with the metal paste and the polishing of both main surfaces of the substrate are troublesome, the number of manufacturing steps is increased, and the cost is increased.

【0005】本発明は、上記問題点を解決するものであ
り、製造工程の複雑化やコストの増大を招いたりするこ
となく、基板の両主面に配設された配線や電極を、スル
ーホールを介して確実に導通させることが可能で、信頼
性の高い配線基板の製造方法を提供することを目的とす
る。
The present invention has been made to solve the above-mentioned problems, and it is possible to form wirings and electrodes provided on both main surfaces of a substrate through through holes without complicating the manufacturing process and increasing the cost. It is an object of the present invention to provide a highly reliable method for manufacturing a wiring board, which can be reliably made conductive through the wiring.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するた
め、本発明(請求項1)の配線基板の製造方法は、基板
に貫通孔を形成する工程と、前記基板の一方の主面(以
下「表面」)にフィルムを配設する工程と、前記基板
の、フィルムが配設されていない他方の主面(以下「裏
面」)側から、前記貫通孔の内部及び基板の裏面に金属
薄膜を成膜する工程と、前記基板の表面からフィルムを
除去することにより、前記貫通孔の内部に形成された金
属薄膜を基板の表面に露出させる工程と、前記基板の表
面に、前記貫通孔から基板の表面に露出した金属薄膜を
介して、基板の裏面に形成された金属薄膜と導通する導
体パターンを形成する工程とを具備することを特徴とし
ている。
In order to achieve the above object, a method of manufacturing a wiring board according to the present invention (claim 1) includes a step of forming a through hole in the board, and a step of forming one of the main surfaces of the board (hereinafter, referred to as a through hole). Disposing a film on the “front surface”), and forming a metal thin film on the inside of the through-hole and on the back surface of the substrate from the other main surface (hereinafter “rear surface”) of the substrate on which the film is not disposed. Forming a film, removing the film from the surface of the substrate to expose a metal thin film formed inside the through-hole to the surface of the substrate, and removing the substrate from the through-hole on the surface of the substrate. Forming a conductive pattern that is electrically connected to the metal thin film formed on the back surface of the substrate via the metal thin film exposed on the front surface of the substrate.

【0007】貫通孔が形成された基板の一方の主面(表
面)にフィルムを配設した後、基板の、フィルムが配設
されていない他方の主面(裏面)側から、貫通孔の内部
及び基板の裏面に金属薄膜を成膜した後、フィルムを除
去することにより、表面が平滑な金属薄膜(導通用電
極)を貫通孔から基板の表面に露出させ、その後、基板
の表面に導体パターンを形成することにより、基板の表
面に形成された導体パターンと、基板の裏面に形成され
た金属薄膜とを、貫通孔から基板の表面に露出した金属
薄膜(導通用電極)を介して、確実に導通させることが
可能になり、信頼性の高い配線基板を製造することが可
能になる。さらに、従来のように、金属ペーストの貫通
孔への充填工程や、その後の研磨工程が不要になるとと
もに、基板の裏面への成膜と、導通用電極の形成を同時
に行うことが可能になり、製造工程を簡略化して、コス
トの削減を図ることができるようになる。なお、本発明
において、フィルムが配設される面である基板の表面
と、金属薄膜が成膜される面である基板の裏面の関係
は、あくまでも相対的なものであって、発明の構成を限
定するものではなく、フィルムが配設される面を裏面、
金属薄膜が成膜される面を表面ととらえることも可能で
ある。
After arranging a film on one main surface (front surface) of a substrate having a through hole formed therein, the inside of the through hole is formed from the other main surface (rear surface) of the substrate on which the film is not provided. After the metal thin film is formed on the back surface of the substrate, the film is removed to expose a metal thin film (electrode for conduction) having a smooth surface to the surface of the substrate from the through hole. Is formed, the conductor pattern formed on the surface of the substrate and the metal thin film formed on the back surface of the substrate are securely connected via the metal thin film (electrode for conduction) exposed on the surface of the substrate from the through hole. , And a highly reliable wiring board can be manufactured. Further, unlike the conventional case, the step of filling the through-hole with the metal paste and the subsequent polishing step are not required, and the film formation on the back surface of the substrate and the formation of the conductive electrode can be simultaneously performed. Thus, the manufacturing process can be simplified and the cost can be reduced. Note that, in the present invention, the relationship between the front surface of the substrate on which the film is disposed and the back surface of the substrate on which the metal thin film is formed is only a relative one. Without limiting, the side on which the film is disposed is the back side,
The surface on which the metal thin film is formed can be regarded as the surface.

【0008】また、請求項2の配線基板の製造方法は、
前記貫通孔として、前記フィルムが配設される基板の表
面側の直径が、基板の裏面側の直径より小さく、基板の
厚み方向の断面形状が略台形状となるようなテーパー形
状を有する貫通孔を形成することを特徴としている。
[0008] The method for manufacturing a wiring board according to claim 2 is characterized in that:
As the through hole, a through hole having a taper shape such that the diameter of the front surface side of the substrate on which the film is disposed is smaller than the diameter of the back surface side of the substrate, and the cross-sectional shape in the thickness direction of the substrate becomes substantially trapezoidal. Is formed.

【0009】貫通孔として、フィルムが配設される基板
の表面側の直径が、基板の裏面側の直径より小さく、基
板の厚み方向の断面形状が略台形状となるようなテーパ
ー形状を有する貫通孔を形成するようにした場合、基板
の裏面側から薄膜形成方法により金属薄膜を形成する場
合に、貫通孔の内壁及びフィルムの裏面に、不連続部分
がなく、導通信頼性の高い金属薄膜を確実に形成するこ
とが可能になり、本発明をさらに実効あらしめることが
可能になる。
The through hole has a tapered shape such that the diameter of the front surface of the substrate on which the film is disposed is smaller than the diameter of the back surface of the substrate, and the cross-sectional shape in the thickness direction of the substrate is substantially trapezoidal. When the holes are formed, when the metal thin film is formed by the thin film forming method from the back surface side of the substrate, there is no discontinuous portion on the inner wall of the through hole and the back surface of the film, and a metal thin film having high conduction reliability is formed. It is possible to form it surely, and it becomes possible to make the present invention more effective.

【0010】また、請求項3の配線基板の製造方法は、
前記フィルムとして、溶剤に可溶なフィルムを用いるこ
とを特徴としている。
[0010] In a third aspect of the present invention, a method of manufacturing a wiring board is provided.
As the film, a film soluble in a solvent is used.

【0011】フィルムとして、溶剤に可溶なフィルムを
用いることにより、溶剤を用いてフィルムを容易に除去
することが可能になり、本発明をさらに実効あらしめる
ことができる。
By using a film that is soluble in a solvent as the film, the film can be easily removed using the solvent, and the present invention can be made more effective.

【0012】[0012]

【発明の実施の形態】以下、本発明の実施の形態を示し
て、その特徴とするところをさらに詳しく説明する。図
1(a)〜(e)は、本発明の一実施形態にかかる配線基板
の製造工程を示す図である。以下、図1(a)〜(e)を参
照しつつ、本発明の実施形態にかかる配線基板の製造方
法について説明する。
BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described, and features thereof will be described in more detail. FIGS. 1A to 1E are diagrams illustrating a manufacturing process of a wiring board according to an embodiment of the present invention. Hereinafter, a method for manufacturing a wiring board according to an embodiment of the present invention will be described with reference to FIGS.

【0013】(1)まず、図1(a)に示すように、誘電体
セラミック製の基板1に、レーザ加工法やサンドブラス
ト法などの方法により、スルーホール用の貫通孔4を形
成する。この実施形態においては、貫通孔4としては、
基板1の表面(図1(a)では上面)側の直径が、基板の
裏面(図1(a)では下面)側の直径より小さく、基板1
を厚み方向に切断した場合の断面形状が略台形状となる
ように内周面が傾斜した、テーパー形状を有する貫通孔
を形成する。 (2)次に、図1(b)に示すように、基板1の上面側に、
フィルム10(この実施形態では、溶剤に可溶なドライ
フィルムレジスト(F―340,富士フィルムオーリン
製))を貼り付ける。 (3)それから、図1(c)に示すように、フィルム10を
貼り付けた状態で、フィルム10が配設されていない基
板1の裏面(下面)側から、蒸着法により、貫通孔4の
内部、フィルム10の裏面、及び基板1の下面に、膜厚
3μmの金属薄膜(この実施形態ではCu薄膜)11を
成膜する。なお、このとき貫通孔4のテーパーを有する
内周面及びフィルム10の裏面に、不連続部分がなく、
導通信頼性の高い金属薄膜(導通用電極)11aが形成
される。 (4)次に、基板1を、アセトン中に10分間浸漬し、フ
ィルム10を除去することにより、図1(d)に示すよう
に、貫通孔4の内部に形成された金属薄膜(導通用電
極)11aを、フィルム10が配設されていた基板1の
上面に露出させる。このとき、金属薄膜(導通用電極)
11aの、フィルム10が配設されていた基板1の上面
への露出面は平滑になる。 (5)その後、基板1の上面に、リフトオフ法によって導
体パターン(配線パターン)12を形成し、貫通孔4か
ら基板1の上面に露出した金属薄膜(導通用電極)11
aを介して、配線パターン12を、基板1の下面に形成
された金属薄膜11と導通させる。
(1) First, as shown in FIG. 1A, a through hole 4 for a through hole is formed in a dielectric ceramic substrate 1 by a method such as a laser processing method or a sand blast method. In this embodiment, as the through-hole 4,
The diameter of the front surface (upper surface in FIG. 1A) of the substrate 1 is smaller than the diameter of the rear surface (lower surface in FIG. 1A) of the substrate.
Is formed in a tapered shape, the inner peripheral surface of which is inclined so that the cross-sectional shape when the is cut in the thickness direction is substantially trapezoidal. (2) Next, as shown in FIG.
A film 10 (in this embodiment, a dry film resist soluble in a solvent (F-340, manufactured by Fuji Film Ohlin)) is attached. (3) Then, as shown in FIG. 1C, in a state where the film 10 is attached, the through-hole 4 is formed from the back surface (lower surface) side of the substrate 1 on which the film 10 is not provided by the vapor deposition method. A metal thin film (Cu thin film in this embodiment) 11 having a thickness of 3 μm is formed on the inside, the back surface of the film 10 and the lower surface of the substrate 1. At this time, there is no discontinuous portion on the tapered inner peripheral surface of the through hole 4 and the back surface of the film 10,
A metal thin film (electrode for conduction) 11a having high conduction reliability is formed. (4) Next, the substrate 1 is immersed in acetone for 10 minutes, and the film 10 is removed, as shown in FIG. The electrode 11a is exposed on the upper surface of the substrate 1 on which the film 10 is provided. At this time, a metal thin film (electrode for conduction)
The exposed surface of the upper surface 11a of the substrate 1 on which the film 10 is disposed becomes smooth. (5) Thereafter, a conductor pattern (wiring pattern) 12 is formed on the upper surface of the substrate 1 by a lift-off method, and the metal thin film (electrode for conduction) 11 exposed on the upper surface of the substrate 1 from the through hole 4.
The wiring pattern 12 is electrically connected to the metal thin film 11 formed on the lower surface of the substrate 1 via a.

【0014】これにより、図1(e)に示すように、基板
1の下面に配設された金属薄膜11と、基板1の上面に
配設された配線パターン12が、金属薄膜(導通用電
極)11aを介して互いに接続された構造を有する配線
基板が得られる。
As shown in FIG. 1E, the metal thin film 11 provided on the lower surface of the substrate 1 and the wiring pattern 12 provided on the upper surface of the substrate 1 A) A wiring board having a structure connected to each other via 11a is obtained.

【0015】なお、この実施形態においては、貫通孔4
として、内周面が傾斜したテーパー形状を有する貫通孔
を形成するようにしているので、基板1の下面側から蒸
着法により金属薄膜11,11aを形成する場合に、貫
通孔4の内壁が垂直である場合に比べて、貫通孔4の内
壁及びフィルム10の下面に電極切れがなく、信頼性の
高い金属薄膜(導通用電極)11aを確実に形成するこ
とが可能になるとともに、金属薄膜(導通用電極)11
aの、基板1の上面への露出面が平滑になるため、その
上に形成される導体パターン12と、基板1の下面側の
金属薄膜11の接続抵抗を小さくすることが可能にな
り、導通信頼性の高い配線基板を製造することが可能に
なる。
In this embodiment, the through holes 4
When the metal thin films 11 and 11a are formed from the lower surface side of the substrate 1 by a vapor deposition method, the inner wall of the through hole 4 is formed vertically. As compared with the case of (1), the inner wall of the through-hole 4 and the lower surface of the film 10 do not have electrode breakage, so that a highly reliable metal thin film (electrode for conduction) 11a can be reliably formed. Conducting electrode) 11
Since the exposed surface of a is exposed to the upper surface of the substrate 1, the connection resistance between the conductor pattern 12 formed thereon and the metal thin film 11 on the lower surface side of the substrate 1 can be reduced, and A highly reliable wiring board can be manufactured.

【0016】また、従来のように、金属ペーストの貫通
孔への充填工程や、その後の研磨工程が不要になるとと
もに、基板の裏面への成膜と、導通用電極の形成を同時
に行うことが可能になり、製造工程を簡略化して、コス
トの削減を図ることができる。
Further, unlike the related art, the step of filling the through-hole with the metal paste and the subsequent polishing step are not required, and the film formation on the back surface of the substrate and the formation of the conduction electrode can be performed simultaneously. This makes it possible to simplify the manufacturing process and reduce costs.

【0017】また、この実施形態では、フィルムとし
て、溶剤に可溶なドライフィルムレジストを用いている
ので、溶剤(この実施形態ではアセトン)によってフィ
ルムを容易かつ確実に除去することが可能になり、製造
工程を簡略化することができる。
In this embodiment, since a dry film resist soluble in a solvent is used as the film, the film can be easily and reliably removed by the solvent (acetone in this embodiment). The manufacturing process can be simplified.

【0018】なお、この実施形態では、フィルムとし
て、溶剤に可溶なドライフィルムレジスト(富士フィル
ムオーリン製)を用いた場合を例にとって説明したが、
フィルムの種類はこれに限らず、種々のフィルム(例え
ば、粘着シートなど)を用いることが可能である。
In this embodiment, an example has been described in which a dry film resist (manufactured by Fuji Film Ohlin) soluble in a solvent is used as a film.
The type of film is not limited to this, and various films (for example, an adhesive sheet) can be used.

【0019】また、上記実施形態では、金属薄膜(及び
導通用電極)として、Cu薄膜を形成するようにしてい
るが、金属薄膜(及び導通用電極)を構成する材料はこ
れに限らず、その他の種々の導電材料を用いることが可
能である。
In the above embodiment, the Cu thin film is formed as the metal thin film (and the conductive electrode). However, the material forming the metal thin film (and the conductive electrode) is not limited to this. It is possible to use various conductive materials.

【0020】また、上記実施形態では、基板の下面側の
金属薄膜及び導通用電極を、蒸着法により形成するよう
にしているが、蒸着法以外にも、スパッタリング法、C
VD法、セミアディティブ法などの薄膜形成法を用いる
ことが可能である。
Further, in the above embodiment, the metal thin film and the conduction electrode on the lower surface side of the substrate are formed by the vapor deposition method.
It is possible to use a thin film forming method such as a VD method or a semi-additive method.

【0021】また、上記実施形態では、基板の上面に導
体パターン(配線パターン)を形成する方法として、リ
フトオフ法を用いているが、配線パターンの形成方法と
しては、リフトオフ法に限らず、RIE法、ウェットエ
ッチング法などの種々の方法を用いることが可能であ
る。
In the above embodiment, the lift-off method is used as a method of forming a conductor pattern (wiring pattern) on the upper surface of the substrate. However, the method of forming the wiring pattern is not limited to the lift-off method, but may be an RIE method. Various methods such as a wet etching method can be used.

【0022】本発明は、さらにその他の点においても、
上記実施形態に限定されるものではなく、基板の形状や
構造、その構成材料、基板に形成される金属薄膜や導通
用電極、導体パターン(配線パターン)の具体的な構成
などに関し、発明の要旨の範囲内において、種々の応
用、変形を加えることが可能である。
The present invention also provides, in yet other respects,
The present invention is not limited to the above embodiment, but relates to the shape and structure of the substrate, the constituent materials thereof, the metal thin film and conductive electrodes formed on the substrate, the specific configuration of the conductor pattern (wiring pattern), and the like. Within the range, various applications and modifications can be made.

【0023】[0023]

【発明の効果】上述のように、本発明(請求項1)の配
線基板の製造方法は、貫通孔が形成された基板の一方の
主面(表面)にフィルムを配設した後、基板の、フィル
ムが配設されていない他方の主面(裏面)側から、貫通
孔の内部及び基板の裏面に金属薄膜を成膜した後、フィ
ルムを除去することにより、表面が平滑な金属薄膜(導
通用電極)を貫通孔から基板の表面に露出させ、その
後、基板の表面に導体パターンを形成するようにしてい
るので、基板の表面に形成された導体パターンと、基板
の裏面に形成された金属薄膜とを、貫通孔から基板の表
面に露出した金属薄膜(導通用電極)を介して確実に導
通させることが可能になり、信頼性の高い配線基板を製
造することが可能になる。さらに、従来のように、金属
ペーストの貫通孔への充填工程や、その後の研磨工程が
不要になるとともに、基板の裏面への成膜と、導通用電
極の形成を同時に行うことが可能になり、製造工程を簡
略化して、コストの削減を図ることができるようにな
る。
As described above, according to the method for manufacturing a wiring board of the present invention (claim 1), after a film is provided on one main surface (front surface) of a substrate having a through hole formed therein, the wiring board is formed. After a metal thin film is formed on the inside of the through hole and the back surface of the substrate from the other main surface (back surface) side where the film is not disposed, the film is removed to remove the metal thin film having a smooth surface. The common electrode is exposed from the through-hole to the surface of the substrate, and then the conductor pattern is formed on the surface of the substrate. Therefore, the conductor pattern formed on the surface of the substrate and the metal formed on the back surface of the substrate are formed. The thin film can be reliably conducted through the metal thin film (conduction electrode) exposed from the through hole to the surface of the substrate, and a highly reliable wiring substrate can be manufactured. Further, unlike the conventional case, the step of filling the through-hole with the metal paste and the subsequent polishing step are not required, and the film formation on the back surface of the substrate and the formation of the conductive electrode can be simultaneously performed. Thus, the manufacturing process can be simplified and the cost can be reduced.

【0024】また、請求項2の配線基板の製造方法のよ
うに、貫通孔として、フィルムが配設される基板の表面
側の直径が、基板の裏面側の直径より小さく、基板の厚
み方向の断面形状が略台形状となるようなテーパー形状
を有する貫通孔を形成するようにした場合、基板の裏面
側から薄膜形成方法により金属薄膜を形成する場合に、
貫通孔の内壁及びフィルムの裏面に、不連続部分がな
く、導通信頼性の高い金属薄膜を確実に形成することが
可能になり、本発明をさらに実効あらしめることが可能
になる。
According to a second aspect of the present invention, the diameter of the through-hole on the front surface side of the substrate on which the film is provided is smaller than the diameter of the back surface side of the substrate, When forming a through hole having a tapered shape such that the cross-sectional shape is substantially trapezoidal, when forming a metal thin film by a thin film forming method from the back surface side of the substrate,
There is no discontinuous portion on the inner wall of the through hole and on the back surface of the film, and a metal thin film with high conduction reliability can be reliably formed, so that the present invention can be made more effective.

【0025】また、請求項3の配線基板の製造方法のよ
うに、フィルムとして、溶剤に可溶なフィルムを用いる
ことにより、溶剤を用いてフィルムを容易に除去するこ
とが可能になり、本発明をさらに実効あらしめることが
できる。
Further, by using a film soluble in a solvent as the film as in the method for manufacturing a wiring board according to the third aspect, the film can be easily removed using the solvent. Can be made more effective.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)〜(e)は、本発明の一実施形態にかかる配
線基板の製造方法の主要な工程を示す図である。
FIGS. 1A to 1E are diagrams showing main steps of a method for manufacturing a wiring board according to an embodiment of the present invention.

【図2】配線基板の構成の一例を模式的に示す図であ
る。
FIG. 2 is a diagram schematically illustrating an example of a configuration of a wiring board.

【図3】(a)〜(e)は、従来の配線基板の製造方法の主
要な工程を示す図である。
FIGS. 3A to 3E are diagrams showing main steps of a conventional method for manufacturing a wiring board.

【符号の説明】[Explanation of symbols]

1 基板 4 スルーホール用の貫通孔 10 フィルム(ドライフィルムレジスト) 11 金属薄膜(Cu薄膜) 11a 金属薄膜(導通用電極)(Cu薄膜) 12 導体パターン(配線パターン) DESCRIPTION OF SYMBOLS 1 Substrate 4 Through hole for through hole 10 Film (dry film resist) 11 Metal thin film (Cu thin film) 11a Metal thin film (electrode for conduction) (Cu thin film) 12 Conductor pattern (wiring pattern)

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】基板に貫通孔を形成する工程と、 前記基板の一方の主面(以下「表面」)にフィルムを配
設する工程と、 前記基板の、フィルムが配設されていない他方の主面
(以下「裏面」)側から、前記貫通孔の内部及び基板の
裏面に金属薄膜を成膜する工程と、 前記基板の表面からフィルムを除去することにより、前
記貫通孔の内部に形成された金属薄膜を基板の表面に露
出させる工程と、 前記基板の表面に、前記貫通孔から基板の表面に露出し
た金属薄膜を介して、基板の裏面に形成された金属薄膜
と導通する導体パターンを形成する工程とを具備するこ
とを特徴とする配線基板の製造方法。
A step of forming a through hole in the substrate; a step of disposing a film on one principal surface (hereinafter referred to as “front surface”) of the substrate; and a step of disposing a film of the substrate on which the film is not disposed. Forming a metal thin film on the inside of the through hole and on the back surface of the substrate from the main surface (hereinafter, “back surface”) side; and removing the film from the surface of the substrate to form a metal thin film inside the through hole. Exposing the metal thin film on the surface of the substrate; and, on the surface of the substrate, a conductive pattern that is electrically connected to the metal thin film formed on the back surface of the substrate via the metal thin film exposed from the through hole to the surface of the substrate. Forming a wiring board.
【請求項2】前記貫通孔として、前記フィルムが配設さ
れる基板の表面側の直径が、基板の裏面側の直径より小
さく、基板の厚み方向の断面形状が略台形状となるよう
なテーパー形状を有する貫通孔を形成することを特徴と
する請求項1記載の配線基板の製造方法。
2. A taper in which the diameter of the front surface of the substrate on which the film is provided is smaller than the diameter of the rear surface of the substrate, and the cross-sectional shape in the thickness direction of the substrate is substantially trapezoidal. 2. The method for manufacturing a wiring board according to claim 1, wherein a through hole having a shape is formed.
【請求項3】前記フィルムとして、溶剤に可溶なフィル
ムを用いることを特徴とする請求項1又は2記載の配線
基板の製造方法。
3. The method according to claim 1, wherein a film soluble in a solvent is used as the film.
JP2001163858A 2001-05-31 2001-05-31 Method of manufacturing wiring board Withdrawn JP2002359464A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001163858A JP2002359464A (en) 2001-05-31 2001-05-31 Method of manufacturing wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001163858A JP2002359464A (en) 2001-05-31 2001-05-31 Method of manufacturing wiring board

Publications (1)

Publication Number Publication Date
JP2002359464A true JP2002359464A (en) 2002-12-13

Family

ID=19006756

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001163858A Withdrawn JP2002359464A (en) 2001-05-31 2001-05-31 Method of manufacturing wiring board

Country Status (1)

Country Link
JP (1) JP2002359464A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7474536B2 (en) 2000-10-27 2009-01-06 Ridley Ray B Audio sound quality enhancement apparatus and method
US7476814B2 (en) 2006-07-18 2009-01-13 Fujitsu Limited Multilayer interconnection board
US7561436B2 (en) 2005-06-06 2009-07-14 Delphi Technologies, Inc. Circuit assembly with surface-mount IC package and heat sink
KR100990588B1 (en) 2008-05-27 2010-10-29 삼성전기주식회사 A printed circuit board comprising landless via and method for manufacturing the same
CN114501864A (en) * 2022-04-14 2022-05-13 四川英创力电子科技股份有限公司 Manufacturing method of embedded resistor printed circuit board

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7474536B2 (en) 2000-10-27 2009-01-06 Ridley Ray B Audio sound quality enhancement apparatus and method
US7561436B2 (en) 2005-06-06 2009-07-14 Delphi Technologies, Inc. Circuit assembly with surface-mount IC package and heat sink
US7476814B2 (en) 2006-07-18 2009-01-13 Fujitsu Limited Multilayer interconnection board
KR100990588B1 (en) 2008-05-27 2010-10-29 삼성전기주식회사 A printed circuit board comprising landless via and method for manufacturing the same
CN114501864A (en) * 2022-04-14 2022-05-13 四川英创力电子科技股份有限公司 Manufacturing method of embedded resistor printed circuit board
CN114501864B (en) * 2022-04-14 2022-07-01 四川英创力电子科技股份有限公司 Manufacturing method of embedded resistor printed circuit board

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