TW200816291A - Electroless NiP adhesion and/or capping layer for copper interconnection layer - Google Patents

Abstract

A method of depositing a copper interconnection layer on a substrate such on a glass substrate for use e.g. in TFT-LCD flat panel interconnection system. The method according to the invention comprising the steps of: (a) optionally cleaning the substrate, (b) optionally micro-etching the substrate, (c) depositing a catalyzation layer on the substrate to obtain a catalyzed substrate, (d) conditioning the catalyzed substrate with a conditioning solution to obtain a conditioned catalyzed substrate, (e) plating the catalyzed substrate with a NiP layer by contacting said substrate or at least a portion thereof with a wet bath mixture comprising precursors of Ni and P, (f) depositing a copper catalyst layer onto the plated NiP layer, depositing a Cu layer on said copper catalyst layer.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of depositing a layer of copper interconnection on a substrate such as a glass substrate for use in, for example, a TFT-LCD planar panel interconnection system. More particularly, it relates to a method of fabricating a TFT-LCD planar display panel, the panel comprising a copper interconnect busbar for electrically charging each pixel located in a matrix of pixels by a thin film transistor (TFT) Connected to the signal electrode bus and to the scanning electrode busbar of a liquid crystal display panel (LCD) or plasma or similar display panel. [Prior Art] The basic principle of a TFT-LCD useful as a computer screen or a television display is known. For example, it is disclosed in detail in KTK Scientific pubHshers T()k(eight) chap. 7, 1987 by E. Kaneko, "LCD TV Display: Principle and Application of Liquid Crystals". In a typical flat display panel such as an LCD or plasma panel, a display material such as a liquid crystal or a discharge gas (respectively) is itself sandwiched between two electrically insulating glass substrates. Electrical interconnects or busbars are disposed on the surface of at least one of the glass substrates to apply a voltage to the electrodes of the liquid crystal or the electrical body. For example, in an active matrix LCD system, a plurality of signal or data electrode lines or bus bars and a plurality of gate electrode or scan electrode bus bars arranged in a matrix are arranged on one surface of one of the glass substrates. Similar to the conventional CRT system, when the data electrode and the closed electrode cross each other, they have at least one thin film transistor as a switch (on/off) and a pixel electrode 7 200816291, wherein each of the matrices is sequentially It is activated to turn the IK switch off' and each pixel electrode in this line is connected to its opposite data line to provide a signaled signal for the appropriate color of the associated pixel electrode. When the size of the display panel is increased, the frequency of the driving signals needs to be increased, so that the parasitic capacitance of these lines is increased, which causes a delay in the driving signal: transmission. a has been published in Japan for example, “Used for low TFT-LCDs to reduce these delays,

Display' 89, page 498·501, title impedance copper address line, the article suggests that since the resistivity of copper is much smaller than that of Ming's, the n-generation Lu is used as the Lai transistor and related. The gate electrode material of a matrix interconnect or bus bar. This copper layer is deposited by the (4) ore method, but because of its ability to adhere to the glass surface, an intermediate button layer is required. A method for producing such a metal i-layer on the glass surface of a panel of a display panel is also known from US Pat. No. 6,413,845, which uses a method of depositing Ni on the surface of the glass by electroless plating. The film is then covered with a photoresist film to effect lithographic shaping of the metal deposition. Then, a gold ruthenium is deposited on the film, and finally, a copper film is deposited on the gold layer by electroless plating (wet deposition) to finally obtain a suitable copper interconnection system. However, the use of photoresist increases the cost of this method. It is also known to those skilled in the art that steel tends to diffuse within the layer of material it is deposited from. Therefore, a barrier layer must be provided on the substrate prior to depositing the layer of copper on the substrate. The above method is for example θα. Etc. at 8 200816291

The Journal of the electronic society, 149_112〇〇2, is entitled “The electroless ternary nickel applied to the diffusion barrier layer in copper interconnect technology is deposited along the 不, 2 deposition” article. However, these films disclosed in this document are not capable of adhering to a glass substrate and have poor thickness uniformity under the conditions disclosed in this article. ^ Therefore, it is still necessary to define a method for depositing a blanket layer deposition process in which the cost of the diffusion barrier layer is not increased, the adhesion to the glass substrate is good, and the copper layer is preferably applied. In accordance with the findings of the present invention, the electroless layer deposited under certain conditions can be adapted to provide both good adhesion and barrier properties to the Cu barrier properties. It has also been found that the uniformity of the roughness and thickness of these layers is consistent with: Port f The interconnect and/or gate structure composed of Cu/NiP/glass is produced by and Cu plating. The Nip layer is plated on the glass substrate to provide, = and barriers, while the Cu layer is deposited on Nip ± as, for example, closed: ° It is understood that the NlP layer has excellent adhesion properties on the glass substrate, J and The excellent barrier properties of copper diffusion can be avoided. It has also been found that the uniformity of the chain f and the thickness of the NiP shore is satisfactory. The haze analysis shows: an amorphous phase with excellent thermal stability. The NiP adhesive layer is a single layer, so that it is easier to fabricate than the laminate disclosed in US-B M13845, and can reduce production costs compared to other wet/dry methods. SUMMARY OF THE INVENTION According to the present invention, a method of depositing a layer of steel on a substrate such as a glass substrate for use in, for example, a FT_LCD panel interconnect system includes the following step 9 200816291: a) cleaning the substrate as appropriate, b) performing microetching of the substrate as appropriate, c) depositing a catalytic layer (100) on the substrate (100) to obtain a catalyzed substrate (100, 101), d) conditioning the catalyzed substrate with a conditioning solution Obtaining a conditioned catalytic substrate (100, 101, 102), e) plating an electroless NiP layer (1〇3) on the catalyzed substrate by causing the substrate or at least a portion thereof to include Ni Contacting the wet bath mixture of the p precursor to obtain a conditioned catalytic substrate (100, 101, 102, 103) plated with NiP, f) depositing a copper catalyst layer on the plated NiP layer ( 〇 4), and g) depositing a copper layer (1〇5) on the copper catalyst layer (104). Preferably, step (f) of the procedure is performed by depositing a thin silver layer (1〇4) on the NiP layer by using silver or a palladium salt, and the copper layer (1〇5) is used by using A copper salt such as CuS04 is deposited by plating. The invention also relates to a substrate material having at least some portion thereof overlying a catalytic layer, a conditioning layer, a NiP layer, a copper catalyst layer and a copper layer. [Embodiment]

The liquid crystal display panel is composed of a plurality of pixels arranged in a matrix on a substrate, and is covered by a thin glass substrate, which covers all the pixels together. Each pixel can be regarded as a square electrode system, which is a right-n-low-low-shoulder. And a top of the 200816291 邛 transparent electrode with a liquid crystal layer in between. Above the transparent electrode is a glass substrate covered with a polarizing layer. In order to have a structure similar to a conventional CRT system in which a shadow mask system is combined with a color point and an electron beam, arranged to have a matrix of continuous horizontal scan lines from the top to the bottom of the screen, the pixel system is arranged in a similar manner, The lines of the pixels are sequentially activated (scanned), and each pixel in the activated line receives an electronic signal at the top electrode that is proportional to the desired color of the pixel. Therefore, each pixel requires a switch driven by a scan signal (line) that, when activated, connects the top electrode of each pixel to the appropriate voltage (signal source, typically via a capacitor). Currently, suitable switches are thin film transistors (TFTs), which are typically made according to the technique: In order to manufacture such a TFT_FDP screen, it is necessary to coat at a fixed interval, and the thin film transistor (MOS type) has a germanium electrode, a source electrode and a gate electrode. The mother tft electrode is usually connected to the transparent pixel electrode, the source electrode is connected to the signal electrode busbar currently made of copper, and at the same time, the gate electrode is connected to the scan electrode bus bar. Fig. 1 is a view showing a plurality of pixels which are respectively arranged in lines 10, U, ... 12; 2, 21, ... 22;, 1', 32, 40, 41, ... 42. Switch ~〇,

Sll, .\Su and their respective S40, S41, ...S41 are connected to their own line by their respective gates L!, L2, 1^, "丄4, and the respective source of the switch is connected to the signal line. Cl5 C2, "_c4, and the drain of each TFT is connected to its respective pixel electrode. 11 200816291 Figure 2 schematically illustrates the basic principles of the switch matrix circuit (the same number

Indicate the same relevance). A 乂 Figure 2a represents a basic TFT switch matrix in which each line is connected to the gate of the MOS transistor, and each signal electrode line c2, c3 is connected to the source of the transistor, the drain of the transistor It is connected to the liquid crystal pixel electrode while the other electrodes are grounded. Figure 2b illustrates the same matrix arrangement with the exception of parallel connected to a wide pixel, 12-pole batter, F2, F3. This system can apply a voltage between the electrodes of one pixel and can change this voltage (i.e., the color of the color point) as each line scans. Figure 3 is a schematic illustration of an interconnect system for implementing a matrix interconnect system at the parent fork position of adjacent lines L and C. The "scan", interconnect VIII has a small extension 62 connected to the gate 63 of the TFT 66, and both the line L and the TFT are deposited on a transparent glass substrate. The interconnect L is via the insulating layer 60. The signal (row) line c intersecting with the interconnect line L generates electrical insulation. However, the signal line c is electrically connected to the source electrode 65 of the TFT, and the germanium electrode 64 is electrically connected to the pixel electrode 6 i. The present invention basically relates to a method of fabricating a copper gate electrode of a TFT switch and a scan interconnection L (as is the case for the interconnection interconnect C), which is when it is made of steel and is deposited on a glass substrate. Figure 4 illustrates a cross-sectional view of a copper layer deposited on a glass substrate in accordance with the present invention. The glass substrate 100 is covered with a catalytic layer 1, a conditioning layer 1 〇 2, a Ν Ρ layer 1 〇 3, a copper catalyst. Layer 〇4 and a copper layer 〇5. The following is a description of the method for obtaining such an interlayer by way of example. 12 200816291 The various steps described above are disclosed in the following by a preferred embodiment. Step (a): Glass Surface cleaning: use UV, ozone solution and / or degreasing solution such as N a mixture of a〇fj, Na2C03, Na3p〇4 to remove organic impurities on the surface. This may be omitted when the surface is sufficiently clean, or if such a treatment may damage the substrate or an unintended chemical reaction For the hydrazine and/or ozone treatment, this step is preferably carried out for a period of between 10 seconds and 10 (minutes between minutes, more preferably between 30 seconds and 3 minutes. When using a degreasing solution) When the cleaning step is performed at a temperature between 30 ° C and 1 〇 (between TC, preferably between 30 seconds and 1 minute, more preferably between 50 ° C and 90 ° C) The next step is between 1 minute and 5 minutes. Then, the substrate is washed with deionized pure water. Step (b): Microetching of the glass surface: The purpose of this step is to create micro-roughness on the glass surface to strengthen NiP The effect of the layer being adhered to the substrate. This step can be omitted if the surface of the glass is sufficiently rough to provide adhesion or if such a treatment may cause harmful reactions on the glass surface. By immersing one including 0·1 volume ° / ❶ to 5 5% by volume to 5% by volume of HF (which may also include Nh4F from g/L to 100 g/L), or typically immersed in 3% by volume to 3% by volume Hf and an aqueous solution of 3〇g/L to 60g/L of NHJ in 3〇 to 3 minutes. Step (〇: NiP catalyst layer:

The SnC! 2 and PdCl 2 solutions can be used to carry out this step to produce a very thin palladium layer on the glass substrate table 13 200816291 =. To this end, the substrate was immersed in ~ liquid A and then rinsed with DI water, and then immersed in the solution of 2 solutions. Preferably, the _12 solution contains 〇·〗 〖% by volume to 1 〇 vol% of the water solution containing (M g / L to 5 〇 gmnCl2 〇 pdCm ^

It consists of an aqueous solution containing from 0.001% by volume to 5% by volume of HCl and from 〇1 g/L to 5 g/L of PdCl2. More preferably, the SnC12 solution comprises 1 g/L to 20 g/L of SnCl2 dissolved in a 5% to 5 〇/〇 HCl solution, and the PdCl 2 solution comprises 5% to 1% HCl solution.中中〇"g/L to 2 g/L of PdCl2. It is expected that the following chemical reactions may occur on the glass surface: Sn2+ + Pd2+ = > Sn4+ + Pd. Step Funeral (d): Conditioning: This step is usually carried out using an aqueous solution containing a reducing agent. It is understood that this step is a necessary step to obtain a uniform NiP deposit. This step reduces oxidative Sn4+ on the surface and promotes reductive NiP electroless plating. This step is carried out by dipping into a solution having a similar composition to the solution used in the following step (e) but not containing the Ni salt. Use a solution containing from 5 g/L to 50 g/L NaH2P02. This program usually runs between 1 sec and 3 minutes. Step (e): NiP plating: NiS04 and NaH2P02 were used as the source of Ni and P. NaH2P〇2 is also used as a reducing agent. The complexing agent is selected from the group consisting of organic compounds having a carboxyl group (-COOX·· X is H, a metal, an alkyl group) and a mixture thereof. More typically, it is selected from the group consisting of acetic acid, tartaric acid, glycolic acid, lactic acid, and mixtures thereof. If necessary, the pH of the solution is adjusted with pH buffer. In one embodiment, 14 200816291 uses a NiS04.7H20 comprising 10 g/L to 45 g/L, 3 g/L to 50 g/L of NaH2P02.H20, and 5 mL/L to 50 mL/L of ethanol. A solution of acid (7 Å/〇) and 3 g/L of tartaric acid was used and the substrate was immersed therein. A lead-containing compound in the range of ppm·5 ppm to 1 〇 ppm may be added as a stabilizer. The temperature and pH of the plating bath are in the range of 5 CTC to 9 Torr and 2 to 9, respectively, and more typically in the range of 7 (TC to 9 (rc and 2 to 6). The time can be determined according to the plating rate and the required thickness. Typically, in the case of the NiP layer, it is 3 sec to i minutes. Finally, the substrate is washed with water. Step (f): Catalysis of Cii : The glass substrate is immersed in an NH4OH solution of AgN03, an HC1 solution of PdCl2, or a NhOH solution of Pd(NHs)4Cl2 to form a very thin silver or palladium layer on the surface of the NiP. More typically, Oig/] is used. L to 1 () AgN03 〇 〇 1% to 1% ΝΗ 4 〇Η solution. Typically, this step is carried out for 10 seconds to 5 minutes, more preferably 30 seconds to 1 minute. For a palladium layer, use a solution containing 0.01 g/:L to 5 g/; Lpdcl2 I in 0.01% to 5% HCl. More preferably, 〇·1 g/L to 2 g/L of PdCl 2 is dissolved in 0 〇 5% to In 1% HC1 solution. In other specific examples, 0.11⁄4 to 5% Nh4〇H of 〇1 g/L to 1〇g/L Pd(NH3)4Cl is used. Then, if the quality of the plated Cu does not match A reduction step can also be carried out when required. For the type, 0.1% to 5% of the HCHO solution is used for 1 to 5 minutes, more typically 0.5% to 3% of the HCHO solution is used. Typically, DMAB to 5 g/L of DMAB can be used. The (dimethylamine borane) solution is substituted for the HCHO solution for 3 sec to 5 minutes, more typically 〇5 g/L to 3 g/L for 15 200816291 solution for 1 minute to 3 minutes. Step (g): Plating Cu: The copper plating solution includes a copper source, a binder, a reducing agent, and a pH buffer. Typically, 2 g/I 15 g/L of CuS 〇 4 is used as the cu source. The complexing agent is selected from EDTAS. , tartrate, citrate, diamine, sugar alcohol and mixtures thereof. In a specific example, 2 〇g / L ^ 6 〇 potassium potassium tartrate is used. The reducing agent is selected from the group consisting of acid, amine, hydrazine, amine Base thief, glyoxylic acid, ascorbic acid, hypophosphite, and mixtures thereof. In a specific example, 0.05% to (9) shame is used. If necessary, the compound can be added (ie, 〇_丨g/L to i 0 g) /L of NiA) to promote Cu plating. A sulfur compound in the range of ppm ppm to 2 Ppm may be added as a stabilizer. The pH of the solution may be, for example, NaOH and s around 9 to 13. The application time is determined by the rate of shovel application and the desired thickness; for a layer of several hundred nanometers, it is typically from 1 minute to 60 minutes, more typically from 5 minutes to 4 minutes. Ο Another according to the invention A specific example 'a NiP layer can be deposited as a cover or protective layer on the Cu layer by preferably repeating steps U) to (e) (possibly copper cleaning before step (1)). The present invention will be better understood from the following examples and comparative examples. Example 1 A glass substrate was immersed in a degreasing solution including NaH, Na2C〇3, NaJh at 8 Torr for 3 minutes to remove organic impurities thereon. After rinsing with deionized water, it was immersed in the diluted HF/NH4HF solution for 1 minute to make micro-roughness on the surface. After rinsing with DI•water, immerse 16 200816291 in 1% HCl solution containing 1〇g/LSnCi^SnCh solution, then immerse it in 〇.1% solution including 〇·3 g several pd2c^ The PdCl2 (solution) towel was soaked for 2 minutes in each of the two solutions. After rinsing the substrate with D.I. water, it was immersed in a conditioning solution containing a reducing agent for 30 seconds. Then, it was immersed in a Nip plating solution. Table ^ shows the composition of the plating bath and the plating conditions. Table 1 Composition conditions NiS04, 7H20: 30 g / L Adjusted to pH 5 with acetate buffer NaH2P02.H20 : 30 g / L Temperature: 70 ° C Lactic acid: 15 mL / L Tartaric acid: 15 g / L Acetic acid error · 3 Η 20 : 1·5 ppm After rinsing with DJ. water, the substrate was immersed in an AgN〇3 solution containing 1.5 g/L AgN〇3 in a 0.3% NH4OH solution for 45 seconds. After rinsing the substrate with DI·water, it was immersed in a Cu plating solution, and the corresponding plating conditions are shown in Table 2: Table 2 Composition conditions CuS04-5H20: 7 g/L Adjusted to pH 12 with NaOH C4H4Na06-5H9〇: 34 g/L Room temperature Na2C03 : 3 g/L NiCl2 : 1 g/L HCHO (37%) : η g/L Sulfur pulse · 0 · 2 ppm 17 200816291 By performing "sticking, testing" (No peeling) confirmed that the plated layer has superior adhesion to the glass substrate. The roughness and thickness uniformity of the two layers are satisfactory (less than 5 nm and within 5% respectively). % by weight and 9 weight composition. Twilight analysis shows that (10) is an amorphous phase. The copper layer plated on the Nip layer has a low resistivity (2 6

Qcm). X-ray analysis also showed that the two Nip and Cu layers had good thermal resistance, maintained 丨 hours at WC, and diffused after a thin heating step: the copper of the NiP layer was negligible. (Comparative Cautious Example 1 A copper layer was plated on the same glass substrate in all the steps except the step of depositing the Νπ layer used in the example 。. The obtained copper layer showed poor adhesion on the glass substrate, and It is easy to be stripped. Comparative paste example? As in Example 1, in a manner similar to the example!, except that the temperature of the solution without step (a) or step (a) is lower than that of the thief, the deposition of the layer is performed. The plated layer shows poor homogeneity and lacks reproducibility, 'because the surface is not clean enough. Compare all the steps except step (b) in Example 1 of the shell. Many Nip layers show The adhesion to the substrate was poor. Comparative Example 4 The steps (a) and () which were carried out as in Example i were carried out on a -glass substrate, and V private (c) was omitted, and then experimentally carried out as explained in Example 1. Steps (4) and (e). However, #Nip & accumulated on the glass base 18 200816291 plate, the sinusoidal sinus in the step (c), if the concentration of Snci2 is not lower than ~, that is, 50 g / L , + soil g is higher than 5 τ or the rolling degree of PdCl2 is not lower than 〇.〇ig/ L, ie right: outside 'Performance examples are carried out according to Example 1. In all of these examples Φ - χτ·η Θ 1 shell. In the layer of , , , ... plated on the substrate, or, fine ore When the resistance layer shows poorness and lacks reproducibility. m Τ 的 的 的 和 和 和 和 ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( 步骤 步骤 步骤 步骤 步骤 步骤 步骤 2 2 Use all the steps in the -glass-based i.

The NlP layer is plated on the substrate, and the latter's ',, and dry alumina Ar_ times are applied to the plating, and the NiP layer exhibits a non-thickness, poor adhesion, and/or lack of reproducibility. . Example L: Comparative Example II In addition to the concentration of niS〇4.7h2〇, NaH2p〇2.H2〇, lactic acid, glycolic acid 2 and the wrong compound are not within the individual ranges defined in the above step (e), according to the example i Various examples are implemented. If the Nip layer is not deposited on the substrate, i.e., if it is plated, the Nip layer exhibits poor = uniformity, poor adhesion, and/or lack of reproducibility. Comparative Example 8 Various examples were carried out in a manner similar to that disclosed in the examples except that the temperature of the NiP plating bath was less than 5 〇〇 c or higher than 9 。. In some cases, the Ν Ν layer is plated on the substrate, or, when plated, the layer of 2008 2008 291 291 exhibits poor thickness uniformity and/or lack of reproducibility. In addition to the Nip plating bath ^ 〇 1V. α ^ system is not less than 2 in the right, that is, ancient than 9, according to the example! Implement Ρ疋 Λ χ χ Ό Ό Ό « _ kinds of shellfish. In these various examples, = (d) is on the substrate, or, when applied, this is not the same: uniformity, poor adhesion, and/or lack of reproducibility.

V Except for the step (f), in the example, the flawless 11 layer was plated on the Nip layer. In each step, except in step (7), the concentration of AgN〇3 is lower than 〇"g/L or higher! Various examples similar to the example 1 are carried out other than 〇 g/L. If the Cu layer is not plated, i.e., the S-plated copper layer exhibits poor thickness, poor portion occupancy, resistivity, and/or lack of reproducibility. j Comparative Example 1 7 Except that HC1 solution of PdCl2 or pd (NH4〇H solution of NH was used instead of AgN〇32 NH4〇H solution in step (f), various examples were carried out according to Example 1. This step was carried out using 〇· 3 g / L pdc 〇 hci or 〇 25 g / L PcKNHACl2 2% NH4 〇 H solution was immersed for 3 minutes to complete. The plated Cu layer showed thickness uniformity, adhesion, and Resistivity and reproducibility. Comparative Example 1 3 Except for the individual CuS04.5H20, C4H4KNNa〇6.5H2〇, Ni compound, HCHO and/or sulfur compound concentrations not within the individual ranges defined in step (g) above, 2008. In addition, various Cu-free layers similar to the example! are applied to the substrate, or, when applied, exhibit uniformity, poor adhesion, high electrical resistivity, and/or lack of reproducibility. Sexual Example 1 4 Except that the pH of the Cu plating bath was adjusted to be lower than 9 or higher than ", various examples similar to those of Example 1 were carried out. Right non-Cu-free layer was plated on the substrate, that is, when plating Poor uniformity, poor adhesion, high resistance And/or lack of reproducibility. [Simplified description of the drawings], the present invention will be described in detail with reference to the drawings which represent the following representative examples. Fig. 1 is a schematic plan view of a TFT-LCD display panel. Fig. 2 is a switch matrix configuration. Figure 3 is a detailed view of the interconnect between the TFT and the electrode. Figure 4 illustrates a cross-sectional view of a copper layer deposited on a glass substrate in accordance with the present invention. [Major component symbol description] 10 pixels 11 pixels 12 Pixel 20 pixels 21 pixels 22 pixels 30 pixels 31 pixels 21 200816291 pixel pixel pixel pixel insulation pixel electrode small extension gate electrode source electrode

TFT glass substrate catalytic layer conditioning layer

NiP layer copper catalyst layer

V copper layer signal signal signal line signal signal signal noise capacitor capacitor capacitor 22 200816291 LI scan line L2 scan line L3 scan line L4 scan line S10 switch SI 1 switch S12 switch S40 switch S41 switch S42 switch

C 23

Claims (1)

200816291 X. Patent Application Range: 1. A method for depositing a copper interconnect layer on a substrate, such as a glass substrate, for use in, for example, a TFT-LCD planar panel interconnect system, comprising the steps of: a) optionally The substrate is cleaned, b) the substrate is left as needed, c) a catalytic layer (ι〇1) is deposited on the substrate (1〇〇) to obtain a catalytic substrate (100, 101), d The conditioning substrate is conditioned with a conditioning solution to obtain a conditioned catalytic substrate (100, 101, 102), e) an electroless Nip layer (1 〇 3 ) is applied to the catalytic substrate by using the substrate or At least a portion thereof is contacted with a wet bath mixture comprising Ni and p precursors to obtain a catalyzed catalytic substrate (丨〇〇, 101, 102, 103) bonded to NiP, f) depositing a layer on the plated NiP layer A copper catalyst layer (ι 4), and g) deposit a copper layer (105) on the copper catalyst layer (1〇4). 2. The method of claim 1, wherein the step (f) is performed by depositing a thin silver layer (104) on the NiP layer by using a silver salt, according to the scope of the patent application. The method of item 1 or 2, wherein the deposition of the Cu layer (1 〇 5 ) is performed by using a copper salt such as Cus 〇 4 . 4. A substrate material (100), wherein at least some portion thereof is sequentially coated with a catalytic layer (101), a conditioning layer (1〇2), a Nip layer (1〇3), and a copper catalyst. Layer (104) and a copper layer (1〇5). twenty four