CN101466869A - Electroless plating NiP adhering and/or covering layer for copper wiring layer - Google Patents

Electroless plating NiP adhering and/or covering layer for copper wiring layer Download PDF

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Publication number
CN101466869A
CN101466869A CNA200680055001XA CN200680055001A CN101466869A CN 101466869 A CN101466869 A CN 101466869A CN A200680055001X A CNA200680055001X A CN A200680055001XA CN 200680055001 A CN200680055001 A CN 200680055001A CN 101466869 A CN101466869 A CN 101466869A
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layer
substrate
nip
plating
copper
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那须昭宣
陈易聪
陈玄芳
熊炯声
林则安
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LAir Liquide SA pour lEtude et lExploitation des Procedes Georges Claude
Industrial Technology Research Institute ITRI
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LAir Liquide SA pour lEtude et lExploitation des Procedes Georges Claude
Industrial Technology Research Institute ITRI
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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31Coating with metals
    • C23C18/38Coating with copper
    • C23C18/40Coating with copper using reducing agents
    • C23C18/405Formaldehyde
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1646Characteristics of the product obtained
    • C23C18/165Multilayered product
    • C23C18/1651Two or more layers only obtained by electroless plating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/18Pretreatment of the material to be coated
    • C23C18/1851Pretreatment of the material to be coated of surfaces of non-metallic or semiconducting in organic material
    • C23C18/1872Pretreatment of the material to be coated of surfaces of non-metallic or semiconducting in organic material by chemical pretreatment
    • C23C18/1886Multistep pretreatment
    • C23C18/1889Multistep pretreatment with use of metal first
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31Coating with metals
    • C23C18/32Coating with nickel, cobalt or mixtures thereof with phosphorus or boron
    • C23C18/34Coating with nickel, cobalt or mixtures thereof with phosphorus or boron using reducing agents
    • C23C18/36Coating with nickel, cobalt or mixtures thereof with phosphorus or boron using reducing agents using hypophosphites
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition

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Abstract

A method of depositing a copper interconnection layer on a substrate such on a glass substrate for use e.g. in TFT-LCD flat panel interconnection system. The method according to the invention comprising the steps of: a) optionally cleaning the substrate, b) optionally micro-etching the substrate, c) depositing a catalyzation layer on the substrate to obtain a catalyzed substrate, d) conditioning the catalyzed substrate with a conditioning solution to obtain a conditioned catalyzed substrate, e) plating the catalyzed substrate with a NiP layer by contacting said substrate or at least a portion thereof with a wet bath mixture comprising precursors of Ni and P, f) depositing a copper catalyst layer onto the plated NiP layer, depositing a Cu layer on said copper catalyst layer.

Description

The electroless plating NiP that is used for copper interconnection layer adheres to and/or tectum
Technical field
The present invention relates to go up the settled layer copper interconnection layer to be used for for example method of TFT-LCD flat panel interconnection system in substrate (for example substrate of glass).More specifically, the present invention relates to make the method for TFT-LCD two-d display panel, this panel comprises the copper-connection bus, and it is used for being electrically connected with the signal electrode bus and the scan electrode bus of display panels (LCD) or plasma body or similar display panel by thin film transistor (TFT) each pixel with picture element matrix.
Background technology
The ultimate principle that can be used as the TFT-LCD of computer screen or television indicator is known.These for example are described in detail in KTK Scientific publishers Tokyo, chap.7, in 1987 by " lcd tv display: the principle of liquid crystal and application " that E.Kaneko showed.
In typical two-d display panel, for example in LCD or plasma panel, display material, for example liquid crystal or discharge gas (respectively) itself are clipped between the substrate of glass of two electrical isolations.Electrical interconnection line or bus arrangement apply voltage with counter electrode on a surface of at least one substrate of glass, have liquid crystal or discharge gas between electrode.
For example, in activity matrix LCD system, during the matrix form that has is arranged, a plurality of signals or data electrode wire or bus and a plurality of grid or scan electrode bus are arranged on a surface of a substrate of glass.
When data electrode and grid intersect mutually, at least one thin film transistor as switch (on-off) and pixel electrode is arranged, each line of matrix is activated in order so that the TFT switch cuts out, and with its corresponding data line connection of each pixel electrode in this line, provide signal information with the suitable color at the related pixel electrode, this and traditional C RT system class are seemingly.
When the size of display panel increased, the frequency of actuate signal needed to increase, thereby the stray capacitance of these lines is increased, and this transmission that means actuate signal again produces delay.
In order to reduce these delay phenomenons, for example at the 498-501 page or leaf of Japan Display ' 89, the article that is entitled as " the low resistance copper address wire that is used for TFT-LCD " proposes, because the resistivity of copper is much smaller than the resistivity of aluminium, thus use copper with substitution of Al as the grid material of thin film transistor and relevant matrix interconnection line or bus.This copper layer deposits by sputtering method, but because its ability that is attached to glass surface is not good, thereby tantalum layer in the middle of needing.
Know a kind of method of making this metal interconnecting layer on the glass surface of TFT-LCD display panel by US-B 6413845, it uses the Ni film that is deposited on glass surface by electroless plating, covers photic etching reagent film then so that this metal deposition is formed pattern.Then, deposited gold film on the Ni film is at last by electroless plating (wet deposition method) method depositing copper film on this gold layer, with the suitable copper-connection system of final acquisition.Yet the use of photic etching reagent has increased the cost of this method.
Those skilled in the art are also known, and copper tends at its sedimentary material layer internal diffusion, therefore, must provide a barrier layer in this substrate before being deposited on the copper layer in the substrate.Aforesaid method at Journal of the electronic society, among the 149-11-2002, is entitled as by people such as for example Osaka that " the nothing electricity nickel ternary that is applied to diffused barrier layer in the copper interconnection technology is along SiO 2And deposit " article in describe.Yet these films that are disclosed in this document can't be attached on the substrate of glass, and have bad thickness evenness under the disclosed condition in this article.
Therefore, still having now needs a kind of method of design, and this method can not be increased in sedimentary cost on the diffused barrier layer, and the good adhesion with substrate of glass is provided, and preferably also can be applicable to the cap layer deposition process of copper layer.
According to the present invention, found that sedimentary under certain conditions no electric NiP layer can be used for making adhering to tectum and all has good Cu resistance barrier ability.The homogeneity of also finding the roughness of these layers and thickness is satisfactory.
The interconnection and/or the grid structure that are made of Cu/NiP/ glass are made by no electric NiP and Cu plating.NiP layer plating is on substrate of glass, and so that adhering to and hindering barrier of Cu to be provided, and Cu layer plating is on NiP, as for example gate material.Find that the NiP layer has good adhesion property on substrate of glass, and the good barrier layer with respect performance that can avoid the copper diffusion.Find that also the roughness and the thickness evenness of NiP layer are satisfactory.X-ray analysis demonstration NiP is an amorphous, and has good thermostability.This NiP adhesion layer is an individual layer, and therefore, it realizes easily than the described lamination of US-B6413845, thereby compares with the method for other wet/dry and to have reduced production cost.
Summary of the invention
According to the present invention, deposition for example is used for that the method for the copper interconnection layer of TFT-LCD flat panel interconnection system may further comprise the steps in the substrate of for example substrate of glass:
A) randomly, with the substrate cleaning,
B) randomly, with the substrate microetch,
C) go up deposition Catalytic Layer (101) in substrate (100), with acquisition catalytic substrate (100,101),
D) nurse one's health this catalytic substrate with conditioning solution, with the catalytic substrate (100,101,102) of acquisition through conditioning,
E) by this substrate or its at least a portion are contacted with the wet bath mixture of the precursor of precursor that comprises Ni and P, plating does not have electric NiP layer (103) on this catalytic substrate, thereby obtains the catalytic substrate (100,101,102,103) through conditioning of plating NiP,
F) deposited copper catalyst layer (104) on this plating NiP layer, and
G) go up copper layer (105) at described copper catalyst layer (104).
Preferably, the step of this method (f) is undertaken by using silver or palladium salt deposition of thin silver layer (104) on described NiP layer, and copper layer (105) is then by using mantoquita such as CuSO 4Carry out plating and deposit.
The invention still further relates to base material, certain part covers Catalytic Layer, conditioning layer, NiP layer, copper catalyst layer and copper layer in order at least thereon.
The accompanying drawing summary
Describe the present invention with reference to the accompanying drawings in detail, as an example, these accompanying drawings are represented:
Fig. 1 represents the schematic top plan view of TFT-LCD display panel.
Fig. 2 is the synoptic diagram of switch matrix configuration.
Fig. 3 is the detail drawing of interconnection line between between TFT and electrode.
Fig. 4 illustration according to the present invention on a substrate of glass sectional view of copper layer.
Embodiment
Display panels system is made of a plurality of pixels that are arranged to matrix in substrate, and is covered by the thin layer of glass substrate, and it covers all pixels together.
Each pixel can be considered the square-shaped electrode system, and it has bottom and top transparent electrode, and is liquid crystal layer betwixt.It above transparency electrode the substrate of glass that is coated with polarization layer.
In order to have and structure like the traditional C RT system class, wherein covering shady shielding harness system combines with color dot and electron beam, be arranged to have by the matrix of the top of screen to the continuous horizontal sweep trace of bottom, this pixel system system arranges in a similar manner, and each line of pixel is activated (being scanned) in order, and each pixel in the line that has started receives the proportional electronic signal of pixel required color therewith at the apex electrode place.Therefore, each pixel needs one by sweep signal (line) switch driven, and it can be connected to the top electrodes of each pixel suitable voltage (signal source is usually via electrical condenser) when being activated.At present, suitable switch is thin film transistor (TFT), and it makes according to the MOS technology usually.
In order to make such TFT-FDP screen, thereby need make at interval with fixed, thin film transistor (MOS type) has drain electrode, source electrode and grid.
The drain electrode of each TFT is connected to the transparent pixels electrode usually, and source electrode is linked in the signal electrode bus that is made of copper at present, and grid is connected to the scan electrode bus.
On behalf of this, Fig. 1 line up 10,11 respectively ... 12; 20,21 ... 22; 30,31 ... 32; 40,41 ... the synoptic diagram of a plurality of pixels of 42.Switch S 10, S 11... S 12And S separately 40, S 41... S 41Be connected to sweep trace L via its gate separately 1, L 2, L 3... L 4, simultaneously, the source electrode separately of switch is connected to signal rows C 1, C 2... C 4, and the drain electrode of each TFT is connected to its pixel electrode separately.
Fig. 2 schematically illustrates the fundamental principle (duplicate numbers is indicated identical cognation) of switch matrix circuit.
Fig. 2 a represents basic TFT switch matrix, wherein every line L 1, L 2, L 3Be connected to the gate of MOS transistor, and each signal electrode line C 1, C 2, C 3Be connected to transistorized source electrode, this transistor drain then is connected to liquid crystal pixel electrodes, and other electrode is ground connection then.
The matrix arrangements that Fig. 2 b explanation is identical, different is the parallel pixel 10,11 that is connected in, the electrical condenser F of 12 electrode 1, F 2, F 3This system can apply voltage always between the electrode of pixel, and can change this voltage (that is color of color dot) when each line sweep.
Fig. 3 is the synoptic diagram of an interconnection system, in order to the matrix form interconnection system on the crossover location that is implemented in adjacent threads L and row C." scanning " interconnection line L has the small-sized extension 62 of the gate 63 that is linked to TFT66, and line L and TFT are deposited on the clear glass substrate.Interconnection line L produces electrical isolation via insulation layer 60 with signal (OK) line C (line C and interconnection line L intersect).Yet signal wire C is electrically connected with the source electrode 65 of TFT, drains simultaneously 64 to be electrically connected with pixel electrode 61.
The present invention relates to the mode (when they are made and be deposited on the substrate of glass by copper) of the copper grid of making TFT switch and scanning interconnection line L (and signal interconnection line C) basically.
Fig. 4 illustration according to the sectional view that is deposited on the copper layer of substrate of glass of the present invention.Substrate of glass 100 is coated with Catalytic Layer 101, conditioning layer 102, NiP layer 103, copper catalyst layer 104 and copper layer 105.
Hereinafter obtain the method for this interlayer with the way of example explanation.
According to preferred embodiment above-mentioned each step is described below.
Step (a): the cleaning of glass surface:
Use ultraviolet ray, ozone solution and/or skim soln, for example NaOH, Na 2CO 3, Na 3PO 4Mixture, lip-deep organic impurity is removed.When the surface is enough clean, if or this processing mode may damage substrate or cause the chemical reaction of unexpected property the time, can omit this step.For UV and/or ozonize, this step is preferably carried out 10 seconds to 10 minutes time, more preferably 30 seconds to 3 minutes.When using skim soln, this cleaning carries out time of preferred 30 seconds and 10 minutes 30 ℃ to 100 ℃ temperature, more preferably carries out 1 minute to 5 minutes at 50 ℃ to 90 ℃.Then, clean this substrate with the deionization pure water.
Step (b): the microetch of glass surface:
The purpose of this step is to produce little anchor on glass surface, is attached to suprabasil effect to strengthen the NiP layer.Can provide tack if this glass surface is enough coarse, if or this processing mode may on glass surface, cause deleterious reaction the time, can omit this step.Usually, this step comprises the HF (NH that also can comprise 10g/L to 100g/L of 0.1 volume % to 5 volume % by immersion 4F) in the aqueous solution 10 seconds to 5 minutes and carry out, or immerse usually and comprise the HF of 0.3 volume % to 3 volume % and the NH of 30g/L to 60g/L 4In the aqueous solution of F 30 seconds to 3 minutes.
Step (c): the Catalytic Layer of NiP:
Available SnCl 2And PdCl 2Solution carries out this step, to produce palladium layer as thin as a wafer on glass basic surface.For this reason, SnCl is immersed in substrate 2In the solution, with the flushing of D.I. water, afterwards it is immersed PdCl then 2In the solution.Preferred SnCl2 solution is for comprising 0.1 volume % to 10 volume %HCl and 0.1g/L to 50g/L SnCl 2The aqueous solution.PdCl 2Solution is by HCl that contains 0.01 volume % to 5 volume % and the PdCl of 0.01g/L to 5g/L 2The aqueous solution make.More preferably, SnCl 2Solution comprises the SnCl that is dissolved in the 1g/L to 20g/L in 0.5% to the 5%HCl solution 2, and PdCl 2Solution then comprises the PdCl that is dissolved in the 0.1g/L to 2g/L in 0.05% to the 1%HCl solution 2Following chemical reaction: Sn may take place in expectation on glass surface 2++ Pd 2+
Figure A200680055001D0008100950QIETU
Sn 4++ Pd.
Step (d): conditioning:
Usually use the aqueous solution that comprises reductive agent to carry out this step.Found that this step is for obtaining the steps necessary of even NiP plating layer.The reducible lip-deep oxidisability Sn of this step 4+, and promote reductibility NiP electroplating chemical.This step is undertaken by immerse forming to be similar to used solution in the following step (e) but not comprise in the solution of Ni salt.Use comprises 5g/L to 50g/L NaH 2PO 2Solution.This program was carried out 10 seconds to 3 minutes usually.
Step (e): NiP plating:
Use NiSO 4And NaH 2PO 2Source as Ni and P.NaH 2PO 2Also as reductive agent.Complexing agent is selected from the have carboxyl organic compound and composition thereof of (COOX:X is H, metal, alkyl).More typically, it is selected from acetate, tartrate, oxyacetic acid, lactic acid and composition thereof.If necessary, adjust the pH value of solution with the pH damping fluid.In a specific examples, use the NiSO that comprises 10g/L to 45g/L 47H 2The NaH of O, 3g/L to 50g/L 2PO 2H 2O, 5mL/L to 50mL/L oxyacetic acid (70%) and the tartaric solution of 3g/L, and with the substrate immersion wherein.The lead compound that can add 0.5ppm to 10ppm is as stablizer.Temperature that plating is bathed and pH value respectively in 50 ℃ to 90 ℃ and 2 to 9 scope, more typically, in 70 ℃ to 90 ℃ and 2 to 6 scope.The time of plating can determine according to the speed of plating and desired thickness, usually, be 30 seconds to 1 minute under the situation that is the NiP layer.At last, with D.I. water washing substrate.
Step (f): the catalysis of Cu:
Substrate of glass is dipped in AgNO 3At NH 4Among the OH, PdCl 2In HCl or Pd (NH 3) 4Cl 2At NH 4Solution among the OH is to make silver or palladium layer as thin as a wafer on the NiP surface.More generally use 0.1g/L to 10g/L AgNO 30.01% to 1%NH 4Solution among the OH.This step is carried out 10 seconds to 5 minute usually, more preferably 30 seconds to 1 minute.As for the palladium layer, use in 0.01% to 5% HCl, to contain 0.01g/L to 5g/L PdCl 2Solution.More preferably, the PdCl of 0.1g/L to 2g/L 2Be dissolved in 0.05% to the 1%HCl solution.In other specific examples, use 0.1g/L to 10g/L Pd (NH 3) 4Cl is at 0.1% to 5% NH 4Solution among the OH.Then, if the non-conformity of quality of plating Cu closes when requiring, also can carry out reduction step.Usually the HCHO solution of use 0.1% to 5% is 10 seconds to 5 minutes, more generally uses 0.5% to 3% HCHO solution.Usually can use DMAB (dimethyamine borane) solution 30 seconds to 5 minutes of 0.1g/L to 5g/L to replace HCHO solution, more generally use the DMAB solution 1 minute to 3 minutes of 0.5g/L to 3g/L.
Step (g): plating Cu:
The copper plating solution comprises copper source, complexing agent, reductive agent and pH damping fluid.Usually use the CuSO of 2g/L to 15g/L 4As the Cu source.Complexing agent is selected from EDTAS, tartrate, Citrate trianion, diamines, sugar alcohol and composition thereof.In a specific examples, use 20g/L to 60g/L Seignette salt.Reductive agent is selected from aldehyde, amine, diamine, amido borine, oxoethanoic acid, xitix, hypophosphite and composition thereof.In specific examples, use 0.05% to 1% HCHO.Can add the Ni compound in case of necessity (is the NiCl of 0.1g/L to 10g/L 2) to promote the Cu plating.The sulphur compound that can add 0.1ppm to 2ppm is as stablizer.The available for example NaOH of the pH value of solution is adjusted at 9 to 13 scope.The time of plating is according to the speed of plating and desired thickness and determine; For the Cu layer of hundreds of nanometers, be generally 1 minute to 60 minutes, be more typically 5 minutes to 40 minutes.
According to another specific examples of the present invention, can on the Cu layer, deposit the NiP layer as covering or protective layer by repeating step (c) to (e) (in the preceding cleaning that can carry out copper of step (c)) preferably.
Understand the present invention better by following embodiment and Comparative Examples.
Embodiment 1
Substrate of glass is comprised NaH, Na 80 ℃ of immersions 2CO 3, Na 3PO 4Skim soln in 3 minutes, so that the organic impurity on it is removed.Behind deionized water rinsing, it is immersed rare HF/NH 4In the HF solution 1 minute, on this surface, to make little anchor.With after the D.I. water flushing, it is immersed in comprises 10g/L SnCl in the 1%HCl solution 2SnCl 2In the solution, be immersed in then in the 0.1% HCl solution and comprise 0.3g/L PdCl 2PdCl 2In (solution), in these two kinds of solution, respectively immersed 2 minutes.After washing this substrate with D.I. water, its immersion is contained in the conditioning solution of reductive agent 30 seconds.Then, it is immersed in the NiP plating solution.Table 1 has shown composition and the plating condition that plating is bathed.
Table 1
Form Condition
NiSO 4·7H 2O:30g/L Be adjusted to pH5 with acetate buffer
NaH 2PO 2·H 2O:30g/L Temperature: 70 ℃
Lactic acid: 15mL/L
Tartrate: 15g/L
Lead acetate 3H 2O:1.5ppm
After the flushing of D.I. water, this substrate is immersed in 0.3% NH 4Contain 1.5g/LAgNO in the OH solution 3AgNO 3In the solution 45 seconds.After washing this substrate with D.I. water, it is immersed in the Cu plating solution, this plating solution and corresponding plating condition thereof are as shown in table 2:
Table 2
Form Condition
CuSO 4·5H 2O:7g/L Be adjusted to pH 12 with NaOH
C 4H 4NaO 6·5H 2O:34g/L Room temperature
Na 2CO 3:3g/L
NiCl 2:1g/L
HCHO(37%):13g/L
Thiocarbamide: 0.2ppm
Confirm that by carrying out " adhesive tape " test (nothing is peeled off) the Cu/NiP layer of plating has excellent tack for substrate of glass.Two-layer roughness and thickness evenness meet the requirements (be respectively be lower than 5nm and in 5%).The NiP film is made of the Ni of 91 weight % and the P of 9 weight %.X-ray analysis shows that NiP is an amorphous.The copper layer of plating on the NiP layer has low resistivity (2.6 μ Ω cm).X-ray analysis shows that also these two NiP and Cu layer have good thermal resistance, be 400 ℃ following 1 hour, and the copper that diffuses to the NiP layer behind thin heating steps can be ignored.
Comparative Examples 1
On same glass substrate,, but do not comprise the step of deposition NiP layer with the plating coating copper layer in steps of employed institute among the embodiment 1.The copper layer that is obtained demonstrates tack bad on substrate of glass, and it easily is stripped from.
Comparative Examples 2
As carry out the deposition of NiP and Cu layer as described in the embodiment 1 in the mode that is similar to embodiment 1, different is not carry out step (a), or the solution temperature of step (a) is lower than 30 ℃.Coating demonstrates the not good and shortage reproducibility of homogeneity, because the not enough cleaning in surface.
Comparative Examples 3
Carry out among the embodiment 1 except step (b) institute in steps.Many NiP layers show bad to the tack of substrate.
Comparative Examples 4
On substrate of glass, carry out embodiment 1 described step (a) and (b).Omit step (c), then as tentatively carrying out step (d) and (e) as described in the embodiment 1.Yet no NiP is deposited on this substrate of glass.
Comparative Examples 5
Carry out various Comparative Examples according to embodiment 1, the SnCl that different is in step (c) 2Concentration or be lower than 0.1g/L or be higher than 50g/L, perhaps PdCl 2Concentration or be lower than 0.01g/L or be higher than 5g/L.In all these examples, no NiP layer plating is in this substrate, and perhaps, when plating, the NiP layer demonstrates not good homogeneity, bad tack and/or lacks reproducibility.
Comparative Examples 6
In on substrate of glass, carry out step 1 institute in steps, different is not carry out step (d), perhaps NaH 2PO 2The employed concentration of solution or be lower than 5g/L or be higher than 50g/L.In all these different situations, no NiP layer plating is in this substrate, even perhaps on the plating, this NiP layer also demonstrates not good thickness evenness, bad tack and/or lacks reproducibility.
Comparative Examples 7
Carry out each example according to embodiment 1, that different is NiSO 47H 2O, NaH 2PO 2H 2The concentration of O, lactic acid, oxyacetic acid, tartrate and lead compound is not in each scope that above-mentioned steps (e) is defined.No NiP layer plating is in this substrate, even perhaps promptly be on the plating, this NiP layer also demonstrates not good homogeneity, bad tack and/or lacks reproducibility.
Comparative Examples 8
Carry out various examples to be similar to embodiment 1 described mode, temperature that the NiP plating bathes that different is is lower than 50 ℃ or be higher than 90 ℃.In some cases, no NiP layer plating is in this substrate, and perhaps when on the plating, this NiP layer demonstrates not good thickness evenness and/or lacks reproducibility.
Comparative Examples 9
Carry out various examples according to embodiment 1, pH value that the NiP plating bathes that different is is adjusted at and is lower than 2 or be higher than 9.In all these different instances, no NiP layer plating is in this substrate, and perhaps when on the plating, this NiP layer demonstrates not good homogeneity, bad tack and/or lacks reproducibility.
Comparative Examples 10
Carry out each step of embodiment 1, but do not carry out step (f), in the case, no Cu layer plating is on the NiP layer.
Comparative Examples 11
Carry out various examples similar to Example 1, that different is AgNO in step (f) 3Concentration is lower than 0.1g/L or is higher than beyond the 10g/L.Do not have Cu layer on the plating, even perhaps plating, the copper layer also demonstrates not good thickness evenness, bad tack, resistivity and/or lacks reproducibility.
Comparative Examples 12
Carry out various examples according to embodiment 1, different is to use PdCl in step (f) 2Solution in HCl or Pd (NH 3) 4Cl 2At NH 4Solution among the OH replaces AgNO 3At NH 4Solution among the OH.This step is used 0.3g/L PdCl 2In 0.1%HCl or 0.25g/LPd (NH 3) 4Cl 2At 2% NH 4Solution impregnation among the OH 3 minutes and finishing.The Cu layer of plating demonstrates thickness evenness, tack, resistivity and the reproducibility suitable with embodiment 1.
Comparative Examples 13
Carry out various examples similar to Example 1, that different is CuSO 45H 2O, C 4H 4KNNaO 65H 2In the scope separately that the concentration of O, Ni compound, HCHO and/or sulphur compound is not defined in above-mentioned steps (g) respectively.No Cu layer plating perhaps, demonstrates not good homogeneity, bad tack, high resistivity and/or lacks reproducibility when time on the plating in this substrate.
Comparative Examples 14
Carry out various examples similar to Example 1, the pH value that different is bathes the Cu plating is adjusted at and is lower than 9 or be higher than 13.
No Cu layer plating also demonstrates not good homogeneity, bad tack, high resistivity and/or lacks reproducibility even perhaps plate in substrate.

Claims (4)

1, a kind of in substrate, for example on substrate of glass, deposition is used for for example method of the copper interconnection layer of TFT-LCD flat panel interconnection system, and it may further comprise the steps:
A) randomly, with the substrate cleaning,
B) randomly, with the substrate microetch,
C) go up deposition Catalytic Layer (101) in substrate (100), with acquisition catalytic substrate (100,101),
D) nurse one's health this catalytic substrate with conditioning solution, with the catalytic substrate (100,101,102) of acquisition through conditioning,
E) by this substrate or its at least a portion are contacted with the wet bath mixture of the precursor of precursor that comprises Ni and P, plating does not have electric NiP layer (103) on this catalytic substrate, thereby obtains the catalytic substrate (100,101,102,103) through conditioning of plating NiP,
F) deposited copper catalyst layer (104) on this plating NiP layer, and
G) go up copper layer (105) at described copper catalyst layer (104).
2, according to the process of claim 1 wherein that described step f) undertaken by using silver salt deposition of thin silver layer (104) on described NiP layer.
3, according to the method for claim 1 or 2, wherein said Cu layer (105) is to use mantoquita, for example CuSO 4, sedimentary by plating.
4, a kind of base material (100), certain part covers Catalytic Layer (101), conditioning layer (102), NiP layer (103), copper catalyst layer (104) and copper layer (105) in regular turn at least thereon.
CNA200680055001XA 2006-06-16 2006-06-16 Electroless plating NiP adhering and/or covering layer for copper wiring layer Pending CN101466869A (en)

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CN102776495B (en) * 2012-07-13 2014-05-07 南京航空航天大学 Chemical nickel-plating method for capacitive touch screen indium tin oxide (ITO) wiring

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US6835895B1 (en) * 1996-12-19 2004-12-28 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
JP2000357671A (en) * 1999-04-13 2000-12-26 Sharp Corp Method of manufacturing metal wiring
JP4613271B2 (en) * 2000-02-29 2011-01-12 シャープ株式会社 METAL WIRING, MANUFACTURING METHOD THEREOF, AND THIN FILM TRANSISTOR AND DISPLAY DEVICE USING THE METAL WIRING
JP3707394B2 (en) * 2001-04-06 2005-10-19 ソニー株式会社 Electroless plating method
JP3808037B2 (en) * 2001-05-15 2006-08-09 インターナショナル・ビジネス・マシーンズ・コーポレーション Method for electroless deposition and patterning of metal on a substrate
JP2003264159A (en) * 2002-03-11 2003-09-19 Ebara Corp Catalyst treatment method and catalyst treatment solution

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CN101967630B (en) * 2009-07-28 2012-07-25 中国科学院金属研究所 Method for preparing catalyst layer on surface of magnesium and magnesium alloy by chemical plating of nickel and nickel-phosphorus alloy
CN105706222A (en) * 2013-11-21 2016-06-22 株式会社尼康 Wiring-pattern manufacturing method and transistor manufacturing method
CN105706222B (en) * 2013-11-21 2018-11-23 株式会社尼康 The manufacturing method of wiring pattern and the manufacturing method of transistor

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