TW200731440A - Flip chip mounting shift inspection method and mounting apparatus - Google Patents

Flip chip mounting shift inspection method and mounting apparatus

Info

Publication number
TW200731440A
TW200731440A TW095114659A TW95114659A TW200731440A TW 200731440 A TW200731440 A TW 200731440A TW 095114659 A TW095114659 A TW 095114659A TW 95114659 A TW95114659 A TW 95114659A TW 200731440 A TW200731440 A TW 200731440A
Authority
TW
Taiwan
Prior art keywords
mounting
chip
shift
alignment mark
flip chip
Prior art date
Application number
TW095114659A
Other languages
Chinese (zh)
Other versions
TWI371072B (en
Inventor
Terada Katsumi
Nishimura Koji
Arai Yoshiyuki
Original Assignee
Toray Eng Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2005133475 external-priority
Application filed by Toray Eng Co Ltd filed Critical Toray Eng Co Ltd
Publication of TW200731440A publication Critical patent/TW200731440A/en
Application granted granted Critical
Publication of TWI371072B publication Critical patent/TWI371072B/zh

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04Mounting of components, e.g. of leadless components
    • H05K13/046Surface mounting
    • H05K13/0465Surface mounting by soldering
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/08Monitoring manufacture of assemblages
    • H05K13/081Integration of optical monitoring devices in assembly lines; Processes using optical monitoring devices specially adapted for controlling devices or machines in assembly lines
    • H05K13/0812Integration of optical monitoring devices in assembly lines; Processes using optical monitoring devices specially adapted for controlling devices or machines in assembly lines the monitoring devices being integrated in the mounting machine, e.g. for monitoring components, leads, component placement
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/5442Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54426Marks applied to semiconductor devices or parts for alignment
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/5448Located on chip prior to dicing and remaining on chip after dicing
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81121Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]

Abstract

The present invention provides a mounting ship inspection method of flip chip and mounting apparatus realizing the same. In a flip chip mounting shift inspecting method, the images of an alignment mark of a chip and a first corner section of the chip viewed from a direction of recognizing the alignment mark of the chip are recognized by a first CCD camera prior to mounting. After mounting, the images of an alignment mark of a substrate and a second corner section at a position same as that of the corner section of the chip are recognized by a second CCD camera in a direction opposite to a circuit plane of the chip. The relative positional relationship between the alignment marks of the substrate and the chip is calculated, with the first and the second corner sections as references, and a mounting shift from a prescribed mounting position relationship is calculated to determine if a mounting shift conformity is good. A mounting apparatus for performing such method is also provided. In the conventional technologies, inspections are performed off-line by means of an X-ray camera apparatus or an infrared microscope, and the operation time is difficult to be shortened and the full inspection is not easily performed. The present invention enables to perform desired mounting shift inspection with a simple structure and to remarkably shorten the process.
TW095114659A 2005-04-28 2006-04-25 TWI371072B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005133475 2005-04-28

Publications (2)

Publication Number Publication Date
TW200731440A true TW200731440A (en) 2007-08-16
TWI371072B TWI371072B (en) 2012-08-21

Family

ID=37307820

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095114659A TWI371072B (en) 2005-04-28 2006-04-25

Country Status (3)

Country Link
JP (1) JP4768731B2 (en)
TW (1) TWI371072B (en)
WO (1) WO2006118018A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI626704B (en) * 2016-08-29 2018-06-11 樹德科技大學 Automatic ic transporting system with image recognition function and transporting method thereof
TWI671839B (en) * 2017-07-31 2019-09-11 日商精工愛普生股份有限公司 Electronic component conveying device and inspection device, positioning device and method, and component conveying device

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009096454A1 (en) * 2008-01-30 2009-08-06 Toray Engineering Co., Ltd. Chip mounting method and chip mounting apparatus
EP2284862A1 (en) * 2009-08-11 2011-02-16 Nederlandse Organisatie voor toegepast -natuurwetenschappelijk onderzoek TNO System and method for picking and placement of chip dies
JP5779386B2 (en) * 2011-04-19 2015-09-16 富士機械製造株式会社 Electrical component mounting machine
JP6272676B2 (en) 2013-11-07 2018-01-31 東レエンジニアリング株式会社 Bonding equipment
JP6411823B2 (en) * 2014-09-09 2018-10-24 ボンドテック株式会社 Chip alignment method and chip alignment apparatus
KR20180010378A (en) 2016-07-20 2018-01-31 삼성전자주식회사 method for detecting misalignment of chips, manufacturing method of fan-out panel level package using the same, and fan-out panel level package
JP6723648B2 (en) * 2016-07-27 2020-07-15 住友重機械工業株式会社 Position detection device and position detection method
JP6307730B1 (en) * 2016-09-29 2018-04-11 株式会社新川 Semiconductor device manufacturing method and mounting apparatus
JP7045891B2 (en) 2018-03-20 2022-04-01 キオクシア株式会社 Semiconductor manufacturing method, semiconductor manufacturing equipment and semiconductor equipment

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0587949U (en) * 1992-04-24 1993-11-26 セイコー電子工業株式会社 Semiconductor chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI626704B (en) * 2016-08-29 2018-06-11 樹德科技大學 Automatic ic transporting system with image recognition function and transporting method thereof
TWI671839B (en) * 2017-07-31 2019-09-11 日商精工愛普生股份有限公司 Electronic component conveying device and inspection device, positioning device and method, and component conveying device

Also Published As

Publication number Publication date
JPWO2006118018A1 (en) 2008-12-18
TWI371072B (en) 2012-08-21
WO2006118018A1 (en) 2006-11-09
JP4768731B2 (en) 2011-09-07

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees