JPH0587949U - Semiconductor chip - Google Patents

Abstract

(57) [Summary] [Structure] In the semiconductor chip A1 for face-down bonding, a visually recognizable alignment cross mark 4 is provided on the back surface 3 opposite to the active surface corresponding to the substrate A2.
And the substrate-side cross mark 5 is formed at a position corresponding to the chip-side cross mark 4 on the substrate A2. [Effect] When the semiconductor chip is mounted, by performing alignment using the guide mark on the back surface, the mark on the substrate, the pattern, etc., face-down bonding with high positional accuracy can be realized by a simple method.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a semiconductor chip.

[0002]

[Prior Art]

 Conventionally, it has been known that a semiconductor chip in which an active element is formed only on one surface has no recognizable mark or the like on the back surface. When mounting this semiconductor chip with its active surface facing the substrate side (face-down bonding), the following two methods have been conventionally known. FIG. 5 is a perspective view showing a first conventional example among them. This is a method of mounting the semiconductor chip D19 having no mark on the back surface 3 on the substrate D20 with the outer shape guide mark 21 and the corners of the semiconductor chip D19 aligned with each other on the lower side of the active surface. This is a method based on a so-called outer shape guide, which is based on the so-called outer shape of dicing of a semiconductor chip. Further, FIG. 6 shows a second conventional example. In this method, the pattern of the active surface 27 of the semiconductor chip D19 is monitored by the vision recognition camera 25 above the substrate E24 using the mirror A22 and the mirror B23. The chip holding tool 26 is lowered and mounted by escaping from between 24. This is a mounting method using pattern recognition technology.

[0003]

[Problems to be solved by the device]

 However, when the conventional semiconductor chip is mounted by face-down bonding, the positional accuracy of the semiconductor chip with respect to the substrate has not been sufficient for performing narrow-pitch high-density mounting. The positional relationship between the semiconductor chip and the substrate when mounted by the outline guide as in Conventional Example 1 shown in FIG. 5 is affected by the scribing accuracy of the semiconductor chip, and an error of about 30 μm inevitably occurs. , It is difficult to achieve high precision.

Further, when the pattern of the active surface of the semiconductor chip facing the substrate side is used as a guide as in the conventional example 2 shown in FIG. 6, the optical path for monitoring the pattern becomes complicated. Moreover, when the pattern recognition is completed, the mirror has to be moved out of the range of the semiconductor chip, and the semiconductor chip must be moved downward and then mounted on the substrate. It is expensive and takes a long time (cycle time) from alignment to mounting. In addition, since the pattern of the active surface of the semiconductor chip is aligned at a distance where it can be monitored and then the substrate is approached, an error occurs when approaching the substrate. In addition, after mounting, the correct position using the pattern is used. Will be impossible to confirm. Therefore, the conventional semiconductor chip has a limit of about 200 μm pitch pattern. Conventional semiconductor chips have many problems as described above.

Therefore, in order to solve such a conventional problem, the present invention is capable of performing mounting and position inspection with high positional accuracy capable of supporting narrow-pitch high-density mounting by a simple method even in face-down bonding. The aim is to obtain a semiconductor chip that will be possible.

[0006]

[Means for Solving the Problems]

 In order to solve the above-mentioned problems, the present invention forms a semiconductor chip having an active element formed on at least one surface on the back surface so that a visually recognizable pattern or pattern is formed on the substrate. By using it as a guide for accurate mounting, we have made it possible to realize highly accurate mounting and position inspection with a simple method even for face-down bonding.

[0007]

[Action]

 In the semiconductor chip configured as described above, the pattern on the substrate and the pattern on the back surface of the semiconductor chip face the same direction when face-down bonding the semiconductor chip. It becomes possible to align the different patterns without the need for complicated optical paths such as mirrors. Therefore, if the pattern on the back surface of the semiconductor chip is sufficiently accurate with respect to the pattern on the active surface, the mounting machine with a simple structure can perform highly accurate positioning. Further, since the pattern on the back surface of the semiconductor chip can be monitored even after mounting, it is possible to inspect the mounting position by measuring the deviation from the pattern on the substrate.

[0008]

【Example】

 An embodiment of the present invention will be described below with reference to the drawings. 1 is a perspective view showing a first embodiment of a semiconductor chip according to the present invention. Four chip-side cross marks 4 which can be visually recognized are formed at four corners of the back surface 3 of the semiconductor chip A1. The chip-side cross mark 4 has a high positional accuracy of 3 μm or less with respect to the pattern and electrode of the active surface (not shown) on the opposite side of the back surface 3 by using a double-side aligner used for pattern exposure of a double-sided IC, for example. It can be formed with. The shape of the mark may be any shape other than a cross, such as a quadrangle or a triangle, as long as it can be used for alignment.

On the other hand, the board-side cross mark 5 is formed at four places so as to have a predetermined positional relationship with the chip-side cross mark 4 when the semiconductor chip A1 is mounted in a correct position. When mounting the semiconductor chip A1 on the substrate A2 with the lower surface of the active surface, the semiconductor chip A1 is first placed at an approximate position of the substrate A2, and the four cross marks 5 on the substrate side and the four cross marks 4 on the chip side are respectively placed. By recognizing the vision and correcting the position of the chip so that the relative positions of the cross mark 5 on the substrate side and the cross mark 4 on the chip side are exactly aligned, the position of the substrate electrode 6 and the active surface side of the semiconductor chip A1 are It can be mounted with the electrodes positioned exactly. At this time, for vision recognition, since the position of the cross mark 5 on the substrate side and the cross mark 4 on the chip side can be directly observed from above with a camera or a microscope, a complicated path such as a mirror is not necessary.

Further, since the mounting with high positional accuracy becomes possible, it becomes possible to support high density mounting with a pitch pattern of 100 μm or less and a narrow wiring pitch, and mounting of a sensor IC that requires high positional accuracy. Further, by measuring the positions of the chip-side cross mark 4 and the board-side cross mark 5 after mounting, the mutual positional relationship between the pattern and electrode of the active surface of the semiconductor chip A1 and the substrate electrode 6 of the substrate A2 that cannot be visually observed actually. Therefore, the position inspection can be performed accurately.

FIG. 2 is a perspective view of a semiconductor chip according to a second embodiment of the present invention. Six substrate electrodes 6 are formed on the substrate B9, three on each side, and six substrate wirings 7 are formed in parallel with each other in the longitudinal direction of the substrate B9, that is, in the X direction. Further, four board-side X-direction alignment lines 12 are formed in a direction (Y direction) perpendicular to the board wiring 7. On the other hand, on the back surface 3 of the semiconductor chip B8, there are three chip side Y-direction alignment lines 10 that are on the same straight line as the board wiring 7 during mounting, and chip-side X-direction alignment lines 12 Four lines 11 are formed with high positional accuracy with respect to the active surface as in the first embodiment.

When face-down bonding the semiconductor chip B8 to the substrate B9, the patterns of the semiconductor chip B8 and the substrate B9 are visually recognized from above, and the X direction is aligned with the substrate side X direction alignment line 12 and the chip side X direction alignment. By aligning the line 11 with the board wiring 7 in the Y direction and the chip side Y-direction alignment line so as to be aligned with each other, high-position accuracy mounting can be achieved. After mounting, the mounting position can be easily inspected by measuring the deviation of each line. As in the present embodiment, it is possible to perform alignment by using a wiring pattern on the substrate or a linear pattern formed on the substrate or the semiconductor chip as a reference mark.

Specifically, the mark on the back surface of the semiconductor chip and the mark on the substrate are currently aligned manually with a dedicated jig having a precision XY table, but mechanization by a robot having a chip mounter is also experimental. Has been confirmed. 3 and 4 show an example of a third embodiment according to the present invention in which a semiconductor chip (double-sided IC) having active elements on both sides is used. FIG. 3 is a perspective view of the third embodiment before mounting. Here, the surface of the semiconductor chip C13 facing the substrate side (lower side) is the front surface, and the surface facing the upper side is the back surface 3. On the back surface 3 of the semiconductor chip C13, a chip back surface pattern 28 (partially omitted) including active elements and a chip back surface electrode 15 are formed. Further, an active pattern (not shown) and bump electrodes 18 are formed on the surface.

On the other hand, the substrate C14 has a substrate wire bonding electrode 16 for establishing conduction with the chip back surface electrode 15 on the back surface 3 of the semiconductor chip C13 and a bump electrode 18 for establishing electrical connection with the bump electrode 18 on the front surface. Substrate bump electrodes 17 and substrate wirings 7 are formed. When the semiconductor chip C13 is mounted on the substrate C14, the chip back surface pattern 28 or the chip back surface electrode 15 and the board wiring 7 or the board wire bonding electrode 16 are used as a standard for alignment, and their relative positional relationship is correct. It is possible to mount with high position accuracy by aligning so that Further, an electrode or wiring can be used as the reference mark for alignment as in this embodiment, or a dedicated alignment mark or line can be provided as in the first and second embodiments.

FIG. 4 is a perspective view after mounting the third embodiment. The back surface 3 of the semiconductor chip C13 is electrically connected to the board C14 by wire bonding between the chip back surface electrode 15 and the board wire bonding electrode 16. The surface of the semiconductor chip C13 is electrically connected to the substrate C14 by the bumps of the bump electrodes 18 being pressure-bonded to the substrate bump electrodes 17.

[0016]

[Effect of the device]

 As described above, this invention forms a recognizable pattern on the back surface of the semiconductor chip and uses it as a reference mark when mounting the semiconductor chip on the substrate accurately. This enables not only mounting of semiconductor chips that require high positioning accuracy, such as sensors, but the conventional example has a limit of about 200 μm pitch pattern. However, the present invention can handle 100 μm or less and can realize high-density mounting with a narrow wiring pitch of 1/2 or less. Furthermore, since the mirror operation time in the conventional example can be omitted, mounting can be performed at about twice the speed. It is possible, and there is an effect that a device using a semiconductor can be miniaturized and highly functionalized.

[Brief description of drawings]

FIG. 1 is a perspective view of a semiconductor chip according to a first embodiment of the present invention.

FIG. 2 is a perspective view of a semiconductor chip according to a second embodiment of the present invention.

FIG. 3 is a perspective view of a semiconductor chip according to a third embodiment of the present invention before mounting.

FIG. 4 is a perspective view after mounting a semiconductor chip according to a third embodiment of the present invention.

FIG. 5 is a perspective view of Example 1 of a conventional semiconductor chip.

FIG. 6 is a front view of Example 2 of a conventional semiconductor chip.

[Explanation of symbols]

 1 Semiconductor Chip A 2 Substrate A 3 Back Side of Semiconductor Chip 4 Cross Mark on Chip Side 5 Cross Mark on Board Side 6 Board Electrode 7 Board Wiring 8 Semiconductor Chip B 9 Board B 10 Chip Y Side Alignment Line 11 Chip Side X Alignment Line 12 Board Side X direction alignment line 13 Semiconductor chip C 14 Substrate C 15 Chip back surface electrode 16 Substrate wire bonding electrode 17 Substrate bump electrode 18 Bump electrode 19 Semiconductor chip D 20 Substrate D 21 External shape guide mark 22 Mirror A 23 Mirror B 24 Substrate E 25 Vision Recognition Camera 26 Chip Holding Tool 27 Semiconductor Chip Active Surface 28 Chip Backside Pattern

Claims (1)

[Scope of utility model registration request] 1. A semiconductor chip having an active element formed on at least one surface thereof, and a visually recognizable one such as a positioning pattern or a pattern is formed on the other surface. Semiconductor chip.