TW200729408A - Dense chevron finFET and method of manufacturing same - Google Patents
Dense chevron finFET and method of manufacturing sameInfo
- Publication number
- TW200729408A TW200729408A TW095134198A TW95134198A TW200729408A TW 200729408 A TW200729408 A TW 200729408A TW 095134198 A TW095134198 A TW 095134198A TW 95134198 A TW95134198 A TW 95134198A TW 200729408 A TW200729408 A TW 200729408A
- Authority
- TW
- Taiwan
- Prior art keywords
- finfet
- fin
- mask
- manufacturing same
- alignment
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/011—Manufacture or treatment comprising FinFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
- H10D86/215—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI comprising FinFETs
Landscapes
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/162,663 US7323374B2 (en) | 2005-09-19 | 2005-09-19 | Dense chevron finFET and method of manufacturing same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW200729408A true TW200729408A (en) | 2007-08-01 |
Family
ID=37883218
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW095134198A TW200729408A (en) | 2005-09-19 | 2006-09-15 | Dense chevron finFET and method of manufacturing same |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US7323374B2 (enExample) |
| EP (1) | EP1935020A4 (enExample) |
| JP (1) | JP5203948B2 (enExample) |
| KR (1) | KR101006120B1 (enExample) |
| CN (1) | CN101836280A (enExample) |
| TW (1) | TW200729408A (enExample) |
| WO (1) | WO2007035788A2 (enExample) |
Families Citing this family (60)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7253650B2 (en) * | 2004-05-25 | 2007-08-07 | International Business Machines Corporation | Increase productivity at wafer test using probe retest data analysis |
| EP1804282A1 (en) * | 2005-12-29 | 2007-07-04 | Interuniversitair Microelektronica Centrum vzw ( IMEC) | Methods for manufacturing dense integrated circuits |
| US7510939B2 (en) * | 2006-01-31 | 2009-03-31 | International Business Machines Corporation | Microelectronic structure by selective deposition |
| US7902074B2 (en) * | 2006-04-07 | 2011-03-08 | Micron Technology, Inc. | Simplified pitch doubling process flow |
| US7498265B2 (en) * | 2006-10-04 | 2009-03-03 | Micron Technology, Inc. | Epitaxial silicon growth |
| US8735990B2 (en) * | 2007-02-28 | 2014-05-27 | International Business Machines Corporation | Radiation hardened FinFET |
| US7612405B2 (en) * | 2007-03-06 | 2009-11-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fabrication of FinFETs with multiple fin heights |
| US7560785B2 (en) | 2007-04-27 | 2009-07-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device having multiple fin heights |
| US7847320B2 (en) * | 2007-11-14 | 2010-12-07 | International Business Machines Corporation | Dense chevron non-planar field effect transistors and method |
| US7759179B2 (en) | 2008-01-31 | 2010-07-20 | International Business Machines Corporation | Multi-gated, high-mobility, density improved devices |
| US20090283829A1 (en) * | 2008-05-13 | 2009-11-19 | International Business Machines Corporation | Finfet with a v-shaped channel |
| DE102008030864B4 (de) * | 2008-06-30 | 2010-06-17 | Advanced Micro Devices, Inc., Sunnyvale | Halbleiterbauelement als Doppelgate- und Tri-Gatetransistor, die auf einem Vollsubstrat aufgebaut sind und Verfahren zur Herstellung des Transistors |
| KR101037522B1 (ko) * | 2008-09-19 | 2011-05-26 | 주식회사 하이닉스반도체 | 경사진 실리콘 격자구조의 웨이퍼 |
| US7829951B2 (en) * | 2008-11-06 | 2010-11-09 | Qualcomm Incorporated | Method of fabricating a fin field effect transistor (FinFET) device |
| JP2010206112A (ja) * | 2009-03-05 | 2010-09-16 | Renesas Electronics Corp | 半導体装置 |
| US20100308409A1 (en) * | 2009-06-08 | 2010-12-09 | Globalfoundries Inc. | Finfet structures with fins having stress-inducing caps and methods for fabricating the same |
| US8440517B2 (en) | 2010-10-13 | 2013-05-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET and method of fabricating the same |
| US8629478B2 (en) * | 2009-07-31 | 2014-01-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fin structure for high mobility multiple-gate transistor |
| US8980719B2 (en) | 2010-04-28 | 2015-03-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for doping fin field-effect transistors |
| US8482073B2 (en) * | 2010-03-25 | 2013-07-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit including FINFETs and methods for forming the same |
| US8227304B2 (en) * | 2010-02-23 | 2012-07-24 | International Business Machines Corporation | Semiconductor-on-insulator (SOI) structure and method of forming the SOI structure using a bulk semiconductor starting wafer |
| US9000525B2 (en) | 2010-05-19 | 2015-04-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for alignment marks |
| JP2012023212A (ja) * | 2010-07-14 | 2012-02-02 | Sumitomo Electric Ind Ltd | 半導体装置 |
| US8617937B2 (en) * | 2010-09-21 | 2013-12-31 | International Business Machines Corporation | Forming narrow fins for finFET devices using asymmetrically spaced mandrels |
| US8769446B2 (en) * | 2010-11-12 | 2014-07-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and device for increasing fin device density for unaligned fins |
| US8633076B2 (en) * | 2010-11-23 | 2014-01-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for adjusting fin width in integrated circuitry |
| US8431453B2 (en) | 2011-03-31 | 2013-04-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure |
| US9190261B2 (en) * | 2011-08-25 | 2015-11-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Layer alignment in FinFET fabrication |
| US9496178B2 (en) * | 2011-08-31 | 2016-11-15 | Institute of Microelectronics, Chinese Academy of Sciences | Semiconductor device having fins of different heights and method for manufacturing the same |
| US8723341B2 (en) * | 2011-12-21 | 2014-05-13 | Nan Ya Technology Corporation | Alignment mark and method of manufacturing the same |
| US8629038B2 (en) | 2012-01-05 | 2014-01-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFETs with vertical fins and methods for forming the same |
| US8669186B2 (en) * | 2012-01-26 | 2014-03-11 | Globalfoundries Inc. | Methods of forming SRAM devices using sidewall image transfer techniques |
| US8741776B2 (en) * | 2012-02-07 | 2014-06-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Patterning process for fin-like field effect transistor (finFET) device |
| JP2013197342A (ja) * | 2012-03-21 | 2013-09-30 | Toshiba Corp | 半導体装置および半導体装置の製造方法 |
| KR101908980B1 (ko) | 2012-04-23 | 2018-10-17 | 삼성전자주식회사 | 전계 효과 트랜지스터 |
| US8741701B2 (en) | 2012-08-14 | 2014-06-03 | International Business Machines Corporation | Fin structure formation including partial spacer removal |
| US8716133B2 (en) | 2012-08-23 | 2014-05-06 | International Business Machines Corporation | Three photomask sidewall image transfer method |
| US9318330B2 (en) | 2012-12-27 | 2016-04-19 | Renesas Electronics Corporation | Patterning process method for semiconductor devices |
| US9034716B2 (en) * | 2013-01-31 | 2015-05-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of making a FinFET device |
| US20130140638A1 (en) * | 2013-02-04 | 2013-06-06 | International Business Machines Corporation | High density six transistor finfet sram cell layout |
| US9123654B2 (en) * | 2013-02-15 | 2015-09-01 | International Business Machines Corporation | Trilayer SIT process with transfer layer for FINFET patterning |
| US8932957B2 (en) * | 2013-03-12 | 2015-01-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating a FinFET device |
| US9153478B2 (en) | 2013-03-15 | 2015-10-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Spacer etching process for integrated circuit design |
| US9064813B2 (en) | 2013-04-19 | 2015-06-23 | International Business Machines Corporation | Trench patterning with block first sidewall image transfer |
| US9412664B2 (en) | 2013-05-06 | 2016-08-09 | International Business Machines Corporation | Dual material finFET on single substrate |
| US8859355B1 (en) * | 2013-05-06 | 2014-10-14 | International Business Machines Corporation | Method to make dual material finFET on same substrate |
| US9136106B2 (en) * | 2013-12-19 | 2015-09-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for integrated circuit patterning |
| CN103824799B (zh) * | 2014-03-05 | 2016-06-08 | 上海华虹宏力半导体制造有限公司 | 对准结构及晶圆 |
| US9209179B2 (en) | 2014-04-15 | 2015-12-08 | Samsung Electronics Co., Ltd. | FinFET-based semiconductor device with dummy gates |
| US9263586B2 (en) | 2014-06-06 | 2016-02-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Quantum well fin-like field effect transistor (QWFinFET) having a two-section combo QW structure |
| US9331073B2 (en) * | 2014-09-26 | 2016-05-03 | International Business Machines Corporation | Epitaxially grown quantum well finFETs for enhanced pFET performance |
| EP3238265A4 (en) * | 2014-12-23 | 2018-08-08 | Intel Corporation | Uniform layers formed with aspect ratio trench based processes |
| US9455274B2 (en) * | 2015-01-30 | 2016-09-27 | International Business Machines Corporation | Replacement fin process in SSOI wafer |
| US9496399B2 (en) * | 2015-04-02 | 2016-11-15 | International Business Machines Corporation | FinFET devices with multiple channel lengths |
| WO2017132381A1 (en) * | 2016-01-29 | 2017-08-03 | Tokyo Electron Limited | Method and system for forming memory fin patterns |
| US9666582B1 (en) * | 2016-08-08 | 2017-05-30 | Globalfoundries Inc. | On-chip finFET structures to implement physical unclonable function for security application |
| US10229832B2 (en) * | 2016-09-22 | 2019-03-12 | Varian Semiconductor Equipment Associates, Inc. | Techniques for forming patterned features using directional ions |
| CN110100203B (zh) * | 2017-01-11 | 2023-04-21 | 株式会社半导体能源研究所 | 显示装置 |
| US10504906B2 (en) * | 2017-12-04 | 2019-12-10 | Globalfoundries Inc. | FinFET SRAM layout and method of making the same |
| US20240234575A9 (en) * | 2021-03-23 | 2024-07-11 | Mitsubishi Electric Corporation | Semiconductor device and method of manufacturing the same |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2940553B2 (ja) * | 1988-12-21 | 1999-08-25 | 株式会社ニコン | 露光方法 |
| US5231319A (en) * | 1991-08-22 | 1993-07-27 | Ncr Corporation | Voltage variable delay circuit |
| US6288431B1 (en) * | 1997-04-04 | 2001-09-11 | Nippon Steel Corporation | Semiconductor device and a method of manufacturing the same |
| US6380007B1 (en) * | 1998-12-28 | 2002-04-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method of the same |
| US6967140B2 (en) * | 2000-03-01 | 2005-11-22 | Intel Corporation | Quantum wire gate device and method of making same |
| JP3970546B2 (ja) * | 2001-04-13 | 2007-09-05 | 沖電気工業株式会社 | 半導体装置及び半導体装置の製造方法 |
| US6967351B2 (en) * | 2001-12-04 | 2005-11-22 | International Business Machines Corporation | Finfet SRAM cell using low mobility plane for cell stability and method for forming |
| US6657259B2 (en) * | 2001-12-04 | 2003-12-02 | International Business Machines Corporation | Multiple-plane FinFET CMOS |
| US6664582B2 (en) * | 2002-04-12 | 2003-12-16 | International Business Machines Corporation | Fin memory cell and method of fabrication |
| KR100481209B1 (ko) * | 2002-10-01 | 2005-04-08 | 삼성전자주식회사 | 다중 채널을 갖는 모스 트랜지스터 및 그 제조방법 |
| US6706571B1 (en) * | 2002-10-22 | 2004-03-16 | Advanced Micro Devices, Inc. | Method for forming multiple structures in a semiconductor device |
| US6842048B2 (en) * | 2002-11-22 | 2005-01-11 | Advanced Micro Devices, Inc. | Two transistor NOR device |
| US6794718B2 (en) * | 2002-12-19 | 2004-09-21 | International Business Machines Corporation | High mobility crystalline planes in double-gate CMOS technology |
| US6885055B2 (en) * | 2003-02-04 | 2005-04-26 | Lee Jong-Ho | Double-gate FinFET device and fabricating method thereof |
| US6909151B2 (en) * | 2003-06-27 | 2005-06-21 | Intel Corporation | Nonplanar device with stress incorporation layer and method of fabrication |
| JP3927165B2 (ja) * | 2003-07-03 | 2007-06-06 | 株式会社東芝 | 半導体装置 |
| JPWO2005022637A1 (ja) * | 2003-08-28 | 2007-11-01 | 日本電気株式会社 | フィン型電界効果トランジスタを有する半導体装置 |
| US6867460B1 (en) * | 2003-11-05 | 2005-03-15 | International Business Machines Corporation | FinFET SRAM cell with chevron FinFET logic |
| US7018551B2 (en) * | 2003-12-09 | 2006-03-28 | International Business Machines Corporation | Pull-back method of forming fins in FinFets |
| KR100702552B1 (ko) * | 2003-12-22 | 2007-04-04 | 인터내셔널 비지네스 머신즈 코포레이션 | 이중 게이트 FinFET 디자인을 위한 자동화 레이어생성 방법 및 장치 |
| US7186599B2 (en) * | 2004-01-12 | 2007-03-06 | Advanced Micro Devices, Inc. | Narrow-body damascene tri-gate FinFET |
| US7332386B2 (en) * | 2004-03-23 | 2008-02-19 | Samsung Electronics Co., Ltd. | Methods of fabricating fin field transistors |
| US7084461B2 (en) * | 2004-06-11 | 2006-08-01 | International Business Machines Corporation | Back gate FinFET SRAM |
-
2005
- 2005-09-19 US US11/162,663 patent/US7323374B2/en not_active Expired - Fee Related
-
2006
- 2006-09-15 TW TW095134198A patent/TW200729408A/zh unknown
- 2006-09-19 EP EP06825028A patent/EP1935020A4/en not_active Withdrawn
- 2006-09-19 WO PCT/US2006/036575 patent/WO2007035788A2/en not_active Ceased
- 2006-09-19 CN CN200680034288.8A patent/CN101836280A/zh active Pending
- 2006-09-19 JP JP2008531447A patent/JP5203948B2/ja not_active Expired - Fee Related
- 2006-09-19 KR KR1020087006130A patent/KR101006120B1/ko not_active Expired - Fee Related
-
2007
- 2007-09-19 US US11/857,806 patent/US8963294B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| EP1935020A2 (en) | 2008-06-25 |
| US7323374B2 (en) | 2008-01-29 |
| WO2007035788A2 (en) | 2007-03-29 |
| CN101836280A (zh) | 2010-09-15 |
| WO2007035788A3 (en) | 2008-11-20 |
| US8963294B2 (en) | 2015-02-24 |
| US20070063276A1 (en) | 2007-03-22 |
| JP2009509344A (ja) | 2009-03-05 |
| US20080006852A1 (en) | 2008-01-10 |
| KR101006120B1 (ko) | 2011-01-07 |
| JP5203948B2 (ja) | 2013-06-05 |
| EP1935020A4 (en) | 2009-08-12 |
| KR20080056159A (ko) | 2008-06-20 |
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