TW200727442A - Semiconductor device and method of manufacturing the same - Google Patents

Semiconductor device and method of manufacturing the same

Info

Publication number
TW200727442A
TW200727442A TW095113543A TW95113543A TW200727442A TW 200727442 A TW200727442 A TW 200727442A TW 095113543 A TW095113543 A TW 095113543A TW 95113543 A TW95113543 A TW 95113543A TW 200727442 A TW200727442 A TW 200727442A
Authority
TW
Taiwan
Prior art keywords
wire
semiconductor device
bonded
island
bonding portion
Prior art date
Application number
TW095113543A
Other languages
English (en)
Inventor
Hideki Hiromoto
Sadamasa Fujii
Tsunemori Yamaguchi
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of TW200727442A publication Critical patent/TW200727442A/zh

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Classifications

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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
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    • H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2924/0001—Technical content checked by a classifier
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
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    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
TW095113543A 2005-04-15 2006-04-14 Semiconductor device and method of manufacturing the same TW200727442A (en)

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JP5734236B2 (ja) * 2011-05-17 2015-06-17 株式会社新川 ワイヤボンディング装置及びボンディング方法
KR101805118B1 (ko) * 2011-05-30 2017-12-05 엘지이노텍 주식회사 발광소자패키지
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US9991696B2 (en) * 2014-07-15 2018-06-05 Progress Rail Services Corporation Crashworthy memory module having a thermal wiring disconnect system
JP6507779B2 (ja) * 2015-03-26 2019-05-08 セイコーエプソン株式会社 電気光学装置、電気光学装置の製造方法、および電子機器
CN105355617A (zh) * 2015-11-25 2016-02-24 江苏欧密格光电科技股份有限公司 一种裸芯片技术中增强焊线牢靠度的结构及其方法
CN113035817A (zh) * 2019-12-25 2021-06-25 上海凯虹科技电子有限公司 一种封装体

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JP2001015541A (ja) * 1999-06-28 2001-01-19 Sumitomo Electric Ind Ltd 半導体装置および半導体装置の製造方法
US6265763B1 (en) * 2000-03-14 2001-07-24 Siliconware Precision Industries Co., Ltd. Multi-chip integrated circuit package structure for central pad chip
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JP2001313363A (ja) * 2000-05-01 2001-11-09 Rohm Co Ltd 樹脂封止型半導体装置
JP3945184B2 (ja) * 2001-04-27 2007-07-18 松下電器産業株式会社 ワイヤボンディング方法
SG117395A1 (en) * 2001-08-29 2005-12-29 Micron Technology Inc Wire bonded microelectronic device assemblies and methods of manufacturing same
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US20100001413A1 (en) 2010-01-07
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CN100514592C (zh) 2009-07-15
CN101160649A (zh) 2008-04-09

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