TW200625337A - Semiconductor memory device capable of switching from multiplex method to non-multiplex method - Google Patents

Semiconductor memory device capable of switching from multiplex method to non-multiplex method

Info

Publication number
TW200625337A
TW200625337A TW094139123A TW94139123A TW200625337A TW 200625337 A TW200625337 A TW 200625337A TW 094139123 A TW094139123 A TW 094139123A TW 94139123 A TW94139123 A TW 94139123A TW 200625337 A TW200625337 A TW 200625337A
Authority
TW
Taiwan
Prior art keywords
multiplex method
address
signal
input
memory device
Prior art date
Application number
TW094139123A
Other languages
English (en)
Inventor
Tomoyuki Fujisawa
Takashi Kubo
Original Assignee
Renesas Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp filed Critical Renesas Tech Corp
Publication of TW200625337A publication Critical patent/TW200625337A/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/066—Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
  • Read Only Memory (AREA)
TW094139123A 2004-12-22 2005-11-08 Semiconductor memory device capable of switching from multiplex method to non-multiplex method TW200625337A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004371823A JP2006179124A (ja) 2004-12-22 2004-12-22 半導体記憶装置

Publications (1)

Publication Number Publication Date
TW200625337A true TW200625337A (en) 2006-07-16

Family

ID=36595512

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094139123A TW200625337A (en) 2004-12-22 2005-11-08 Semiconductor memory device capable of switching from multiplex method to non-multiplex method

Country Status (5)

Country Link
US (1) US20060133126A1 (zh)
JP (1) JP2006179124A (zh)
KR (1) KR20060072061A (zh)
CN (1) CN1825492A (zh)
TW (1) TW200625337A (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7474552B2 (en) * 2006-03-08 2009-01-06 Infineon Technologies Ag Integrated semiconductor memory device
US7483334B2 (en) 2006-09-26 2009-01-27 Micron Technology, Inc. Interleaved input signal path for multiplexed input
JP5115090B2 (ja) * 2007-08-10 2013-01-09 富士通セミコンダクター株式会社 半導体メモリ、半導体メモリのテスト方法およびシステム
US7710789B2 (en) * 2007-09-27 2010-05-04 Integrated Device Technology, Inc. Synchronous address and data multiplexed mode for SRAM
US20100235554A1 (en) * 2007-10-19 2010-09-16 Rambus Inc. Reconfigurable point-to-point memory interface
US7894283B2 (en) * 2008-08-08 2011-02-22 Qimonda Ag Integrated circuit including selectable address and data multiplexing mode
US20110022769A1 (en) * 2009-07-26 2011-01-27 Cpo Technologies Corporation Translation USB Intermediate Device and Data Rate Apportionment USB Intermediate Device
KR20200101651A (ko) * 2019-02-20 2020-08-28 에스케이하이닉스 주식회사 메모리 및 메모리의 동작 방법

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5168558A (en) * 1986-01-29 1992-12-01 Digital Equipment Corporation Apparatus and method for providing distributed control in a main memory unit of a data processing system
JPH0770229B2 (ja) * 1987-03-02 1995-07-31 日本電気株式会社 読み出し専用メモリ装置
JPH06162762A (ja) * 1992-11-16 1994-06-10 Matsushita Electron Corp 半導体記憶装置
US5537353A (en) * 1995-08-31 1996-07-16 Cirrus Logic, Inc. Low pin count-wide memory devices and systems and methods using the same
KR100261218B1 (ko) * 1997-12-08 2000-07-01 윤종용 반도체 메모리 장치의 핀 어사인먼트 방법 및 패킷 단위의 신호를 입력으로 하는 반도체 메모리장치
US6014763A (en) * 1998-01-15 2000-01-11 International Business Machines Corporation At-speed scan testing
US6145104A (en) * 1998-02-12 2000-11-07 Motorola, Inc. Data processing system external pin connectivity to complex functions
US6144598A (en) * 1999-07-06 2000-11-07 Micron Technology, Inc. Method and apparatus for efficiently testing rambus memory devices
DE10018013A1 (de) * 2000-04-11 2001-10-18 Infineon Technologies Ag Integrierte Halbleiterschaltung, insbesondere Halbleiter-speicheranordnung und Verfahren zum Betrieb derselben
US6842816B1 (en) * 2001-07-31 2005-01-11 Network Elements, Inc. Configurable glueless microprocessor interface
TWI252406B (en) * 2001-11-06 2006-04-01 Mediatek Inc Memory access interface and access method for a microcontroller system
JP2003157689A (ja) * 2001-11-20 2003-05-30 Hitachi Ltd 半導体装置及びデータプロセッサ
KR20060125740A (ko) * 2003-10-24 2006-12-06 마이크로칩 테크놀로지 인코포레이티드 중앙처리장치에서 명령어 세트를 바꾸기 위한 방법 및시스템
JP4614650B2 (ja) * 2003-11-13 2011-01-19 ルネサスエレクトロニクス株式会社 半導体記憶装置

Also Published As

Publication number Publication date
CN1825492A (zh) 2006-08-30
US20060133126A1 (en) 2006-06-22
JP2006179124A (ja) 2006-07-06
KR20060072061A (ko) 2006-06-27

Similar Documents

Publication Publication Date Title
TW200625337A (en) Semiconductor memory device capable of switching from multiplex method to non-multiplex method
GB2432945A (en) Command controlling different operations in different chips
TW200708959A (en) Semiconductor device and data processing system
TWI263404B (en) Electronic switch and the operating method of transistor
TW200629030A (en) Semiconductor integrated circuit
WO2006060519A3 (en) Circuits including switches for electronic devices and methods of using the electronic devices
TW200516714A (en) Semiconductor integrated circuit device
ATE339006T1 (de) Pufferanordnung für speicher
TW200742966A (en) Substrate biasing apparatus
WO2008036589A3 (en) Randomizing current consumption in memory devices
WO2007130640A3 (en) Memory device including multiplexed inputs
TWI266324B (en) Page buffer having dual register, semiconductor memory device having the same, and program method thereof
TW200737712A (en) Common input/output terminal control circuit
TW200613975A (en) Data latch circuit and semiconductor device using the same
TW200622272A (en) Interface circuit for electronic test system
TW200636742A (en) Sense amplifier overdriving circuit and semiconductor device using the same
TW200632845A (en) Circuit and method for driving display panel
TW200634819A (en) High-voltage switching circuit of nonvolatile memory device
TW200726167A (en) An audio data rerouting system, the structure and method thereof
DE102005014627A1 (de) Flashspeicher, Halbleiterbauelement, Seitenpuffer und Schaltung für einen Flashspeicher
TW200617670A (en) Memory module with memory devices of different capacity
TWI264728B (en) Method of controlling page buffer having dual register and circuit thereof
TW200709148A (en) Amplifier circuit and display device
PL1578145T3 (pl) Zespół trzech modułów telekomunikacyjnych
CN203596863U (zh) 复用音频输入输出端子的电路和电视机