TW200617670A - Memory module with memory devices of different capacity - Google Patents

Memory module with memory devices of different capacity

Info

Publication number
TW200617670A
TW200617670A TW094129446A TW94129446A TW200617670A TW 200617670 A TW200617670 A TW 200617670A TW 094129446 A TW094129446 A TW 094129446A TW 94129446 A TW94129446 A TW 94129446A TW 200617670 A TW200617670 A TW 200617670A
Authority
TW
Taiwan
Prior art keywords
memory
memory module
type
different capacity
capacity
Prior art date
Application number
TW094129446A
Other languages
English (en)
Other versions
TWI291616B (en
Inventor
Jeong-Hyeon Cho
Jung-Joon Lee
You-Keun Han
Byung-Se So
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of TW200617670A publication Critical patent/TW200617670A/zh
Application granted granted Critical
Publication of TWI291616B publication Critical patent/TWI291616B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Static Random-Access Memory (AREA)
TW094129446A 2004-09-13 2005-08-29 Memory module with memory devices of different capacity TWI291616B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020040073120A KR100585158B1 (ko) 2004-09-13 2004-09-13 Ｅｃｃ 메모리 모듈

Publications (2)

Publication Number Publication Date
TW200617670A true TW200617670A (en) 2006-06-01
TWI291616B TWI291616B (en) 2007-12-21

Family

ID=36164102

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094129446A TWI291616B (en) 2004-09-13 2005-08-29 Memory module with memory devices of different capacity

Country Status (4)

Country Link
US (1) US20060059298A1 (zh)
JP (1) JP2006085704A (zh)
KR (1) KR100585158B1 (zh)
TW (1) TWI291616B (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060265636A1 (en) * 2005-05-19 2006-11-23 Klaus Hummler Optimized testing of on-chip error correction circuit
US7840876B2 (en) * 2007-02-20 2010-11-23 Qimonda Ag Power savings for memory with error correction mode
US7984355B2 (en) * 2007-04-09 2011-07-19 Qimonda Ag Memory module with ranks of memory chips
JP5473317B2 (ja) * 2008-12-24 2014-04-16 ピーエスフォー ルクスコ エスエイアールエル メモリモジュールおよびそのレイアウト方法
KR102002925B1 (ko) 2012-11-01 2019-07-23 삼성전자주식회사 메모리 모듈, 그것을 포함하는 메모리 시스템, 그것의 구동 방법
FR3089317A1 (fr) 2018-12-03 2020-06-05 Stmicroelectronics (Rousset) Sas Procédé de gestion de l’espace mémoire d’un dispositif de mémoire et système correspondant

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4787060A (en) * 1983-03-31 1988-11-22 Honeywell Bull, Inc. Technique for determining maximum physical memory present in a system and for detecting attempts to access nonexistent memory
US4916603A (en) * 1985-03-18 1990-04-10 Wang Labortatories, Inc. Distributed reference and change table for a virtual memory system
US5270964A (en) 1992-05-19 1993-12-14 Sun Microsystems, Inc. Single in-line memory module
IN188196B (zh) * 1995-05-15 2002-08-31 Silicon Graphics Inc
US5872790A (en) * 1997-02-28 1999-02-16 International Business Machines Corporation ECC memory multi-bit error generator
US6567950B1 (en) * 1999-04-30 2003-05-20 International Business Machines Corporation Dynamically replacing a failed chip
US6279072B1 (en) * 1999-07-22 2001-08-21 Micron Technology, Inc. Reconfigurable memory with selectable error correction storage
JP3498021B2 (ja) * 1999-10-07 2004-02-16 エヌイーシーコンピュータテクノ株式会社 メモリ制御方式
JP3871853B2 (ja) * 2000-05-26 2007-01-24 株式会社ルネサステクノロジ 半導体装置及びその動作方法
KR100389916B1 (ko) * 2000-08-28 2003-07-04 삼성전자주식회사 메모리 모듈 및 메모리 컨트롤러
US6714433B2 (en) * 2001-06-15 2004-03-30 Sun Microsystems, Inc. Memory module with equal driver loading
JP2003173317A (ja) 2001-12-05 2003-06-20 Elpida Memory Inc アンバッファメモリシステム
JP2003303139A (ja) 2002-04-09 2003-10-24 Nec Corp 冗長メモリモジュールおよびメモリコントローラ
DE10255872B4 (de) * 2002-11-29 2004-09-30 Infineon Technologies Ag Speichermodul und Verfahren zum Betrieb eines Speichermoduls in einem Datenspeichersystem
US7234099B2 (en) * 2003-04-14 2007-06-19 International Business Machines Corporation High reliability memory module with a fault tolerant address and command bus

Also Published As

Publication number Publication date
TWI291616B (en) 2007-12-21
KR20060024228A (ko) 2006-03-16
KR100585158B1 (ko) 2006-05-30
US20060059298A1 (en) 2006-03-16
JP2006085704A (ja) 2006-03-30

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees