TW200525639A - Manufacturing method of shallow trench isolation structure - Google Patents

Abstract

A manufacturing method of shallow trench isolation (STI) structure is described. A substrate is provided, wherein a patterned pad oxide layer and a mask layer are formed on the substrate, and at least a trench is formed in the substrate, wherein the trench is formed by exposing a portion of the pad oxide layer and the mask layer. Then, a liner layer on a surface of the trench is formed. A high density plasma chemical vapor deposition (HDP-CVD) process is performed to form an isolation layer on the substrate and over the trench, wherein the trench is at least filled with the isolation layer. The HDP-CVD process includes a first stage process and a second stage process. The bias power of the second stage process is larger than the bias power of the first stage process. Thereafter, the isolation layer over the trench, the mask layer and the pad oxide layer are removed sequentially.

Description

200525639 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a semiconductor process, and more particularly to a method for manufacturing a shallow trench isolation structure. [Previous technology] Today, as the accumulation of semiconductor components is getting closer, isolation between components has become very important. In order to prevent short-circuits between adjacent components, an isolation layer is usually added between them. The production of this isolation layer has traditionally been performed by a local oxidation method (LOC0S). This method can obtain a highly reliable and effective element isolation structure at a lower cost. However, the regional partial oxidation method still has many disadvantages, including the related problems derived from the generation of stress, and the formation of the bird's beak area around the LOC0S field isolation structure. Among them, the formation of the bird's beak area is the most detrimental to the improvement of component accumulation. In view of this, other component methods have been developed. One of the more commonly used methods today is a shallow trench isolation structure process. Figures 1A to ic are schematic cross-sectional views showing the manufacturing process of a conventional shallow trench isolation structure. Please refer to FIG. 1A, and provide a substrate 100 in which a pad oxide layer 102 and a mask layer 104 are sequentially formed, wherein the mask layer 104 is composed of a nitride nitride layer 101 And oxide stone Xi layer 103. Next, the mask layer 104, the pad oxide layer 102, and the substrate 10 () are etched to form a trench 106. Then, referring to FIG. 1B, a thermal oxidation process is performed to form a silicon oxide liner (Liner 0xide Layer;) 1 () 8 on the surface of the trench 106, and then deposit at least one layer on the substrate 100. Filling the trench

200525639 _; ___ V. Description of the invention (2) Marginal layer 1 1 0. Then, referring to FIG. 1c, a chemical mechanical polishing (CMP) process is performed using the silicon nitride layer 101 as a polishing stop layer to remove the insulating layer other than the trench 〇〇〇 The oxidized stone layer 1 0 3 forms an insulating layer 1 1 0 a. Then, a wet # engraving process is performed to remove the mask layer 104 and the pad oxide layer 102. However, in the process of removing the mask layer 104 and the pad oxide layer 102, the etching solution used in the wet etching process will attack the insulating layer 1 1 〇a, and cause the corners of the trench 1 06 to be dimpled 1 1 2. This depression 1 1 2 will accumulate charge, and then cause the sub-threshold leakage current of the component in the integrated circuit, which will cause the so-called Kink effect or gate-induced drain The leakage (Gate Induced Drain Leakage, GIDL) effect reduces the reliability and yield of the device. Although several methods have been developed to solve the above-mentioned depression problem, for example, etch-back is used to shrink the mask layer (Pull-Back) to avoid the above problems. Or use the formation of the liner to repair the defects caused by the trenches, and at the same time release the stress there to improve the above problems. However, as component sizes become smaller and component characteristics become more stringent, the above remedies cannot meet future product requirements. Therefore, how to effectively improve the above-mentioned sag problem and avoid leakage of components has become one of the important process capability indicators in 90- and 90-nm (Sub-90nm Technology Node) processes.

12335twf.ptd Page 9 200525639__ V. Description of the invention (3) [Summary of the invention] In view of this, the purpose of the present invention is to provide a method for manufacturing a shallow trench isolation structure in order to solve the problem of easy trench corners in the conventional process There is a problem of dents everywhere. Another object of the present invention is to provide a method for manufacturing a shallow trench isolation structure so that the filled insulating layer has a better density. The invention provides a method for manufacturing a shallow trench isolation structure. This method first provides a substrate, and a patterned pad oxide layer and a mask layer have been formed on the substrate, and at least one trench has been formed in the substrate. And the oxide layer of the pad and the cover layer expose the trench. After that, a lining layer is formed on the surface of the trench. Next, a high density plasma chemical vapor deposition (High Density Plasma Chemical Vapor Deposition, H D P-C V D) process is performed to form an insulating layer at least filling the trenches on the substrate. The high-density plasma chemical vapor deposition process includes a first-stage process and a second-stage process. The bias RF power of the second-stage process is greater than the bias RF power of the first-stage process. The etch ratio is smaller than the deposition / etch ratio of the first stage process. After that, remove the insulation outside the trench. Then, the mask layer is removed. Then, the pad oxide layer is removed. The invention provides a method for manufacturing a shallow trench isolation structure. This method first provides a substrate, and a patterned pad oxide layer and a mask layer have been formed on the substrate, and at least one trench has been formed in the substrate. And the oxide layer of the pad and the cover layer expose the trench. Then, an etch-back process is performed on the mask layer to shrink the mask layer (P u 1 1-B a c k). After that, a lining layer is formed on the surface of the trench. Next, high density plasma

12335twf.ptd Page 10 200525639 V. Description of the invention (4) Learn the vapor deposition process to form an insulating layer on the substrate that at least fills the trenches. The high-density plasma chemical vapor deposition process includes a first-stage process and a second-stage process. The bias RF power of the second-stage process is greater than the bias RF power of the first-stage process. The etch ratio is smaller than the deposition / etch ratio of the first stage process. After that, remove the insulation outside the trench. Then, the mask layer is removed. Then, remove the pad oxide. Due to the manufacturing method of the shallow trench isolation structure of the present invention, the bias RF power of the high-density plasma chemical vapor deposition process in the second stage is greater than the bias RF power of the first stage process, and / or The deposition / etching ratio is smaller than the deposition / etching ratio of the first stage process, so the filled insulating layer has a better density. Moreover, due to the better quality of the filled insulating layer, the degree of depression at the corners of the ditch due to the removal of the mask layer and the pad oxide layer is slight, and no depression will even occur. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings to make a detailed description as follows: [Embodiment] Figure 2A As shown in FIG. 2F, it is a schematic cross-sectional view illustrating a manufacturing process of a shallow trench isolation structure according to a preferred embodiment of the present invention. Referring to FIG. 2A, a method for manufacturing a shallow trench isolation structure according to the present invention is to first provide a substrate 200. Then, a comprehensive pad oxide layer 202 and a mask layer 204 are sequentially formed on the substrate 200. The material of the pad oxide layer 202 is, for example, silicon oxide, and the method for forming the pad oxide layer 202 is, for example, a thermal oxidation process.

12335twf.ptd Page 11 200525639 V. Description of Invention (5) Completed. In addition, in this embodiment, the mask layer 204 is composed of a lower nitride oxide layer 201 and an upper oxide oxide layer 203. The method for forming the nitrided stone layer 201 is, for example, a chemical vapor deposition process. In addition, the method for forming the silicon oxide layer 203 is, for example, using a tetraethyl silicate (Tetra-Ethyl-Ortho-Silicate, TEOS) to perform a chemical vapor deposition process, and forming the silicon nitride layer on the silicon nitride layer 201. Of it. In addition, in another preferred embodiment, the mask layer 204 is composed of, for example, only a silicon nitride layer 201. Next, referring to FIG. 2B, the silicon oxide layer 203, the silicon nitride layer 201, and the pad oxide layer 202 are patterned to expose the surface of the substrate 2000 where the trench is to be formed. Then, the patterned silicon oxide layer 2 3, the silicon nitride layer 2 0 1 and the pad oxide layer 2 2 are used as an etching mask, and the substrate 2 0 is etched to form a trench 2 0 8 °. Please continue to refer to In Fig. 2B, a lining layer 2 1 0 is formed on the surface of the trench 208. Among them, the material of the backing layer 2 10 is, for example, silicon oxide, and the formation method is, for example, a thermal oxidation process. It is worth mentioning that the lining layer 2 10 formed here can round the corners of the trench 208, so that the stress can be released. In addition, the formed lining layer 2 0 can also repair the damage to the substrate 2 0 in the etching process of the etching trench 208 described above. Next, referring to Figure 2C, the first stage of the high-density plasma chemical vapor deposition process is performed to form an insulating protective layer 2 1 2, and the insulating protective layer 2 1 2 covers the substrate 2 0 0 The resulting structure. The material of the insulating protection layer 2 1 2 is, for example, silicon oxide. In addition, high-density plasma chemical gas

12335twf.ptd Page 12 200525639 V. Description of the invention (6) The bias RF power of the phase deposition process is, for example, less than 2 500 watts, and the preferred example is between 900 and 2 500 watts. In addition, the deposition / etching ratio is, for example, greater than 10, and it is preferably, for example, between 10 and 20. It is worth mentioning that the bias RF power used in this high-density plasma chemical vapor deposition process is to control the directionality of the plasma and provide bombardment, so that the high-density plasma chemical vapor deposition is used. The machine has both deposition and etching effects. In addition, the insulating protective layer 2 1 2 formed by the high-density plasma chemical vapor deposition process can cover the structures formed on the substrate 2 0, so that these structures can be protected from the subsequent high density of the second stage. Damage to the plasma chemical vapor deposition process. Next, referring to FIG. 2D, a second-stage process of the high-density plasma chemical vapor deposition process is performed to form an insulating layer 2 1 4 that fills at least the trenches 208 on the substrate 200. The material of the insulating layer 2 1 4 is, for example, the same as that of the insulating protective layer 2 1 2, and it is, for example, silicon oxide. In addition, the bias RF power of the high-density plasma chemical vapor deposition process is, for example, greater than 2 500 watts, and more preferably, it is between 2 500 and 3 300 watts. In addition, the deposition / etching ratio is, for example, less than 10, and it is preferably, for example, between 5 and 10. Similarly, the high-density plasma chemical vapor deposition process performed here uses bias RF power to control the directionality of the plasma and provide bombardment, making the high-density plasma chemical vapor deposition machine The stage has both deposition and etching effects. Moreover, because the bias RF power used in the second stage process is greater than the bias RF power of the first stage process, and its deposition / etching ratio is smaller than the deposition / etching ratio of the first stage process, its bombardment effect will be greater than the first The bombardment effect of the stage process makes the deposited

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The edge material has a less dense age / etch ratio than that of flute—better. In addition, although the sedimentation ratio of the second-stage process is reduced by 3 * the deposition / surname-to-cut ratio of the stage process, but due to this, it is affected by the increase in the remaining rate, that is, the deposition rate will not i ,, t will not affect the production capacity of the process. And insulation protection ^ Refer to FIG. 2E 'Remove the insulating layer 2 ditch other than the trench 2 0 8 and the oxide layer / 0 3, and in this embodiment, this removal step further includes the fossil layer 2 〇1 is and removed. Among them, the removal method is, for example, removing the nitrogen, grinding the stop layer, and performing a chemical mechanical polishing process, and the edge filling layer 2 1 6 ′ includes an insulating layer 2 1 4 a and an insulating protective layer 2 1 2 Following it from a, please remove the method and example, and refer to Figure 2E to remove the silicon nitride layer 2 01. Among them, it is a residual agent. For example, a thermostructural acid (Η0ΗPh 0 s P h 0 r i c A c i d) is used as the oxide layer 2 2. The wet post-etch process was performed to remove it. Then, the pad is removed by etching, and the method of removing the pad is, for example, using hydrofluoric acid (HF) as the removal method due to the previous, less-wet-type engraving process. It is worth noting that it is good, so when the quality of the insulating layer 21 4 (ie, the insulating filling layer 21 6) is higher than that of 208, the nitride stone layer 201 and the hafnium oxide layer 202 are removed. In the trenches). The degree of depression produced is slight (not even produced). In addition, in a preferred embodiment, after forming the trench 2 0 8 (for example, including the cover tomb and forming The structure shown before the outline layer 210 (as shown in FIG. 2B). It is etched back to 2 0 4 to obtain the internal shrinkage and middle etch back process of the layer 2 2 as shown in FIG. 2 F. The mask layer 2 0 4 and the pad are oxidized. The detailed description of the etching process is

200525639 V. Description of the invention (8) The process is mainly to remove a part of the silicon nitride layer 201 at the side wall of the opening of the trench 208, but the etching solution will also affect the silicon oxide layer 203 and the pad at the same time. The oxide layer 202 causes various degrees of erosion, which will cause the silicon oxide layer 203, the silicon nitride layer 201, and the pad oxide layer 202 to shrink within varying degrees, thereby exposing the surface of the substrate 200 at the corners of the trench 208. This will help the subsequent trench filling process, and will help Corner Rounding of the trench 208. Of course, the process of Figures 2C to 2E is also continued after the moment ## to complete the shallow trench isolation structure. In order to prove that the present invention can indeed improve the problem of depressions at the corners of trenches and reduce the occurrence of component leakage, the following is the use of different bias RF power to perform the above-mentioned deposition process, and the obtained wafer is subjected to junction leakage The measurement results are shown in Figure 3. Figure 3 shows the measurement results of the leakage current at the junctions of wafers with different numbers of wafers obtained using different bias RF power for the deposition process. Among them, the horizontal axis represents the measured wafer number, and the vertical axis represents the interface leakage current (unit: ampere). In Figure 3, the four areas that are distinguished indicate the use of conventional bias RF power and The measurement results of the leakage current at the junction of the wafer obtained by the bias RF power of the present invention are, from left to right, normal bias RF power (known), high bias RF power (the present invention), and normal bias. RF power (known) and normal bias RF power (known). From the measurement results in Fig. 3, it can be known that the junction leakage of the wafer obtained by using the high bias RF power of the present invention is smaller than the junction leakage of the wafer obtained by using the normal bias RF power throughout the process. Therefore, the method of the present invention can indeed improve the density of the deposited insulating layer, and thus effectively improve the

12335twf.ptd Page 15 200525639 V. Description of the invention (9) Knowing the leakage problem 〇 In addition, after removing the mask layer and the pad oxide layer, a scanning electron microscope was used to photograph the obtained shallow trench isolation structure. The slice diagrams are shown in Figures 4A and 4B. Wherein Figure 4A is a hologram of a shallow trench isolation structure obtained using a conventional normal bias power for a shallow trench isolation structure, and Figure 4B is the use of the present invention Photographs of the shallow trench isolation structure obtained by performing the process of the shallow trench isolation structure with high bias power. Figures 4A and 4B show the shallow trench isolation structure obtained by using the two bias RF power of the present invention. Corner depression 4 0 2 丨, compared with the conventional depression 4 0 0, the improvement is indeed achieved. The depressions 4 0 0 and 402 generated at the corners of the canal are used to measure the depth. Among them, the shallow trench isolation structure 9 obtained by using the normal bias RF power 9 The depressions 4 0 0 at the corners of the canal have a depth of approximately 160.7 The depth of the shallow trench isolation structure obtained by utilizing the high-bias RF power of the present invention at the corner of the trench 4 0 2 is only 73 angstroms. Therefore, the method of the present invention can effectively improve the learning The problem of depression at the corners. To sum up, the present invention has at least the following advantages: 1. The manufacturing method of the shallow trench isolation structure of the present invention has a high density plasma chemical vapor deposition process during the second stage. The bias RF power is greater than the bias RF power of the first-stage process and / or its deposition / etching ratio is based on the deposition / etching ratio of the first-stage process. The marginal layer has a better density 〇 And, because of the better quality of the insulation layer filled in, the edge layer is removed by removing the cover layer and the padding oxidation layer.

12335twf.ptd Page 16 200525639 V. Explanation of the invention (ίο) The degree of depression produced by the angle is slight, and no depression is even produced. 2. Using the high-density plasma chemical vapor deposition method of the present invention, not only can a relatively dense insulating layer be deposited, but also the trench filling (G ap F i 1 1) of the high-density plasma chemical vapor deposition method can be improved. )ability. 3. The present invention is not limited to the application of a two-step high-density plasma chemical vapor deposition process. It can also be applied to a two-step or higher-density plasma chemical vapor deposition process. That is, only the second step of the high-density plasma chemical vapor deposition process using the process parameters of the second stage of the present invention can be used to form an insulating layer with better density. 4. In the high-density plasma chemical vapor deposition process of the present invention, although the deposition / etching ratio of the second-stage process is smaller than the deposition / etching ratio of the first-stage process, the decrease in this ratio is due to the increase of the remaining rate The reason is that the deposition rate will not be affected, so it will not affect the production capacity of the process. Although the present invention has been disclosed in the preferred embodiment as above, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall be determined by the scope of the attached patent application.

12335twf.ptd Page 17 200525639 Brief Description of Drawings Figures 1A to 1C are cross-sectional schematic diagrams of the manufacturing process of a conventional shallow trench isolation structure. FIG. 2A to FIG. 2F are cross-sectional views illustrating a manufacturing process of a shallow trench isolation structure according to a preferred embodiment of the present invention. Figure 3 is a measurement result of the leakage current at the junction of wafers with different numbers of wafers obtained by using different bias RF power for the deposition process. Figures 4A and 4B are photographs obtained by photographing the obtained shallow trench isolation structure using a scanning electron microscope. Among them, Figure 4A is obtained by using a conventional normal bias power to process the shallow trench isolation structure. Photograph of the shallow trench isolation structure. FIG. 4B is a photograph of the shallow trench isolation structure obtained by using the high bias power of the present invention to perform the process of the shallow trench isolation structure. [Schematic mark says / U 100 > 200 substrate 101 > 201 silicon nitride layer 102 > 202 pad oxide layer 103 > 203 silicon oxide layer 104, 204 cover layer 106 ^ 208 trench 108 > 210 liner Layers 110, 2 1 4, 2 1 4 a: Insulating layers 112, 400 > 4 0 2 ·· Dent 2 1 2, 2 1 2 a: Insulating protective layer 2 1 6: Insulating filling layer

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Claims (1)

200525639 VI. Scope of patent application 1. A method for manufacturing a shallow trench isolation structure, comprising: providing a substrate on which a patterned pad oxide layer and a mask layer have been formed; At least one trench is formed, and the pad oxide layer and the cover layer expose the trench; a liner is formed on the surface of the trench; a high-density plasma chemical vapor deposition process is performed on the substrate Forming at least one insulation layer filling the trench, wherein the high-density plasma chemical vapor deposition process includes a first-stage process and a second-stage process, and the bias RF power of the second-stage process is greater than the first-stage process The bias RF power of the stage process, and the deposition / etching ratio of the second stage process is smaller than the deposition / etching ratio of the first stage process; removing the insulating layer outside the trench; removing the cover layer; and moving Remove the tritium oxide layer. 2. The method for manufacturing a shallow trench isolation structure as described in item 1 of the scope of the patent application, wherein the bias RF power of the first stage process is between 900 and 2 500 watts. 3. The method for manufacturing a shallow trench isolation structure as described in item 1 of the scope of the patent application, wherein the bias RF power of the second-stage process is between 2500 and 3300 watts. 4. The method for manufacturing a shallow trench isolation structure as described in item 1 of the scope of patent application, wherein the deposition / etching ratio of the first stage process is between 10 and 20. 5. Manufacture of shallow trench isolation structure as described in item 1 of the scope of patent application 12335twf.ptd Page 19, 200525639 VI. Method for applying patent range > The deposition / etching ratio of the second stage process is between 5 and 10. As described in item 1 of the patent range A method for manufacturing a shallow trench isolation structure, wherein the bias RF power of the second stage process is between 2 500 and 3 3 0 watts and the deposition of the second stage process Between 5 and 10 07. The method for manufacturing a shallow trench i isolation structure as described in item 1 of the patent scope 9 wherein the material of the insulating layer includes stone oxide. 8. The manufacturing method of the shallow trench 1 isolation structure as described in the first item of the patent scope, wherein the mask layer is composed of a lower nitride layer and a higher silicon oxide layer. 9. As in The manufacturing method of the shallow trench I damage structure described in item 8 of the patent, wherein in the step of removing the insulating layer other than the trench, the method further includes removing the silicon oxide layer. The manufacturing method includes: * providing _ a substrate y having a patterned-pad oxygen 'layer and _ a mask layer y on the substrate, and having at least one trench formed in the substrate, and the pad The oxide layer and the mask layer expose the trench; an etching process is performed on the mask layer to make the mask layer shrink within (P ul 1-Back) j to form a surface on the surface of the trench. High-density plasma Gas phase deposition process, to form on the substrate to at least fill over an insulating the ditches of the layer in which the high density electrical plasma chemical vapor deposition process comprises a first stage of the process as well as a para-order process, 12335twf.ptd Page 20 200525639 6. The scope of the patent application and the bias RF power of the second stage process is greater than the bias RF power of the first stage process, and the deposition / etching ratio of the second stage process is less than the first stage process Phase-to-process deposition / etch ratio; remove the insulating layer outside the trench; remove the mask layer; and remove the pad oxide layer. η. The method for manufacturing a shallow trench isolation structure as described in item 10 of the scope of the patent application, wherein the bias RF power of the first stage process is between 900 and 2500 watts. 12. The method for manufacturing a shallow trench isolation structure as described in item 10 of the scope of patent application, wherein the bias RF power of the second stage process is between 2500 and 3300 watts. 1 3. The method for manufacturing a shallow trench isolation structure as described in item 10 of the scope of the patent application, wherein the deposition / etching ratio of the first stage process is between 10 and 20. 14. The method for manufacturing a shallow trench isolation structure as described in item 10 of the scope of patent application, wherein the deposition / etching ratio of the second stage process is between 5 and 10. 15. The method for manufacturing a shallow trench isolation structure as described in item 10 of the scope of patent application, wherein the bias RF power of the second-stage process is between 2 500 and 3 300 watts, and The deposition / etch ratio of this second stage process is between 5 and 10. 16. The method for manufacturing a shallow trench isolation structure as described in item 10 of the scope of patent application, wherein the material of the insulating layer includes silicon oxide. 12335twf.ptd Page 21 200525639 6. Application for patent scope 1 7. Manufacturing method of shallow trench isolation structure as described in item 10 of the scope of patent application, wherein the mask layer is composed of one of the lower silicon nitride layer and the upper layer It is composed of a silicon oxide layer, and the etch-back process removes part of the II fossil layer at the side wall of the opening of the trench. 18. The method for manufacturing a shallow trench isolation structure as described in item 17 of the scope of patent application, wherein in the step of removing the insulating layer outside the trench, the method further includes removing the silicon oxide layer. 12335twf.ptd Page 22