TW459339B - Shallow trench isolation process for preventing the corner form exposing - Google Patents

Abstract

There is provided a shallow trench isolation process, which comprises the steps of: first, providing a substrate, forming a first insulating material later on the substrate, and forming a barrier layer on the first insulating material later; then. Forming a second insulating material layer on the barrier layer, forming a pattern transferred photoresist on the second insulating material layer, the pattern transferred photoresist defining an active region and a trench region; then, using the pattern transferred photoresist as a mask to sequentially etch the second insulating material layer, the barrier layer, the first insulating material layer and part of the substrate, thereby forming a trench in the substrate; then, etching the second insulating material layer to form a recess between the photoresist and the barrier layer; next, removing the photoresist, forming a third insulating material layer in the trench for being used as a liner layer; using the second insulating material layer as a mask to etch the barrier layer; flattening the fourth insulating material layer until reaching the barrier layer; and sequentially removing barrier layer and the first insulating material layer. Accordingly, the corner of the shallow trench isolation can be protected from being exposed, so as to avoid the exposure of the corner which causes the kink effect resulting in generating leakage current and the thinning of the gate oxide resulting in generating current/voltage twin peaks.

Description

4 5 9 3 3 9 Five 'Invention Description (1) 5-1 Field of the Invention: The present invention relates to a method for manufacturing a semiconductor device isolation region, and particularly to a shallow trench isolation process for preventing corners from being exposed. 2 BACKGROUND OF THE INVENTION In recent years, the crystal or its important regional oxidation point. For example, the surface protrusion can overcome the problem of high density of the trench isolation method, and it is one of the topics to follow the road accumulation method of integrated electric unit elements. Among them, however, it will lead to LOCOS. The formation of the bird's beak makes the limitation of the oxidation method in the optical microdomain, as soon as (STI) is born due to pregnancy. Accumulation degree, and it is relatively flat, so it is widely used. The continuous depth has become a widely used regional oxidation isolation effect. When focusing on breeding, the newly developed shallow trench isolation surface has a sub-micron rising accumulation method that is still poor. Mis-isolation is acceptable and semi-conductive. The ionization side is not allowed to separate from each other. The ionization side is inherently flat. Therefore, the lack of a circuit on the component's nozzle is the same as the traditional method for forming a shallow trench, as shown in Figure A. First, a silicon substrate Π 0 is provided, and then a silicon dioxide layer 112 is formed on the silicon substrate 110 as a pad oxide layer by a thermal oxidation method. Then, a chemical vapor deposition method is used to form a silicon nitride layer Π 4 on the silicon dioxide layer 1 12, and then a lithography technique is used to form a pattern transfer photoresist 116 on the silicon nitride layer 114. By pattern transfer

4 b 9 3 3 9 V. Description of the invention ¢ 2) The shifted photoresist 1 1 6 can define an active area 1 1 8 and a trench area 1 2 0. Using the pattern transfer photoresist Π 6 as a mask, the silicon nitride layer 1 1 4, the silicon dioxide layer Π 2 and a part of the silicon substrate 1 1 0 are sequentially etched to form a trench 1 2 0 on the silicon substrate. Within 110. Then, the photoresist 116 is removed, and then a silicon dioxide layer 1 2 2 is formed in the trench 12 0 by a thermal oxidation method as a lining layer. Thereafter, silicon dioxide is packed in the trenches 120 by atmospheric pressure chemical vapor deposition to form a silicon dioxide layer 12 as a shallow trench isolation, as shown in the first figure B. Then, the silicon dioxide layer 12 as a shallow trench isolation is planarized to a silicon nitride layer by a chemical mechanical polishing method. The planarized silicon dioxide layer 1 2 4 a is formed, as shown in FIG. 1C. The silicon nitride layer 11 4 is then removed using hot phosphoric acid. Thereafter, the silicon oxide layer 1 1 2 is removed by hydrofluoric acid. However, in the conventional shallow trench isolation, after multiple etching processes, the corners of the trenches are etched at the same time to form the problem that the corners are exposed 1 2 6, as shown in the first D diagram. The exposed corners of the shallow trench isolation will cause charges to accumulate in the exposed corners 1 2 6, resulting in secondary voltage leakage currents, also known as the neck-knot effect. The exposed corners of shallow trench isolation will also cause the thinning of the gate oxide layer due to stress and lattice difference row, which will cause a double ridge behavior in its current / voltage relationship. The bimodal phenomenon caused by the abnormal neck knot effect and thinning of the gate oxide layer will reduce the quality of the device and reduce the yield, which is desirable to avoid during the device manufacturing process.

469339 V. Description of the invention (3) 5-3 Purpose and summary of the invention: In view of the many shortcomings of the traditional shallow trench isolation process in the above background of the invention, the object of the present invention is to provide a shallow trench isolation that prevents corners from being exposed. Manufacturing method, which can avoid the charge accumulation and secondary starting voltage leakage current caused by the neck knot effect, and can avoid the double peak phenomenon of the current / voltage relationship caused by the thinning of the gate oxide layer due to the stress and the lattice difference discharge. . According to the above-mentioned object, the present invention provides a manufacturing method for preventing shallow trench isolation from exposed corners. The manufacturing method includes the following steps. First, a substrate is provided, and then a first insulating material layer is formed on the substrate. A barrier layer is formed on the first insulating material layer, and a second insulating material layer is formed on the barrier layer. Then, a pattern transfer photoresist is formed on the second insulating material layer, and the pattern transfer photoresist defines an active area and a trench area. Then, using the pattern-transferred photoresist as a mask, the second insulating material layer, the barrier layer, the first insulating material layer, and a part of the substrate are sequentially etched to form a trench in the substrate. Then, a second insulating material layer is etched to form a cavity between the photoresist and the blocking layer. After that, the photoresist is removed, and then a third insulating material layer is formed in the trench as a lining layer. The second insulating material layer is used as a mask to etch the resist layer. The trench is then filled with insulating material to form a fourth insulating material layer. Then, the fourth insulating material layer to the barrier layer is planarized, and the steps further include planarizing the fourth insulating material layer to the second insulating material layer and removing the second insulating material layer. Then sequentially remove the barrier layer and remove the first barrier

Page 7 459339 V. Description of the invention (4), marginal material layer. In this way, the corners of the shallow trench isolation can be protected from exposure, and the double-peak phenomenon of the neck knot effect and thinning of the oxide layer can be avoided. 5-4 Detailed Description of the Invention: Some embodiments of the present invention will be described in detail as follows. However, in addition to the detailed description, the present invention can also be widely implemented in other embodiments, and the scope of the present invention is not limited, which is subject to the scope of subsequent patents. At the beginning of the electricity generation system, the separation of the electric separation and the sudden formation of the edges of the electric dew in the trench accumulation trench should be prevented, and the effect should be prevented. The flow of electricity and electricity creates leakage and compaction of the thin-layered oxygen gate, so that the 1EI difference lattice and force should be sheared due to the peak-free double system. Refer to the preferred embodiment of Figure 2A. First, A substrate 2 1 〇 is provided, and the material may be silicon. A first insulating material layer 2 1 2 is then formed on the substrate 2 10 as a pad oxide layer. For example, a silicon dioxide layer 2 1 2 is formed on a silicon substrate 2 10 by a thermal oxidation method. A barrier layer 2 1 4 is then deposited on the first insulating material layer 2 1 2. For example, a chemical vapor deposition method is used to deposit a silicon nitride layer 2 1 4 on the silicon dioxide layer 2 i 2. A second insulating material layer ^ 32 is then deposited on the barrier layer 214 as a dummy oxide layer. The emulsion blocking layer 232 may be formed of any material capable of producing an etching selectivity ratio with the barrier layer 2] 4. For example, female 丨 deposited chemical dioxide by chemical vapor deposition

4 5 9 33 9 V. Description of the invention (5) The silicon layer 2 3 2 is on the silicon nitride layer 2 1 4. Zhiming * Li 丨 m transferred photoresist 21 6 is used as an oxide blocking layer ^ 1 shadow technology to form a picture can be defined-active area and ditch silicon layer as above, and then use the pattern transferred photoresist 2 ^ 6 is, the dry etching method sequentially etches the oxide blocking layer 2 3 2, nitriding = anisotropic = and part of the dream substrate 21G to form-trenches immersed in the bottom oxide layer and then reuse the barrier layer And the floor oxygen floor money ratio is different-only within. Wet or wet etching method is used to etch part of the oxide blocking layer 2 3 2 and 11. The etching method is between the resist layer 216 and the nitride nitride layer 214. If the depth of the recess 234 to the light recess 234 is too deep as shown in the figure, tears will be caused. : ί: And make the active area smaller. 'If it is too shallow, then Y is not: prevent the big corner and 3◦. Between Egypt. Then remove the photoresist; = between 10. The material layer 222 is used as a lining layer in the trench 22. The second insulating material layer used as the second insulating material is a mask, and the step of preparing the 232 layer of the emulsified layer and the oxide blocking layer as the leather layer 214 are used. And form a replacement. For example, the sequence of the germanium barrier layer using the hafnium oxide method can be adjusted to each other in the trench 220, and then the silicon oxide layer 222 using the thermal phosphorous layer is shown in the figure. ^ Ratified silicon layer 2 1 4 ′ is the same as the second ◦ 2 2 4. For example, Tianwai and # λ ~ take one or four insulating materials, use silicon dioxide to sink, and pull the silicon dioxide to fill the silicon dioxide.

Page 9-9 33 9 5. In the description of the invention (6), a shallow trench isolation is formed, as shown in the second D figure. Then, the fourth insulating material layer 2 2 4 to the barrier layer 2 1 4 are planarized, and the steps include planarizing the fourth insulating material layer 2 2 4 to the second insulating material layer 2 3 2 and removing the second insulating material layer 2 3 2. To form a planarized fourth insulating material layer 2 2 4 a. For example, the silicon dioxide layer 2 2 4 that is used as a trench isolation is polished to a silicon dioxide layer 2 3 2 that is used as a barrier layer by a chemical mechanical polishing method, and then further polished to a nitride layer 2 that is used as a barrier layer 2 1 4 as shown in the second E diagram. Then, the barrier layer 2 1 4 and the first insulating material layer 2 1 2 are sequentially removed. For example, using thermal phosphoric acid to remove the silicon nitride layer 2 1 4 and hydrofluoric acid to remove the silicon dioxide layer 2 1 2 as the pad oxide layer, so as to prevent the corner 2 2 6 from being exposed, as shown in the second F diagram. As shown. This shallow trench isolation process for preventing corner exposure has been fully described in the second description of the above-mentioned description and the second A to F of the drawings. The protected corners 2 2 6 can avoid the problems of secondary initial voltage leakage current caused by charge accumulation and thinning of the gate oxide layer due to stress and lattice difference. The above are merely preferred embodiments of the present invention, and are not intended to limit the scope of patent application for the present invention; all other equivalent changes or modifications made without departing from the spirit disclosed by the present invention shall be included in the following Within the scope of patent application.

Page 10

The Λ RQ 3 3 Q diagram briefly illustrates the first A diagram is a cross-sectional view of a conventional shallow trench isolation after forming a pattern transfer photoresist; the first B diagram is a cross-sectional view after a traditional shallow trench isolation forms a third insulating material layer; Figure 1C is a cross-sectional view of a conventional shallow trench isolation after flattening a third insulating material layer; Figure 1D is a cross-sectional view of a conventional shallow trench isolation manufacturing method with exposed corners; Figure A is a shallow trench manufacturing Method to form a cross-sectional view after pattern transfer photoresist; Figure B is a cross-sectional view after forming a recess in this shallow trench manufacturing method; Figure C is a cross-sectional view after etching a partial barrier layer in this shallow trench manufacturing method The second D diagram is a cross-sectional view of the shallow trench manufacturing method after forming the fourth insulating material layer;

:: :) 3 3 9_ The diagram briefly illustrates the second E diagram of the shallow trench manufacturing method after flattening the fourth insulating material layer: and the second F diagram is the shallow trench preventing corner exposure manufacturing method completed Cross section. Representative symbols of main parts: 11 0 silicon substrate 1 1 2 pad oxide layer 1 1 4 silicon nitride layer I 1 6 photoresist II 8 active area 1 2 0 trench area 1 2 2 silicon dioxide layer 2 4 dioxide Silicon layer 126 corner 2 1 0 broken substrate 2 1 2 pad oxide layer 2 1 4 barrier layer 2 1 6 photoresist 218 active area 2 2 0 trench area 2 2 2 liner 2 2 4 insulation material layer

(Page 12) 9 33 9 Brief description of the drawing 2 2 6 Corner 2 3 2 Oxidation barrier _1_1 Page 13

Claims (1)

459339 6. Application patent scope 1 — A method for manufacturing a shallow trench isolation, including at least the following steps: providing a substrate; forming a first insulating material layer on the substrate; forming a barrier layer on the first insulating material Layer; forming a second insulating material layer on the blocking layer; forming a pattern transfer photoresist on the second insulating material layer, the pattern transferring photoresist defining an active area and a trench area; using the pattern The transferred photoresist is a mask, and the second insulating material layer, the blocking layer, the first insulating material layer and a part of the substrate are sequentially etched to form a trench in the substrate; etching the second insulation Material layer, forming a cavity between the photoresist and the barrier layer; removing the photoresist; forming a third insulating material layer in the trench as a lining layer; using the second insulating material layer as a cover 1 Ascaris engraved the barrier layer; filling the trench to form a fourth insulating material layer; planarizing the fourth insulating material layer to the barrier layer; removing the barrier layer; and removing the first insulating material layer. 2. The method according to item 1 of the patent application scope, wherein the above substrate contains at least a silicon substrate. 3. The method according to item 1 of the scope of patent application, wherein the first insulating material described above Page 14 339 6. Scope of patent application The material layer contains at least a dream dioxide layer. 4. The method of claim 3, wherein the method for forming the first insulating material layer includes at least a thermal oxidation method. 5. The method according to item 1 of the patent application range, wherein the barrier layer includes at least a silicon nitride layer. 6. The method according to item 5 of the application, wherein the method for forming the barrier layer includes at least a chemical vapor deposition method. 7. The method according to item 1 of the scope of patent application, wherein the second insulating material layer includes at least a dioxide layer. 8. The method according to item 7 of the application, wherein the method for forming the second insulating material layer includes at least a chemical vapor deposition method. 9. The method according to item 1 of the patent application scope, wherein the method for forming the trench described above includes at least an anisotropic dry etching method. 10. The method according to item 1 of the scope of patent application, wherein the above method for forming the cavity includes at least an anisotropic dry money engraving method. 1 1. The method according to item 1 of the scope of patent application, wherein the third insulating material described above Page 15 d 59 33 9 VI. Scope of patent application The material layer contains at least a layer of stone dioxide. 12. The method according to item 11 of the scope of patent application, wherein the method for forming the third insulating material layer includes at least a thermal oxidation method. 1 3_. The method according to item 1 of the patent application range, wherein the method for etching the barrier layer includes at least an anisotropic dry etching method. 1 4. The manufacturing method according to item 1 of the scope of patent application, wherein the fourth insulating material layer includes at least a silicon dioxide layer. 15. The method according to item 14 of the scope of patent application, wherein the method for forming the fourth insulating material layer includes at least a chemical vapor deposition method. 16. The method of claim 1, wherein the method for planarizing the fourth insulating material layer to the barrier layer at least includes: planarizing the fourth insulating material layer to the second insulating material layer; and removing The second insulating material layer. 17. The method according to item 16 of the scope of patent application, wherein the method for planarizing the fourth insulating material layer to the second insulating material layer includes at least a chemical mechanical polishing method (CMP). 1 8. The method according to item 16 of the scope of patent application, wherein the above removal of the second absolute Page 16 459339 VI. Scope of patent application The method of the edge material layer includes at least chemical mechanical polishing (CMP). 19 · The method according to item 5 of the scope of patent application, wherein the method for removing the barrier layer includes at least a method of engraving the last name. 20. The method according to item 19 of the scope of patent application, wherein the etching method mentioned above includes at least a thermal phosphoric acid removal method. 21 1. The method according to item 3 of the scope of patent application, wherein the method for removing the first insulating material layer includes at least a wet money engraving method.至 法 刻 # Hai == The item 2 of the French method mentioned above. In order to remove the acid and remove the acid from the law, please include fluorine. Nitrogen is included. Package 2 2 Steps are listed below. The package contains as little as the French method. The bottom of the shallow seed material can be extracted into a shape. The upper and lower layers of silicon are converted to silicon oxide on the first layer, and the silicon is broken on the silicon layer. The second layer is the upper layer. Oxygen Transfer Case II Picture Oxygen Site II = ° 刻 • '# domain sequence area according to canal' A ditch curtain and a main shift-escape for the optical movement of the domain resistance area The plan is to block the middle movement of the light Bottom of the material bottom * ν- ° β! Stand and layer silicon dagger > 1 oxygen; an inner material, the bottom 'silicon layer, the yarn in the chemical channel nitrogen trench, and the' layered silicon ' Page 17 4 5 9 33 9 6. The scope of the patent application is to etch the second silicon oxide layer to form a cavity between the photoresist and the silicon nitride layer; remove the photoresist; form a third silicon oxide layer As a lining layer in the trench; using the second silicon oxide layer as a mask to etch the silicon nitride layer; filling the trench to form a fourth silicon oxide layer; planarizing the fourth silicon oxide layer to the nitrogen Siliconizing the layer; removing the silicon nitride layer; and removing the first oxide layer. 24. The method according to item 23 of the scope of patent application, wherein the method for forming the first oxide layer includes at least a thermal oxidation method. 25. The method according to item 23 of the scope of patent application, wherein the method for forming the silicon nitride layer includes at least a chemical vapor deposition method. 26. The method according to item 23 of the scope of patent application, wherein the method for forming the second silicon oxide layer includes at least a chemical vapor deposition method. 2 7. The method according to item 23 of the scope of patent application, wherein the above method for forming the ditch includes at least an anisotropic dry-cut method. 28. The method according to item 23 of the scope of patent application, wherein the method for forming the above pits includes at least an anisotropic etching method. Page 18 459339 6. Application scope of patent 29. The method according to item 23 of the scope of patent application, wherein the method for forming the third silicon oxide layer includes at least a thermal oxidation method. 30. The method according to item 23 of the scope of patent application, wherein the method for etching the nitrided layer includes at least an anisotropic button-etching method. 31. The method of claim 23, wherein the method for forming the fourth silicon oxide layer includes at least a chemical vapor deposition method. 32. The method of claim 23, wherein the method for planarizing the fourth silicon oxide layer to the silicon nitride layer at least includes: planarizing the fourth silicon oxide layer to the second silicon oxide layer. ; And removing the second silicon oxide layer. 33. The method according to item 32 of the scope of patent application, wherein the method for planarizing the fourth silicon oxide layer to the second silicon oxide layer includes at least a chemical mechanical grinding method (CMP). 34. The method according to item 32 of the scope of patent application, wherein the method for removing the second silicon oxide layer includes at least a chemical mechanical polishing method (CMP). 35. The method of claim 23, wherein the method for removing the silicon nitride layer includes at least a thermal phosphoric acid method. Page 19 4 5 9 33 9 Page 20