TW200524154A - Structure and manufacturing method of thyristor - Google Patents

Abstract

The present invention discloses a structure and manufacturing method of thyristor. In order to decrease the junction capacitance, the present invention decreases the doping concentration of the substrate, but in the mean time, the breakdown voltage or switching voltage would increase. This is not acceptable in some application. In order to solve this contradiction, the present invention adds another medium doped impurity diffusion layer to the anode. The doping concentration of this layer is higher than the doping concentration of the substrate. Therefore decreasing the switching voltage. A low junction capacitance as well as the desired switching voltage can be obtained.

Description

20052415 15. Description of the invention (1) 1. The technical field to which the invention belongs The present invention relates to the improvement of closed-fluid structures, especially a substrate # After the impurity concentration of the substrate is reduced to reduce the junction capacitance, a layer of acoustic noise is added to the anode The impurity impurity diffusion layer is used to reduce the switching voltage (/ switch technology), which is also known as si 1 icon control rectifier (SCR). It has a higher forward blocking ( blocking or OFF impedance, and can pass through a large amount of current when break-through or switching occurs, so it is widely used in industry, mainly for power control. The structure is as shown in Figure 1. It is an npnp or pnpn structure, usually on a n-type substrate 106, with a layer doped with ion implantation on both sides. 1) 1 layer 104 and layer 108, and then The anode is formed with the η1 layer 102 by an ion implantation or diffusion method, and then contacts are formed between the anode and the cathode. Refer to FIG. 2 'FIG. 2 is a schematic diagram of a voltage drop and a dead zone of a conventionally constructed gate fluid when a forward bias voltage is applied. When forward bias is applied, the first np junction 202 is forward biased, but the second pn junction 204 J2 is reverse biased and the doping concentration of Pl is greater than the doping concentration of%, so Most of the empty area is on one side, and the third surface 206 J3 is forward biased. The doping concentration of ~ determines the breakdown voltage or cut-in voltage of \, by the following formula

Page 5 200524154 V. Description of the invention (2) means: V £ s £ m2 / 2qNB (1) where £ s is the permittivity of the semiconductor, which is the maximum electric field, q is the charge of the electron, and Nβ is the percentage of From the formula (1), we know that the doping concentration of 1¾ (NB in the formula) is low and the cut-in voltage is high. Conversely, if the doping concentration of% is high, the cut-in voltage is low, so it is generally to obtain, for example, 300 volts. The cut-in voltage 'doping concentration of the substrate is generally 1 X 丨 〇1δ at〇m / cm3 or the resistivity is about 5D-cm, and when the cut-in is turned on,' J2 to Ja are not completely empty, or not PUnch through, so its cut-in voltage is determined by the doping concentration of ytterbium. Another important parameter is the depletion-layer capacitane (C), which is expressed by the following formula: C = (q £ s NB / 2 (Vbi ± V)) i / 2 where Vbi is the built-in potential (built- in potential), V is the applied voltage, and NB is the doping concentration. From the formula (2), it can be known that the junction capacitance is directly proportional to the square of the impurity concentration of n, that is, the doping concentration is high, the junction voltage is high, the doping concentration is low, and the junction capacitance is also low. If the capacitance of junction L is q,

Page 6 200524154 V. Description of the invention (3) The capacitance of (3) is (: 2, and the capacitance of junction j3 is c3, so since q, C2 and (: 3 are connected in series, the total electricity C is ·· Cl / Cl / Q + 1 / C2 + 1 / C3) (3) However, ci and dagger are very large, so the capacitance of C and C2, that is, the capacitance of the entire gate fluid is equal to the capacitance of junction A, which is determined by the doping concentration of n2. Figure 3 is the previous The structural cross-section of the sluice of technology. To simplify the description, only its internal structure is shown. Others such as metal contact and packaging are not shown. After determining the cut-in voltage of the sluice, choose one with the desired breakdown (cut-in) voltage Ir-type doped silicon wafer 3 02, for example, the cut-in voltage specification is 300 volts, then the doping concentration of ytterbium is taken as! X i〇15at〇m / cm3, or the resistivity is 5 Ω-cm 'in the wafer Both sides are implanted with p-type doping 306 and 310, and gallium (Gallium) is generally implanted. The doping concentration is 5 x 1015at〇m / cm3s5 x 1016 atom / cm3, which is activated by high temperature (activation) or After the diffusion, the depth of the junction is about 40 // m to 50, and then the anode n + 304 is formed by diffusion on the first side, and the anode # "? Is formed where the second side is not opposite. A part with n + 304 on one side forms a gate fluid structure of n + p ^ p2, and a part on the second side forms a gate fluid structure of n + hhh. This prior art has a deficiency because its cut-in voltage requires a highly doped% substrate Therefore, its junction capacitance 'female' is between 80 ~ 85ρί. For customers who require low junction capacitance, there is a demand for it, hoping to reduce the capacitance of the sluice fluid and still keep the cut. Pressed to a certain value Injustice

200524154

V. Description of the invention (4) 3. Summary of the invention The purpose of the present invention is to provide a substrate with a lower doping concentration to reduce the junction. Another object of the present invention is to provide a method of implanting a dopant in a separate layer in the emitter region, and Drive in its junction to lower the cut-in voltage. Gate fluid structure and manufacturing method to make capacitor, a gate fluid structure and manufacturing method doped first type (such as n-type) under the first type (such as p-type), in order to achieve the above and other purposes, and improve Disadvantages of the prior art that cannot simultaneously reduce capacitance and maintain cut-in voltage, a first aspect of the present invention provides a sluice fluid structure 'after the substrate doping concentration is reduced to reduce the junction capacitance, a moderately doped impurity diffusion layer is added to the anode. When the gate fluid is forward biased, 'the second junction is reverse biased, and its breakdown voltage is determined by the moderately doped impurity diffusion layer' to reduce the switching voltage, at least including: a type 1 The substrate has a doping concentration suitable for the required small junction capacitance; the second type first impurity diffusion layer on the front and back of the substrate is formed of impurities with a lower diffusion coefficient, and the depth of the junction J2 is: The first type 2 second moderately doped impurity diffusion layer under the second type 1 first impurity diffusion layer on the reverse side, and the first type 2 second moderately doped impurity diffusion layers on the front and back sides do not face each other and intersect each other. Diffused deeper than a first-type second impurity diffusion layer and under the first-type second impurity diffusion layer of the junction depth La

Page 8 ^ 200524154 V. Description of the invention (5) "'2; The first type of third impurity diffusion layer on the front and back of the substrate is located in the second type of first impurity diffusion layer, which is doped with high concentration and interacts with metal Form an ohmic contact. A second aspect of the present invention provides a method for manufacturing a gate fluid, in which the doping concentration of the substrate is reduced to reduce the junction capacitance, and a moderately doped impurity diffusion layer is added to the anode. When the gate fluid is forward biased, The second junction is reverse biased 'when 第一 1¾ the first moderately doped diffusion layer reaches the breakdown voltage', which is turned on to reduce the switching voltage. It includes at least the following steps: (a) Prepare a first Type substrate, choose its doping concentration to suit the smaller junction valley, (b) use ion implantation on the front and back sides of the substrate to form a type 1 second moderately doped impurity diffusion layer. The second moderately doped impurity diffusion layers do not face each other and are staggered with each other, and the depth of the interface is 4; (c) The second type impurity diffusion layer is implanted with ions on the front and back sides of the substrate, which has a lower diffusion coefficient. Impurity formation, the depth of junction B is i; (d) using ion implantation to form a first type high-concentration doped third impurity diffusion layer in a first type second moderately doped impurity diffusion layer, To form ohmic contact with the metal; (e) complete metallization and etching Carving, isolation, packaging and other processes. 4. Embodiment The content of the present invention can be disclosed through the following embodiments in conjunction with the description of its related drawings. Referring to FIG. 4, FIG. 4 is a plan view of a sluice fluid structure according to an embodiment of the present invention. In order to simplify the description, only the internal structure of the wafer 'is shown. Others such as metal contacts, packages, etc. are not shown. On the substrate 50

Page 9 20052415 ^ V. Description of the invention (6)-There is a first type (n-type in this example) heavily doped #contact region 5504, 513, and in the second type (p-type in this example) The i-type doped layers 111512, 514 under the Pl layer (refer to Figure 5 (c)), whose area is only less than 1/2 of the gate fluid area, and the 11+ contact area indicated by the dashed line of the other half of the substrate 502 The 513 and 111 layers 514 are on the opposite side of the substrate 502 and are another gate fluid. The front and back gate fluids are symmetrical. The front sluice fluid is responsible for the positive half wave, and the negative sluice fluid is responsible for the control of the negative half wave. Refer to FIG. 5 'FIG. 5 is the manufacture of the A-A line of the sluice fluid edge according to the embodiment of the present invention. Sectional view of the process. As shown in Figure 5 (a), after determining the appropriate value of the interface capacitance of the sluice fluid, choose the first type (the n type in this example) that has the minimum doping concentration of the interface capacitance at the desired blocking. ) Substrate 5 0 2 For example, if you want to double the junction capacitance, then formula (2) should be reduced by 10 times under a certain applied voltage. For example, the original doping concentration is 1 X 1015at〇m / cm3, it will be reduced to 5x 1013at〇m / cm3s9x 1014at〇in / cm3, that is, the resistivity p will be increased from 5 Q-cin to 6 Ω-cm to 100 Ω-cm, which will reduce the capacitance value by 10 times. However, the breakdown voltage% at this time, as shown in equation (3), increases to about 1 000 volts or more (refer to SM · Sge, "Physics of

Semiconductor Devices "page 115 FIG. 23), which has not met the required specifications. This is the second problem to be solved by the present invention, and then the ion implantation concentration is higher (for example, 10 times more than NB, such as 5 X 〇14at〇). m / cm3 to 5 X 1015at〇m / Cm3), i-type second moderately doped ηm layers 512, 514 are in a predetermined area on the front and back sides, and this second moderately doped ηm layer 5 丨 2, 5 The area of 4 is smaller than the area of the sluice fluid, which is only / 2 of the area of the sluice fluid.

Page 10 200524154 V. Description of the invention (7) Electric valley will not increase. And its positions on the front and back sides are not opposite and intersect each other, as shown in Figure 5 (a). Then, as shown in Figure 5 (b), the conventional method is to implant the second type (p-type in this example) doped with 506 and 510 on both sides of the wafer. The impurity of this layer should be the one with the lower diffusion coefficient. In general, p-type implanted gallium "丨 丨 ⑽", n-type implanted 珅 (Asenic) 'the doping concentration is about 5x10i5at〇m / cm3 to 5x1016atom / cm3, after activation or diffusion at high temperature, The junction depth is about 40 // m to 50 // Hi. At this time, because the concentration of type 2 doping is higher than that of 512 and 514 of the second moderate doping of j type, The second type doping is neutralized and is still the second type doping. The second moderate doping layer of the first type exists only near the Pji junction, as shown in Figure 5 (b) and (c). ). Finally, the third impurity doped with the inter-type 1 concentration is diffused into the second-type impurity diffusion layer 5 0 6 5 1 0 ′ by the diffusion method to form a heavily doped contact region $ 〇4, 5 13 for the ohmic contact. Finally, the subsequent processes such as etching the U-shaped isolation trench 516, metallization, passivation, packaging, etc. are all known to the person. Here, FIG. 6 is based on the present invention. Examples of brake fluid Schematic diagram of the potential of the applied voltage in the sluice fluid and the depleted region (depiet ⑽ reg10n) under the blocking L. Under the forward bias of the anode A to the cathode κ, the first junction is the forward bias. The type 2 diffusion layer 5 in 06 and 510 can be ignored, and the second junction L is reversely biased to 2, and the second wide-doped diffusion layer 512 and 514 reach the breakdown voltage. It is turned on immediately, and the H through Λ voltage is lower than the breakdown voltage of the substrate. Although the junction capacitance is increased, the area of the first type second moderately doped diffusion layers 512 and 514 is larger than that of the gate fluid.

200524154

V. Description of the invention (8) The area is small, so the capacitance has not increased, but can be reduced instead. This mechanism is a significant discovery of the present invention. After the substrate doping concentration is reduced to reduce the junction capacitance, the first type second moderately doped diffusion layer using ion implantation is located below the second type diffusion layers 5 0 6 and 5 1 0. High, the breakdown voltage can be reduced by%, and the cut-in voltage can be reduced to the original rated value. 'Figure 7 is an equivalent circuit diagram of the junction capacitance of the second gate fluid in the forward conduction state according to the embodiment of the present invention. Under forward bias, the capacitance of junction 丨, 3, and Js is set to Q, and the second junction is due to reverse bias, and its capacitance is set to d. The two capacitors are connected in series, as shown in Figure 7 The equivalent circuit on the left, and the capacitance of the other sluice fluid on the right, are set to ,, &,. If the positive and negative capacitances are connected in parallel, the electricity of the sluice fluid is obtained. According to the present invention, the doping concentration of the substrate is 1 × 1015aWcm3, and its equivalent electrical efficiency is equal to 0 °. If the structure of the present invention is used, the doping concentration of the substrate = surface electricity, 20% »^ -1 # ^ The area occupied by Shanshan is 1/5 of the total area, that is, 20%. The valley of electricity should be C = 85pfx 0.2 + 85X 0.8 = 24pf. So # + throughout the example, the cut-in voltage can be maintained at 300 P, so based on this low level, it can effectively solve the problem of too much contact capacitance: It is also possible to reduce the description of the characteristics of this creation ^ ⑯ 例 的 _34. It is hoped that more specific examples can be used to limit the present disclosure and 2 with the better hopes disclosed above. On the contrary, the purpose is to change and arrange the same

200524154 V. Description of invention (9) within the scope of patent. limi -200524154 Brief description of the diagram 5 · Brief description of the diagram: Figure 1 shows the conventional structure of the prior art brake fluid. Figure 2 is a schematic diagram of the voltage drop and empty region of the conventionally constructed sluice fluid when a forward bias is applied. FIG. 3 is a cross-sectional view of the structure of the prior art sluice fluid. FIG. 4 is a plan view of a sluice structure according to an embodiment of the present invention. Fig. 5 is a cross-sectional view of the manufacturing process of line A_A in Fig. 4 of the sluice edge according to the embodiment of the present invention. FIG. 6 is a schematic diagram of a potential and a depletion region of an applied voltage in the sluice fluid in a forward blocking state according to an embodiment of the present invention. Fig. 7 is an equivalent circuit diagram of the junction capacitance of the second gate fluid in the forward and backward directions according to the embodiment of the present invention. DESCRIPTION OF SYMBOLS: 1 02 η-type layer 106 η-type substrate 202 first ηρ junction 206 third ηρ junction 3 0 4 anode 31 0 ρ-type doping 104 108 204 302 306 312 P-type layer P-type layer second Pη-connection Face anode

20052415 Seven diagrams briefly explain 502 type 1 substrates 504, 513 type 1 highly doped third impurity diffusion layers 506, 510 type 2 first diffusion layers 512, 514 type 1 second moderately doped layers 5 1 6 U-shaped isolation trench

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Claims (1)

200524154 VI. Application scope of patent '" 1 Two types of gate fluid structure' After the substrate doping concentration is reduced to reduce the junction capacitance, an anode diffusion layer with a moderately doped impurity diffusion layer is added to the gate fluid. When biasing, the second junction is reverse biased, and its breakdown voltage is determined by the moderately doped impurity diffusion layer to reduce the switching voltage. At least: a type 1 substrate with a suitable doping concentration Smaller junction capacitance required; ^ Type 2 first impurity diffusion layer on the front and back sides of the substrate, formed of impurities with a lower diffusion coefficient, and the depth of the junction A is mountain; Type 2 on the front and back sides of the substrate The first type second moderately doped impurity diffusion layer under the first impurity diffusion layer, and the first type second moderately doped first mass diffusion layers on the front and back sides are not opposed to each other and intersect with each other, and the diffusion is deeper than that of the second type. The first impurity diffusion layer of the first type, and the junction depth below the second type of the first impurity diffusion layer is d2; the first type of the third impurity diffusion layer on the front and back of the substrate is located on the second type of the second impurity diffusion layer. Inside 'is a high concentration doping, forming an ohmic connection with the metal touch. 2 · The sluice fluid structure of item 1 of the patent application scope, in which the type 1 substrate is a silicon substrate. 3. The sluice fluid structure of item 1 in the scope of patent application, in which the type 1 base conversely has a dopant concentration of 5 x 1013 atom / cm3 to 9 x 1014 at 0ffl / cm3. 4. If the gate fluid structure of the scope of patent application item 丨, type 2 Page 16 200524154 6. Scope of patent application The impurity of the impurity diffusion layer is gallium (Gal 1 ium). 5. The sluice fluid structure according to item 1 of the scope of patent application, wherein the impurity of the second type impurity diffusion layer is boron. 6. The gate fluid structure of item 1 of the scope of patent application, wherein the impurity of the second type first impurity diffusion layer is phosphorous (phoshorous) if it is n-type. 7. The sluice fluid structure according to item 1 of the scope of patent application, wherein the doping concentration of the second type first impurity diffusion layer is 5 X 1 〇14at〇m / cm3 to 5 χ 1 〇15 atom / cm3 〇8 The sluice fluid structure of the first item of the patent application scope, wherein the junction depth d1 of the second type first impurity diffusion layer is 10 to 20 // in. 9. For example, the gate fluid structure of the scope of the patent application, wherein the doping concentration of the type 1 second moderately doped impurity diffusion layer is 5χ to 5 X 1015 atom / cm3 〇1 0 The sluice fluid structure of the item, wherein the area of the i-type second moderately doped impurity diffusion layer is 1/2 to 1/5 of the sluice fluid area. 11. The gate fluid structure of item i in the scope of patent application, of which type 1 Page 17. 200524154 Sixth, the scope of the patent application The second moderately doped impurity diffusion layer has a diffusion depth d2 of 4 // m to 50 β m 〇1 j · A method for manufacturing a gate fluid, doping concentration on the substrate Reduce to reduce the junction capacitance, and add a layer of moderately doped impurities to the anode. When the gate fluid is forward biased, the second junction is reverse biased and moderately doped in the first. When the diffusion layer reaches the breakdown voltage, it will turn on and collapse. The first two steps: reduce the switching voltage (at least including the lower (:) plane quasi-electrical reserve capacity-a type 1 substrate). Select its doping concentration to suit the required The impurity lb is formed on the front and back sides of the substrate by ion implantation to form a type 1 second moderately non-opposed and phase St layer. The second moderately doped impurity diffusion layers on the front and back sides are not opposed and staggered with each other. The depth of the surface is Tun; a heterogeneous plate / the reverse side uses the diffusion method or ion implantation of the second type of the second deep ΠΓ impurity coefficient with a lower dispersion coefficient, the interface J2 formula or (from d) on the second planting ^: Diffusion is used in the moderately doped impurity diffusion layer to form ohmic contact with the metal; 4 The second impurity diffusion layer (0 completes the processes of metallization, etching, isolation, packaging, etc.) Shi Xiji 1 Board 3. If the method of applying for the scope of the patent No. 12, wherein the type 1 substrate is -200524154 VI. Application Patent scope 1 4 · As in the method of applying for patent scope item 丨 2, wherein the doping concentration of the type 1 substrate is 5 × 1013at〇m / cm3 to 1014at〇m / Cffl3. 1 5 · If the scope of patent application The method according to item 丨 2, in which the impurities of the second type of the first miscellaneous expansion layer are Galium. 1 6 · As in the method of item No. 丨 2 in the scope of patent application, wherein the second type is the first impurity diffusion layer The impurity is boron. 17 · If the method of the scope of patent application No. 12, wherein the impurities of the second type of the first heterogeneous Wuzheng layer is η-type, then it is phoshorous. 18 · If the scope of patent application is the 12th The method of item 2, wherein the doping concentration of the second type first impurity diffusion layer is 5x1015 atom / cm3 to 5x1016at〇m / cm3 〇1. 9 The method of the second item of the patent application, wherein The junction depth of the second type first impurity diffusion layer is 20 // 111 to 40 // m. The method of 2 items, in which the impurity concentration of the type 1 second medium 4 miscellaneous shell expansion layer is i0i4at〇 / cm3 to 1〇15atom / cm3 ° Page 19, 20052415 ^ VI. Patent Application Range 2 1. The method as described in item 12 of the patent application range, wherein the area of type 1 second moderately doped impurity diffusion layer is 1/5 of the area of the gate fluid 1/2. 2 1. The method according to item 12 of the scope of patent application, wherein the junction depth d2 of the first type second moderately doped impurity diffusion layer is 40 // 111 to 50 // m. Page 20