TW200522243A - Method for identifying defective substrate - Google Patents
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- TW200522243A TW200522243A TW092137575A TW92137575A TW200522243A TW 200522243 A TW200522243 A TW 200522243A TW 092137575 A TW092137575 A TW 092137575A TW 92137575 A TW92137575 A TW 92137575A TW 200522243 A TW200522243 A TW 200522243A
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- 239000000758 substrate Substances 0.000 title claims abstract description 203
- 238000000034 method Methods 0.000 title claims abstract description 79
- 230000002950 deficient Effects 0.000 title claims abstract description 15
- 238000004806 packaging method and process Methods 0.000 claims abstract description 15
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 claims description 18
- 230000003287 optical effect Effects 0.000 claims description 12
- 229910002092 carbon dioxide Inorganic materials 0.000 claims description 9
- 239000001569 carbon dioxide Substances 0.000 claims description 9
- 229910000679 solder Inorganic materials 0.000 claims description 6
- 238000000608 laser ablation Methods 0.000 claims description 2
- 238000000465 moulding Methods 0.000 abstract description 8
- 235000012431 wafers Nutrition 0.000 description 18
- 239000004065 semiconductor Substances 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 7
- 238000003491 array Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 239000003822 epoxy resin Substances 0.000 description 4
- 238000010330 laser marking Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 238000011109 contamination Methods 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- 230000001788 irregular Effects 0.000 description 3
- 238000012858 packaging process Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 239000002699 waste material Substances 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 239000002689 soil Substances 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000002372 labelling Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000010943 off-gassing Methods 0.000 description 1
- 239000010816 packaging waste Substances 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 238000011179 visual inspection Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
200522243 五、發明說明（1) 【發明所屬之技術領域】·· 本發明係關於一種在半導體製程中，辨識損壞基板單 元（Substrate Unit)之方法，尤指一種在半導體封裝製 程中，無須人工重複標記（M a r k i n g)便可辨識出損壞基 板單元，以免損壞基板單元流入後續製程之辨識劣品基板 之方法。 【先前技術】： 基板製作完成以後，一般會將大片基板（Substrate P a n e 1)切割成多片基板片（S u b s t r a t e S t r i p)並經開閉 路（0 p e η / S h o r t)之電性測試，以供後續之封裝作業。每 一片基板片包含有數個基板單元（Unit)，經過上片 (Die Bonding)、銲線（Wire Bonding)、模壓 (Molding)及切單（Singulation)等製程，使各個基板 早元上植妥晶片及其他電子元件後，即製作成一半導體封 裝件。 然而，當基板廠於製作中發現基板不良品時，通常會 配合封裝廢要求’以人工方式在損壞的基板單元上塗佈油 墨（Ink)標記C Marking)，以免晶片黏接至損壞基板單 元上形成不良品。 傳統的彳示β己方法’如弟7圖所示，係先利用光學檢測 或外觀檢查等方式在該基板片3上逐一檢視基板單元3 i， 當發現基板片3上出現損壞基板單元3 1 ’時，於該損土穿某板 單元31’封裝線（Packaging Line)外之邊條簡單地註記 上不良品記號3 8 ;然後，將該含有損壞基板單元3 1，之某200522243 V. Description of the invention (1) [Technical field to which the invention belongs] ... The present invention relates to a method for identifying a damaged substrate unit in a semiconductor manufacturing process, especially a semiconductor packaging process without manual repetition. Marking can identify the damaged substrate unit, so as to prevent the damaged substrate unit from flowing into the subsequent process to identify the inferior substrate. [Previous technology]: After the production of the substrate is completed, a large substrate (Substrate Panel 1) is generally cut into multiple substrate slices (Substrate S trip) and subjected to electrical tests of open and closed circuits (0 pe η / Short). For subsequent packaging operations. Each substrate chip includes several substrate units, and through processes such as die bonding, wire bonding, molding, and singulation, the wafers are implanted on each substrate early. And other electronic components, a semiconductor package is made. However, when a substrate factory finds a defective substrate during production, it usually cooperates with the packaging waste requirement to manually apply an ink (Ink) mark on the damaged substrate unit to prevent the wafer from sticking to the damaged substrate unit. Formation of defective products. The traditional method of showing β is shown in Figure 7. First, the substrate unit 3 i is inspected one by one on the substrate sheet 3 by optical inspection or visual inspection. When the substrate unit 3 is found to be damaged on the substrate sheet 3 1 ', When the damaged soil passes through a certain board unit 31' outside the packaging line (Packing Line) simply mark the defective product number 3 8; then, the damaged substrate unit 31,
17608矽品.ptd 第9頁 200522243 五、發明說明（2) 扳片置入一油墨標記機（未圖示），俾藉由網版印刷技術 ί： Screen Printing)在該損壞基板單元31’上刷上油墨34 (Ink)，再進行烘烤（Curing)及清洗作業（Cleaning )，使得形成於損壞基板單元3 Γ置晶區外側之基準點3 5 (Fiducial Mark)可為該油墨3 4所遮覆。 惟，此種油墨塗佈作業會增加封裝的製程及成本，易 使標記油墨在烘烤（Cur 1 ng)期間因為油墨溶劑之蒸發產 生揮發氣體釋散（即釋氣現象（Outgasing))而污染至 -其他正常基板單元。而且，當進行模壓製程（Molding) ，基板片夹置於上下模具之間，模具產生之高溫亦容易 造成油墨軟化而導致標記處之油墨沾染到模具表面，使得 模壓完成後，原標註在損壞基板單元之標記處不易判讀， 而需要再次以人工重複標記而增加成本。 故，美國專利第6, 4 6 8, 8 1 3號案 n METHOD 0F AUTOMATI- CALLY IDENTIFYING AND SKIPPING DEFECTIVE WORK PIECES FOR WIRE-BONDING OPERATION，，、第 6,021，563號案"MARKING BAD PRINTED CIRCUIT BOARDS FOR SEMIC0NDUCJ0R PACKAGES”及第 6, 392, 289號案 n INTEGRATED CIRCUIT SUBSTRATE HAVING THROUGH HOLE -#ARKINGS TO INDICATE DEFECT I VE/ΝΟΝ- DEFECTIVE S T A T U S〇F S A Μ E n於是提出多種用於辨識損壞基板單元之 方法。 美國專利第6，4 6 8，8 1 3號案揭示之方法，如第8圖所 示，係在基板片3的損壞基板單元3 1 ’上以白色墨水劃上記17608 silicon product. Ptd page 9 200522243 V. Description of the invention (2) Put the trigger into an ink marking machine (not shown), and use the screen printing technology (Screen Printing) on the damaged substrate unit 31 '. Brush the ink 34 (Ink), and then perform the curing and cleaning operations, so that the fiducial mark 3 5 (Fiducial Mark) formed on the outside of the damaged substrate unit 3 Γ can be the ink 3 4 Cover. However, this ink coating operation will increase the packaging process and cost, and it is easy for the marking ink to be polluted during Curing (Cur 1 ng) due to the evaporation of the ink solvent to generate volatile gas release (ie, outgasing) and contamination. To-other normal substrate units. In addition, when the molding process is performed, the substrate sheet is sandwiched between the upper and lower molds. The high temperature generated by the mold also easily causes the ink to soften and cause the ink at the mark to contaminate the mold surface. After the molding is completed, the original mark is on the damaged substrate The marking of the unit is not easy to read, and it is necessary to repeat the marking manually to increase the cost. Therefore, US Patent No. 6, 4 6 8, 8 1 3 Method 0F AUTOMATI- CALLY IDENTIFYING AND SKIPPING DEFECTIVE WORK PIECES FOR WIRE-BONDING OPERATION, No. 6,021,563 " MARKING BAD PRINTED CIRCUIT BOARDS FOR SEMIC0NDUCJ0R PACKAGES "and No. 6, 392, 289 n INTEGRATED CIRCUIT SUBSTRATE HAVING THROUGH HOLE-# ARKINGS TO INDICATE DEFECT I VE / NON- DEFECTIVE STATUS〇FSA Μ E n proposed a variety of methods for identifying damaged substrate units. The method disclosed in Patent No. 6, 4 6 8, 8 1 3, as shown in FIG. 8, is marked on the damaged substrate unit 3 1 ′ of the substrate sheet 3 with white ink.
]7608石夕品.ptd 第10頁 200522243 五、發明說明（3) 號3 2，使該損壞基板單元3 1 ’能與其他正常基板單元隔 開，以利上片與銲線機台（未圖示）辨識；然後，於該損 壞基板單元3 1 ’預設之晶片接置區3 1 2上塗覆一環氧樹脂作 為不規則標記（I r r e g u 1 a r M a r k) 3 3，使上片機台與銲線 機台（Wire Bonder)(未圖示）内建的識別系統可以藉 由該不規則標記3 3辨認出損壞基板單元3 1 ’的所在位置， 而不會產生誤植晶片造成浪費之情事。 惟此種方法雖然是在晶片接置區3 1 2上以不規則形狀 之環氧樹脂作為標記，但本質上仍需使用油墨標記而無法 克服上述問題。 又，美國專利公告號第6，0 2 1，5 6 3號案及第6，3 9 2，2 8 9 號案則提出一種於基板片上打孔或鑽孔（Dr 1 1 1 1 ng)之方 式來辨識損壞基板單元。第6，0 2 1，5 6 3號案揭示的方法， 如第9圖所示，係在進行上片作業前先在每一基板單元3 1 外開設一開孔3 1 3，該開孔3 1 3内覆有如光阻等不透光物質 (未圖示）；然後，根據基板單元3 1是正常或是損壞之判 斷結果，選擇性地移除掉開孔3 1 3内的不透光物質，使得 各基板單元3 1放入上片機台（未圖示）以後，機台只須以 雷射光源偵測開孔3 1 3中有無不透光物質，即能判斷出基 板單元3 1是否損壞。 第6，3 9 2，2 8 9號美國專利案揭示之方法，則如第1 0圖 所示，在基板片3的每一基板單元31(包含正常基板單元 及損壞基板單元）上預先定義出一晶片接置區3 1 2 ( D 1 e Μ〇u n t i n g R e g i〇η)、一位於該晶片接置區3 1 2外之封膠模] 7608 石 夕 品 .ptd Page 10 200522243 V. Description of the Invention (3) No. 3 2 so that the damaged substrate unit 3 1 ′ can be separated from other normal substrate units, so as to facilitate the film loading and the wire bonding machine (not (Pictured) identification; then, the damaged substrate unit 3 1 ′ is preset with a wafer receiving area 3 1 2 coated with an epoxy resin as an irregular mark (Iregu 1 ar Mark) 3 3 to make the loader The built-in identification system of the table and the wire bonder (not shown) can identify the location of the damaged substrate unit 3 1 ′ through the irregular mark 3 3 without causing waste by mistakenly implanting the wafer. Love affairs. However, although this method uses an irregularly shaped epoxy resin as a mark on the wafer receiving area 3 1 2, it is still necessary to use an ink mark in essence to overcome the above problems. In addition, U.S. Patent Publication Nos. 6,0 2 1,5 6 3 and 6,3 9 2, 2 8 9 propose a method of drilling or drilling holes in a substrate sheet (Dr 1 1 1 1 ng). Way to identify the damaged substrate unit. In the method disclosed in No. 6, 0 2 1, 5 6 3, as shown in FIG. 9, an opening 3 1 3 is opened outside each substrate unit 3 1 before the loading operation is performed. 3 1 3 is covered with an opaque substance (not shown) such as a photoresist; then, according to the judgment result of whether the substrate unit 31 is normal or damaged, the opaque inside the opening 3 1 3 is selectively removed. Light substance, so that after each substrate unit 31 is put into the loading machine (not shown), the machine only needs to detect the presence of opaque substances in the opening 3 1 3 with the laser light source, and then the substrate unit can be judged. 3 1 Whether it is damaged. The method disclosed in U.S. Patent No. 6, 3 9 2, 2 8 9 is defined in advance on each substrate unit 31 (including normal substrate unit and damaged substrate unit) of the substrate sheet 3 as shown in FIG. 10. A wafer receiving area 3 1 2 (D 1 e Mounting R egi〇η), and a sealing mold located outside the wafer receiving area 3 1 2
17608石夕品.ptd 第11頁 200522243 -五、發明說明（4) 學區 314( Resin Seal Molding Region)及一定義在該封 膠模壓區314外之切割線315 ( Cutting Line)所圍成之區 域；接著，在損壞的基板單元内介於該封膠模壓區3 1 4與 該切割線3 1 5區域間開設至少一不良品指示孔3 9 C Degradation-indicating Hole)，以藉由該不良品指 示孔3 9檢知出該損壞基板單元3 1，。 然基板片上的基板單元是否正常，雖然能夠透過基板 單元開孔的透光性來區辨，但在各基板單元外側形成開孔 一需使用額外的打孔（punch Hoi e)或鑽 >以及清洗製程，步驟極為繁複；而且 之技術對於呈短陣排列之薄小型球柵陣 Ball Grid Array， TFBGA)封裝件亦無 故，開發一種能有效避免油墨污染 具’且可適用於短陣排列之薄小型球柵 之基板劣品辨識方法，已成為當務之急 【發明内容】： 〜 孔（Dri 111 ng)技 ’在邊條開設開孔 歹,J ( Thin & Fine 法適用。 正常基板單元及模 p車列半導體封裝件 本發明之主要目的在提供一 _自動檢出不良基4反早元之辨識劣 本發明之另一目的在提供一 …ft標記，以免模具表面或基板單 基板之方法。 種無須使用打孔方式而可 品基板之方法。 種$須使用墨水或環氧樹 兀被 >由墨污染之辨識劣品 本發明之再一目的在提供_ 薄小型球柵陣列式半導體封裝件 之方法。 種旎適用於呈短陣排列之 所用基板之辨識劣品基板17608 Shi Xipin.ptd Page 11 200522243-V. Description of the invention (4) School District 314 (Resin Seal Molding Region) and an area surrounded by a cutting line 315 (Cutting Line) defined outside the seal molding area 314 ; Then, at least one defective product indicating hole (3 9 C Degradation-indicating Hole) is opened between the sealant molding area 3 1 4 and the cutting line 3 1 5 area in the damaged substrate unit, so as to pass the defective product The instruction hole 3 9 detects the damaged substrate unit 31. Although the substrate unit on the substrate sheet is normal, although it can be distinguished by the light transmittance of the openings of the substrate unit, forming an opening on the outside of each substrate unit requires the use of additional punch holes or drills> and The cleaning process has extremely complicated steps. Moreover, the technology has no reason for thin and small ball grid arrays (Ball Grid Array, TFBGA) packages in short arrays, and has developed a thin film that can effectively avoid ink contamination and can be applied to short arrays. The identification method of the inferior substrate of the small ball grid has become an urgent matter. [Inventive Content]: ~ Hole (Dri 111 ng) technology is used to open a hole in the edge, J (Thin & Fine method is applicable. Normal substrate unit and die p Car train semiconductor package The main purpose of the present invention is to provide a method for automatically detecting bad bases and identifying the inferior element. Another object of the present invention is to provide a ... ft mark to avoid the method of mold surface or single substrate. A method of producing a substrate without using a punching method. This method requires the use of ink or epoxy resin.> Inferior products identified by ink contamination. Another object of the present invention is to provide thin The method of ball grid array type semiconductor package it. Laying species were applied to the arrays are arranged only a short identification substrate of the substrate bads
200522243 五、發明說明（5) 本發明之又一目的在提供一種無須變更現有製程設 備，以簡化製程步驟及成本支出之辨識劣品基板之方法。 本發明之仍一目的在提供一種免除人員重複標記浪費 工時，並有效排除因為人員誤標記所導致的良率損失（例 如誤上片或誤銲線等）之辨識劣品基板之方法。 基於上述及其他目的，本發明辨識劣品基板之方法係 包括以下步驟：提供一由多數基板單元構成之基板片 (Substrate Strip)，該基板片内具有至少一損壞基板 單元，且各基板單元表面上分別形成有至少一可供製程機 台辨識之第一標記（例如基準點（Fiducial Mark)); 以及，以雷射燒除該損壞基板單元表面之第一標記，並同 時於該損壞基板單元之封裝線外之基板片上燒製至少一第 二標記（例如雷射標記（Laser Mark))，使標記完成之 基板片得送入機台進行後續製程。 基板製作完成後若於基板片（Substrate Strip)上 發現損壞基板單元時，以本發明之辨識方法在該基板片表 面標記可以提供以下優點： 第一，基板4上以雷射燒除第一標記，以及於封裝線 外之拒銲劑（Sο 1 der Mas k)層或基板背面之球墊區域 (B a 1 1 P a d R e g i ο η)上燒製第二標記，均無須使用油墨 標記或打孔，故可適用於呈短陣排列之薄小型球栅陣列式 (TFBGA)半導體封裝件。 其次，本發明以雷射燒除/標記方式取代油墨或環氧 樹脂在損壞基板單元上標記，能有效杜絕墨潰沾污模具表200522243 V. Description of the invention (5) Another object of the present invention is to provide a method for identifying inferior substrates without changing existing process equipment to simplify process steps and cost. It is still another object of the present invention to provide a method for identifying inferior substrates, which eliminates the waste of man-hours due to repeated marking by personnel, and effectively eliminates the loss of yield caused by personnel's mis-labeling (such as mis-loading or mis-soldering). Based on the above and other objectives, the method for identifying inferior substrates of the present invention includes the following steps: providing a substrate strip (substrate strip) composed of a plurality of substrate units, the substrate wafer having at least one damaged substrate unit, and the surface of each substrate unit At least one first mark (such as a fiducial mark) that can be identified by the process machine is formed on the machine; and, the first mark on the surface of the damaged substrate unit is burned out by laser, and simultaneously on the damaged substrate unit At least one second mark (such as a laser mark) is fired on the substrate sheet outside the packaging line, so that the marked substrate sheet can be sent to a machine for subsequent processing. If a damaged substrate unit is found on the substrate strip after the substrate is fabricated, marking the surface of the substrate with the identification method of the present invention can provide the following advantages: First, the first mark on the substrate 4 is burned by laser. And firing the second mark on the solder resist (Sο 1 der Mask) layer outside the packaging line or the ball pad area (B a 1 1 P ad R egi ο η) on the back of the substrate, no ink marking or printing is required. Holes, so it can be applied to thin and small ball grid array (TFBGA) semiconductor packages arranged in short arrays. Secondly, the invention replaces the ink or epoxy resin with a laser burnout / marking method to mark the damaged substrate unit, which can effectively prevent ink stains from contaminating the mold surface.
17608石夕品.ptd 第13頁 200522243 ^五、發明說明（6) -面或釋氣現象（0u t gas i ng)。 而且，本發明之辨識方法在基板完成以後可直接標記 並自動打上損壞標記，因此基板進入封裝階段後，無須再 以人員重複標記浪費工時，俾有效排除人員誤記而造成的 良率損失。 【實施方式】·· 以下係藉由特定的具體實施例說明本發明之實施方 式，熟習此技藝之人士可由本說明書所揭示之内容輕易地 瞭解本發明之其他優點與功效。本發明亦可藉由其他不同 0具體實施例加以施行或應用，本說明書中的各項細節亦 可基於不同觀點與應用，在不悖離本發明之精神下進行各 種修飾與變更。 第1圖至第6圖係顯示本發明辨識劣品基板之方法的整 體流程示意圖。當基板製作完成以後，一般會將整塊大片 基板（Substrate Panel)切割成多片基板片（Substrate S t r 1 p)，並且檢視該基板片各部功能是否正常。本發明 之辨識劣品基板方法係發現基板片上出現損壞基板單元 時，於基板片投入封裝作業前實施之，以便於封裝作業中 辨識出損壞基板單元的所在位置，使上片及銲線作業能跳 II該損壞基板單元而不會浪費晶片。以下即以實施例配合 所附圖式詳細說明本發明辨識劣品基板方法的各項實施步 驟。 第一實施例： 如第1圖所示，預備一基板片1，該基板片1上以封裝17608 Shi Xipin. Ptd Page 13 200522243 ^ V. Description of the invention (6)-surface or outgas phenomenon (0u t gas i ng). Moreover, the identification method of the present invention can directly mark and automatically mark the damage after the substrate is completed. Therefore, after the substrate enters the packaging stage, there is no need to repeat the marking by personnel to waste man-hours, which effectively eliminates the yield loss caused by personnel's misremembering. [Embodiment] ... The following is a description of specific embodiments of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied by other different specific embodiments, and various details in this specification can also be based on different viewpoints and applications, and various modifications and changes can be made without departing from the spirit of the present invention. Figures 1 to 6 are schematic diagrams showing the overall flow of the method for identifying inferior substrates according to the present invention. After the production of the substrate is completed, the entire large substrate (Substrate Panel) is generally cut into multiple substrate substrates (Substrate S t r 1 p), and the function of each part of the substrate substrate is normal. The method for identifying inferior substrates of the present invention is implemented when a damaged substrate unit is found on a substrate sheet, before the substrate sheet is put into a packaging operation, so as to identify the location of the damaged substrate unit during the packaging operation, so that the loading and bonding operations can Jump II should damage the substrate unit without wasting the wafer. The following describes in detail the implementation steps of the method for identifying inferior substrates according to the present invention in combination with the accompanying drawings. First Embodiment: As shown in FIG. 1, a substrate sheet 1 is prepared, and the substrate sheet 1 is packaged thereon.
17608石夕品.ptd 第14頁 200522243 五、發明說明（7) ---一·~ 多泉 1 0 ( P a c k a g e L i n 查,ί 八，…1 ^ ^ e)幻分出複數個基板单元1 1，且该寺 二::兀U中至士包含有一或多個損壞基板單元1 1，（如 .=線之基板早70所示）。本實施例係以1排分設有7個 土板單兀之基板片為例，每一基板單元工i分別具有〆上表 =:1 〇及一相，之下表面丨11，該上表面110在中央定義有 二晶片接置區1 1 2，且該晶片接置區1 1 2靠近角端位置附近 没有至少丁可供上片機台與銲線機台（未圖示）定位辨識 之機台光學辨識基準點12 ( Fiducial Mark)。 如第2圖所示，然後，將預設在損壞基板單元1 1，上表 面1 1 0上之至少一機台光學辨識基準點丨2以二氧化碳雷射 或UV雷射燒除。本實施例係以能量較弱之二氧化雷射當 作能源，在損壞基板單元U，上以雷射燒除技術去除掉晶 片接置區1 1 2右上角之機台光學辨識基準點i 2，該基板燒 除區域1 3必須涵蓋該機台光學辨識基準點i 2。由/於"上片&機 台（未圖示）黏接晶片以前必須先以機台之影 來檢視該機台光學辨識基準點i 2來決定晶片上片位置\因 此將損壞基板單元1 1’的基準點丨2燒除，上片機台（未圖 示）在辨識時會跳過而不會將半導體晶片（未圖=示）誤植 入損壞基板單元11 ’上。 如第3圖所示，在該機台光學辨識基準點1 2以雷射燒 除同時，以例如二氧化碳雷射或”雷射在該損壞基板單元 11封裝線^外側之基板表面上打上一雷射標記14 ( Laser Mark)。本實施例之雷射標記丨4係以二氧化碳雷射打入構 成基板表面之拒銲劑層（s〇Uer Mask)(如第4圖15所示17608 Shi Xipin. Ptd Page 14 200522243 V. Description of the Invention (7) ---... Duanquan 1 0 (Package L in Cha, ί 8, ... 1 ^ ^ e) Magically separate a plurality of substrate units 1 1, and the temple 2: Wu Uzhong Zhishi contains one or more damaged substrate units 1 1 (as shown in the substrate board of the. = Line as early as 70). This embodiment is based on the example of a substrate plate with 7 soil plate units arranged in one row. Each substrate unit unit has a top surface =: 10 and a phase, a lower surface 11 and the upper surface. 110 defines two wafer receiving areas 1 1 2 in the center, and the wafer receiving areas 1 1 2 are near the corner end, and there is no at least one for the positioning and identification of the loading machine and the welding machine (not shown). Machine optical identification reference point 12 (Fiducial Mark). As shown in FIG. 2, at least one machine optical identification reference point preset on the damaged substrate unit 1 1 and the upper surface 1 10 is burned with carbon dioxide laser or UV laser. In this embodiment, a laser with a weaker energy is used as an energy source. On the damaged substrate unit U, a laser burn-off technique is used to remove the chip optical recognition reference point i 2 in the upper right corner of the wafer receiving area 1 2 The substrate burn-out area 1 3 must cover the machine optical identification reference point i 2. Before the wafer is bonded to the " on-chip & machine (not shown), the machine's optical identification reference point i 2 must be used to determine the position of the wafer on the wafer before the wafer is bonded. The reference point 1 1 ′ 2 is burned out, and the loading machine (not shown) will be skipped during identification without mistakenly implanting the semiconductor wafer (not shown) on the damaged substrate unit 11 ′. As shown in FIG. 3, while the optical identification reference point 12 of the machine is burned with a laser, for example, a carbon dioxide laser or "laser" is used to apply a laser on the surface of the substrate outside the damaged substrate unit 11 package line ^. Laser Mark 14. The laser mark 4 in this embodiment is a carbon dioxide laser that penetrates into a solder resist layer (s0Uer Mask) on the surface of the substrate (as shown in FIG. 4 and FIG. 15).
17608石夕品.ptd 第15頁 200522243 -五、發明說明（8) )所形成，且該雷射標記1 4之深度以不超過該拒銲劑層厚 度（約3 5微米），尤其以小於2 0微米者較佳。 第4圖係本發明基板劣品辨識方法之連續動作示意 圖。如第4圖所示，當基板片1上偵測到功能異常的基板單 元後，測試機台（未圖示）會將具有損壞基板單元Π ’之 基板片1以雷射同時進行燒除以及標記兩步驟。由於本發 明之雷射燒除及雷射標記步驟皆僅在基板表面作處理，雷 射能置不須太南’且該基板片1送入機台（未圖不）進行 上片及銲線等製程時，機台只須設定跳躍模式（Sk 1 P)將 4台之影像檢視系統未檢視到基準點的損壞基板單元跳 過，而無須變更設備及現有製程。 如第5圖所示，完成雷射燒除及標記之基板片1，經過 上片、銲線及封膠等封裝程序後，成型於基板表面之封裝 膠體1 7雖已將損壞基板單元1 1 ’上表面之雷射燒除區域1 3 完全覆蓋，但因為該雷射標記1 4係同時燒製於該封裝線1 0 外側，因此該雷射標記1 4不會受到封裝膠體1 7遮蓋而損及 標示清晰度，亦不需要重複標記。 本發明在基4反片上燒除基準點及於封裝線外側之拒銲 劑（S ο 1 d e r M a s k)層形成雷射標記，均僅在基板表面加 t，因此相較於基板開孔等先前技術，本發明不需使用複 雜的打孔製程。再者，本發明以雷射燒除/標記方式取代 油墨或環氧樹脂在損壞基板單元上標記，亦能有效杜絕墨 潰污染模具表面或釋氣現象（0u t ga s i ng)，避免油墨污 染到其他正常基板單元，使基板完成以後直接標記並自動17608 石 夕 品 .ptd Page 15 200522243-V. Description of the invention (8)), and the depth of the laser mark 14 does not exceed the thickness of the solder resist layer (about 35 microns), especially less than 2 0 micron is preferred. Fig. 4 is a schematic diagram showing the continuous operation of the method for identifying inferior substrates of the present invention. As shown in FIG. 4, when an abnormally functioning substrate unit is detected on the substrate sheet 1, the test machine (not shown) will simultaneously burn the substrate sheet 1 with the damaged substrate unit Π 'by laser and Mark two steps. Since the laser burning and laser marking steps of the present invention are only processed on the surface of the substrate, the laser can be placed without being too south ', and the substrate sheet 1 is sent to a machine (not shown) for loading and bonding. When waiting for the process, the machine only needs to set the skip mode (Sk 1 P) to skip the damaged substrate units whose four image inspection systems have not seen the reference point, without changing the equipment and the existing process. As shown in Figure 5, after the laser ablation and marking of the substrate sheet 1 is completed, the packaging gel 1 7 formed on the surface of the substrate has been damaged after the packaging process such as loading, bonding and sealing. 'The upper surface of the laser burn-out area 1 3 is completely covered, but because the laser mark 14 is fired on the outside of the packaging line 10 at the same time, the laser mark 14 is not covered by the packaging gel 17 Impairs the clarity of the label and eliminates the need for repeated marking. In the present invention, the reference mark is burned out on the substrate 4 and the solder resist (S ο 1 der M ask) layer on the outside of the packaging line is used to form a laser mark. Both are only added to the surface of the substrate. Technology, the present invention does not need to use a complicated punching process. Furthermore, the invention uses laser burnout / marking instead of ink or epoxy to mark on the damaged substrate unit, which can also effectively prevent ink breakage from contaminating the mold surface or outgassing (0u t ga si ng) and avoid ink pollution. To other normal substrate units, so that the substrate can be marked directly after completion and automatically
嘱_ 1 17608石夕品.口士(1 第16頁 200522243 五、發明說明（9) 打上損壞標記，以減少人員標記錯誤造成之損失。 第二實施例： 本發明之辨識基板劣品方法除適用於一般球柵陣列式 半導體封裝件外，其另一優於習知技術之處在於該方法亦 適用於呈短陣排列之薄小型球栅陣列式（TFBGA)半導體 封裝件。此適用於T F B G A基板之辨識基板劣品方法之第二 實施例，共包含燒除基準點及雷射標記球墊區域兩部分。 如第6圖所示，該燒除基準點之方法，如同前述實施例所 述，係先在一至少包含有一個以上損壞基板單元2 1 ’之基 板片2上，以二氧化碳雷射或UV雷射燒除掉該損壞基板單 元21’表面之機台光學辨識基準點22，其中，該基板表面 形成之燒除區域2 3必須完全涵蓋該機台光學辨識基準點 2 2，但卻不超過封裝線2 0範圍為限。 惟本實施例之特點，係在燒除基準點2 2同時，以二氧 化碳雷射或UV雷射在該損壞基板單元2 1 ’下表面2 1 1之球墊 區域27 ( Bal 1 Pad Region)上打入一雷射標記24，使該 損壞基板單元2 1 ’能用雷射同步完成燒除基準點及雷射標 記兩步驟。於基板下表面之球墊區域上形成雷射標記，可 以解決短陣排列之TFBGA基板中相鄰基板單元之間無法標 記的問題，而得檢出T F B G A半導體封裝件之不良品。 上述實施例僅為例示性說明本發明之原理及其功效， 而非用於限制本發明。任何熟習此技藝之人士均可在不違 背本發明之精神及範疇下，對上述實施例進行修飾與變 化。因此，本發明之權利保護範圍，應如後述之申請專利Zhuan _ 1 17608 Shi Xipin. Mouth (1 Page 16 200522243 V. Description of the invention (9) Mark the damage to reduce the loss caused by the wrong person's marking. Second embodiment: The method for identifying the inferior substrate of the present invention except It is suitable for general ball grid array type semiconductor packages. Another advantage over conventional technology is that this method is also suitable for thin small ball grid array type (TFBGA) semiconductor packages arranged in short arrays. This applies to TFBGA The second embodiment of the method for identifying a substrate inferior substrate includes two parts: burning reference points and laser marking ball pad areas. As shown in FIG. 6, the method for burning reference points is as described in the foregoing embodiment. First, on a substrate sheet 2 containing at least one damaged substrate unit 2 1 ′, the machine optical identification reference point 22 on the surface of the damaged substrate unit 21 ′ is removed by carbon dioxide laser or UV laser burning, wherein The burn-out area 23 formed on the surface of the substrate must completely cover the optical identification reference point 22 of the machine, but it does not exceed the range of the packaging line 20. However, the characteristic of this embodiment lies in the burn-out reference point 2 2 At this time, a carbon dioxide laser or a UV laser is used to put a laser mark 24 on the ball pad region 27 (Bal 1 Pad Region) of the damaged substrate unit 2 1 'lower surface 2 1 1 to make the damaged substrate unit 2 1 'The laser can be used to simultaneously complete the two steps of burning the reference point and the laser mark. The laser mark is formed on the ball pad area on the lower surface of the substrate, which can solve the problem that the adjacent array units in the TFBGA substrate in a short array cannot be marked Problems, the defective products of TFBGA semiconductor packages can be detected. The above-mentioned embodiments are merely illustrative to explain the principle of the present invention and its effects, but not to limit the present invention. Anyone who is familiar with this technology can not violate this In the spirit and scope of the invention, the above embodiments are modified and changed. Therefore, the scope of protection of the rights of the present invention should be applied for as described below.
1 7608石夕品.ptd 第17頁 2005222431 7608 Shi Xipin.ptd Page 17 200522243
17608^7 品.ptd 第18頁 200522243 圖式簡單說明 【圖式簡單說明】： 第1圖係本發明辨識劣品基板之方法未雷射處理前之 基板片上視示意圖； 第2圖係本發明辨識劣品基板之方法進行雷射燒除後 之基板片上視示意圖； 第3圖係本發明辨識劣品基板之方法進行雷射標記後 之基板片上視示意圖； 第4圖係本發明辨識劣品基板之方法之連續動作示意 圖； 第5圖係本發明辨識劣品基板之方法封裝完成後之基 板片上視不意圖； 第6圖係本發明辨識劣品基板方法之第二實施例之動 作示意圖； 第7圖係習知以油墨標記損壞基板單元之上視示意 圖； 第8圖係美國專利第6，4 6 8，8 1 3號案之習知基板片之上 視示意圖； 第9圖係美il專利第6，0 2 1，5 6 3號案之習知基板片之立 體τ意圖，以及 第1 0圖係美國專利第6，3 9 2，2 8 9號案之習知基板片之 上視示意圖。 1,2,3 基板片 10,20 封裝線17608 ^ 7 Item.ptd Page 18 200522243 Brief description of the drawings [Simplified description of the drawings]: Figure 1 is a schematic top view of the substrate sheet before laser processing of the method for identifying inferior substrates of the present invention; Figure 2 is the present invention Top view of a substrate chip after laser burning method for identifying inferior substrates; FIG. 3 is a top view of a substrate chip after laser marking according to the method for identifying inferior substrates according to the present invention; FIG. 4 is identification of inferior products according to the present invention Schematic diagram of continuous operation of the substrate method; FIG. 5 is a schematic view of the substrate after the method for identifying inferior substrates according to the present invention is packaged; FIG. 6 is a schematic diagram of the second embodiment of the method for identifying inferior substrates of the present invention; FIG. 7 is a schematic top view of a conventional substrate unit damaged by ink marking; FIG. 8 is a schematic top view of a conventional substrate sheet in US Patent No. 6, 4 6 8, 8 13; FIG. 9 is a US The three-dimensional τ intent of the conventional substrate sheet in Patent No. 6,0 2 1,5 6 3, and FIG. 10 are drawings of the conventional substrate sheet in US Patent No. 6,3 9 2, 2 8 9 Top view schematic. 1,2,3 substrate sheet 10,20 package line
17608矽品.ptd 第19頁 20052224317608 Silicone.ptd Page 19 200522243
圖式簡單說明 '11,31 基板單元 11’ ， 21’ ， 31’ 損壞基板單元 110 上表面 111,211 下表面 112,312 晶片接置區 1 2, 22, 35 機台光學辨識基準點 13,23 基板燒除區域 14, 24 雷射標記 15 拒銲劑層 封裝膠體 27 球塾區域 313 開孔 314 封膠模壓區 315 切割線 32 記號 33 不規則標記 34 油墨 38 不-良品記號 39 不良品指示子L 17608石夕品.ptd 第20頁The diagram briefly explains '11, 31 substrate unit 11 ', 21', 31 'damage to the substrate unit 110 upper surface 111,211 lower surface 112,312 wafer receiving area 1 2, 22, 35 machine optical identification reference point 13,23 substrate burnout Area 14, 24 Laser mark 15 Solder resist encapsulation gel 27 Bulb area 313 Opening hole 314 Seal molding area 315 Cutting line 32 Mark 33 Irregular mark 34 Ink 38 Bad-good mark 39 Defective indicator L 17608 Shi Xi Pin.ptd Page 20
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW092137575A TWI249801B (en) | 2003-12-31 | 2003-12-31 | Method for identifying defective substrate |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW092137575A TWI249801B (en) | 2003-12-31 | 2003-12-31 | Method for identifying defective substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200522243A true TW200522243A (en) | 2005-07-01 |
| TWI249801B TWI249801B (en) | 2006-02-21 |
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|---|---|---|---|
| TW092137575A TWI249801B (en) | 2003-12-31 | 2003-12-31 | Method for identifying defective substrate |
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| Country | Link |
|---|---|
| TW (1) | TWI249801B (en) |
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2003
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