TW200505160A - Mixed-voltage CMOS I/O buffer with thin oxide device and dynamic n-well bias circuit - Google Patents
Mixed-voltage CMOS I/O buffer with thin oxide device and dynamic n-well bias circuitInfo
- Publication number
- TW200505160A TW200505160A TW093109440A TW93109440A TW200505160A TW 200505160 A TW200505160 A TW 200505160A TW 093109440 A TW093109440 A TW 093109440A TW 93109440 A TW93109440 A TW 93109440A TW 200505160 A TW200505160 A TW 200505160A
- Authority
- TW
- Taiwan
- Prior art keywords
- pmos transistor
- buffer
- circuit
- dynamic
- mixed
- Prior art date
Links
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
- H03K17/0814—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit
- H03K17/08142—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/10—Modifications for increasing the maximum permissible switched voltage
- H03K17/102—Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
Landscapes
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/626,601 US6927602B2 (en) | 2003-07-25 | 2003-07-25 | Mixed-voltage CMOS I/O buffer with thin oxide device and dynamic n-well bias circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200505160A true TW200505160A (en) | 2005-02-01 |
TWI290417B TWI290417B (en) | 2007-11-21 |
Family
ID=34080456
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW093109440A TWI290417B (en) | 2003-07-25 | 2004-04-06 | Mixed-voltage CMOS I/O buffer with thin oxide device and dynamic N-well bias circuit |
Country Status (2)
Country | Link |
---|---|
US (1) | US6927602B2 (zh) |
TW (1) | TWI290417B (zh) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4050242B2 (ja) * | 2004-03-11 | 2008-02-20 | 沖電気工業株式会社 | 半導体集積回路装置の入出力回路 |
TWI302025B (en) * | 2006-05-25 | 2008-10-11 | Univ Nat Chiao Tung | Mixed-voltage input/output buffer having low-voltage design |
TWI335701B (en) * | 2007-05-16 | 2011-01-01 | Faraday Tech Corp | Over-voltage indicator and related circuit and method |
US20090002028A1 (en) * | 2007-06-28 | 2009-01-01 | Amazing Microelectronic Corporation | Mixed-voltage i/o buffer to limit hot-carrier degradation |
US7564317B2 (en) * | 2007-07-06 | 2009-07-21 | Amazing Microelectronic Corporation | High/low voltage tolerant interface circuit and crystal oscillator circuit |
US7768299B2 (en) * | 2007-08-01 | 2010-08-03 | Qualcomm, Incorporated | Voltage tolerant floating N-well circuit |
US8130030B2 (en) * | 2009-10-31 | 2012-03-06 | Lsi Corporation | Interfacing between differing voltage level requirements in an integrated circuit system |
US20110102046A1 (en) * | 2009-10-31 | 2011-05-05 | Pankaj Kumar | Interfacing between differing voltage level requirements in an integrated circuit system |
US8542551B2 (en) | 2011-07-29 | 2013-09-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Circuit and method for reducing leakage current |
US8593184B2 (en) | 2011-08-09 | 2013-11-26 | United Microelectronics Corp. | Buffer circuit with regulating function and regulating circuit thereof |
US20170358691A1 (en) * | 2016-06-14 | 2017-12-14 | Globalfoundries Inc. | Reconfigurable MOS Varactor |
US10505545B1 (en) | 2018-11-14 | 2019-12-10 | Globalfoundries Inc. | Simplified bias scheme for digital designs |
KR102702724B1 (ko) * | 2020-03-04 | 2024-09-03 | 주식회사 디비하이텍 | 입출력 버퍼를 위한 esd 보호 회로 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5864243A (en) * | 1996-09-18 | 1999-01-26 | Vlsi Technology, Inc. | Buffer and method for transferring data therein |
US5926056A (en) * | 1998-01-12 | 1999-07-20 | Lucent Technologies Inc. | Voltage tolerant output buffer |
US6060906A (en) * | 1998-04-29 | 2000-05-09 | Industrial Technology Research Institute | Bidirectional buffer with active pull-up/latch circuit for mixed-voltage applications |
US6313672B1 (en) * | 1999-12-15 | 2001-11-06 | Exar Corporation | Over-voltage tolerant integrated circuit I/O buffer |
US6313671B1 (en) * | 1999-12-15 | 2001-11-06 | Exar Corporation | Low-power integrated circuit I/O buffer |
-
2003
- 2003-07-25 US US10/626,601 patent/US6927602B2/en not_active Expired - Lifetime
-
2004
- 2004-04-06 TW TW093109440A patent/TWI290417B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TWI290417B (en) | 2007-11-21 |
US20050017754A1 (en) | 2005-01-27 |
US6927602B2 (en) | 2005-08-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK4A | Expiration of patent term of an invention patent |