TW200425322A - Process for polishing a semiconductor wafer - Google Patents

Abstract

The invention relates to a process for the simultaneous polishing of the front surface and the back surface of a semiconductor wafer between two rotating polishing plates covered with polishing cloth while a polishing fluid is supplied, the polishing cloth of the lower polishing plate having a smooth surface and the polishing cloth of the upper polishing plate having a surface which is interrupted by channels, and the semiconductor wafer lying in a cutout in a carrier plate and being held on a defined geometric path, wherein the front surface of the semiconductor wafer, during polishing, is in contact with the polishing cloth of the lower polishing plate, and wherein the back surface of the semiconductor wafer, during polishing, is in contact with the polishing cloth of the upper polishing plate.

Description

200425322 V. Description of the invention ⑴ " ~-I. [Technical field to which the invention belongs], intended to be suitable for making line widths of less than or equal to 0 · 丨 micron semiconductor wafers must have many special properties. The most important one is the known nano-phase of semiconductor wafers. The definition of the term "nano-bit π nano-configuration" in the term "Semiconductor Equipment and Materials" (SEMI) is defined as the flat front of the entire wafer ^ Spatial wavelength 0 · 2 to 20 mm (side dependent Length) range and located in the “嘀” area (FQA: fixed applicable area; the surface area of the characteristics required by the product specification must be qualified). The measurement of nanophase is based on the entire wafer surface — full scan and use of different sizes Overlap of measurement field (area; range). 70 No change in height (peak to valley) in the surface was found in these measurement fields. It can exceed the maximum value required for the entire ^ circle. The size of the measurement field depends on the specification, for example Say:, It is defined as 2x2mm2, 5x5mm2 and 10x10mm ^ mm. Α The final phase of semiconductor wafers is formed by polishing. It is used to improve the flatness of semiconductor wafers. The tools and methods for polishing both the front and back of semiconductor wafers are progressing and continue to develop. 2. [Previous Technology] For example, the so-called "U.S. Patent No. 3 6 9 1 6 94" Double-sided polishing. The specific embodiment of the double-sided polishing described in Lee Ep 208 3 1 5B1 'The semiconductor wafer in the carrier disk with the appropriate size cutting frame is between two rotating polishing disks covered with a polishing cloth. In the presence of fluid, it moves along the path predetermined by the machine and processing parameters, so it is removed (in the expert literature, the carrier plate is also called a template). 200425322 V. Description of the invention (2) For example, German patent DE 1 0 0 〇 4 5 78 C1 has mentioned that the implementation of the double-sided polishing step uses a polishing cloth made of a uniform, porous polymer foam with a hardness of 60 to 90 (Shore A). The The literature has also revealed that the polishing cloth attached to the upper polishing disc has a grooved net, and the polishing cloth attached to the lower polishing disc does not have any texture of this kind. The purpose of this measurement is: first, to ensure the polishing abrasive used in the polishing process It is evenly distributed. Second, it prevents the semiconductor wafer from sticking to the top-removing cloth when the upper polishing disc is lifted after the polishing work is completed. To implement double-side polishing, the semiconductor wafer is placed in a carrier disc (conveyor board) by an appropriate method. ) Inside the cutting box背面 The back surface of the semiconductor wafer is erected on the lower polishing disc. Therefore, during the polishing process, the back surface of the semiconductor wafer is polished by a non-texture polishing cloth adhered to the lower polishing disc, and the front surface of the semiconductor wafer is adhered on The textured polishing cloth on the polishing disc is polished. The front side of the semiconductor is intended to be the surface on which electronic components are made. After the polishing step, the semiconductor wafers are usually transferred to a water bath, for example, by means of a vacuum suction This method of the existing technology cannot meet the requirements of implementing double-sided polishing for future generations of components and increasing semiconductor wafers. Therefore, the object of the present invention is to provide a method that can produce an improved substrate Meter-phase semiconductor wafers can not meet the requirements for the production of components with special needs. III. [Content of the Invention] The content of the present invention is a method for polishing a semiconductor wafer. This method achieves an improved nano configuration of polishing the semiconductor wafer. This type of semiconductor wafer is suitable for: The conductor industry ’is especially suitable for the production of electronic components. The technical content of this book is: a case where a polishing fluid is supplied

200425322 V. Description of the invention (3) The method of covering the front and back of two rounds with a polishing cloth and the upper polishing disc are located in a cutting frame of a carrier. During the polishing process, the light cloth touches, and the polishing The polishing cloth of the disc is in contact. 4. [Embodiment] The processed starting product conductor wafers, for example, can be cut in accordance with the present invention after a suitable grinding step can be used to cut the rounded edge by grinding or grinding somewhere. The semiconductor wafer must be placed in the polishing supported on the lower polishing disk. The semiconductor wafer is directly on the back of the semiconductor wafer. Otherwise, the two sides of the rotating polishing disk are polished at the same time. U throws the semiconductor wafer first. , The polishing cloth of the lower polishing disc and the ancient τ Xi Er Ershan ππ broadcast 4々 has a smooth surface and is fixed in the -definition 2 Ho: 2 crystals: the front of the semiconductor wafer and the polishing process of the lower polishing disc, semiconductor The north face of the wafer and the upper face are separated from the crystal by a conventional method, and the silicon surface is separated into silicon crystals. The edges of semiconductor wafers can also be rounded by grinding wheels distributed in the processing sequence. Furthermore, the surface of the conductor wafer is engraved with money. When double-side polishing is to be carried out, in a suitable manner, the cutting frame with the (conveyor board) is supported on the front support. Therefore, in the process of performing double-side polishing, the surface is in contact with the smooth polishing cloth of the lower polishing disc, and is in contact with the textured polishing cloth of the upper polishing disc. It is based on the methods familiar to those skilled in this technology. One side goes to the final product, which has undergone double-side polishing and has been obtained to substantially improve the nano-phase semiconductor wafer. In principle, the method of the invention can be used to make wafer-shaped objects.

Page 6 200425322 V. Description of the invention (4) = The system can be processed by using the common chemical 'mechanical double-side polishing method' = for example, 'this kind of material (semiconductor industry; and not stricter than this special application) Contains; Among them, silicon in the form of a single crystal (such as Shensa Left :: two-v semiconductors. Those who move the crystals) are preferred. Especially Shi Xi with (100), ⑴〇) or (Π 1) crystal orientation is more preferred. This method is particularly suitable for the manufacture of diameters of 200 mm to 400 mm and 450 mm and thicknesses from several stone materials φA cm to i 2. . Hundreds of Shixi wafers with better micron: wait for water to the derivative of two (especially 40 ° micro-fabrication for semiconductor components) Λ material / Λ circle can be directly used after the polishing step and / or coated material if After the operation, the final double-right layer (such as the back side sealing layer or the front side epitaxial coating layer made of or other suitable conductor material) and the heat treatment and conditioning can be used for the intended purpose. The silicon is hereby manufactured The wafer is taken as an example to further explain the method of the present invention. In principle, it is cut by circular saw or wire saw and (depending on the diameter and the type of sawing method) has a crystal lattice damage that is as deep as 1 °. Silicon wafers up to 40 microns can be directly subjected to a double-sided polishing step in accordance with the present invention. However, before performing double-sided polishing, it is best to use a suitably shaped grinding disc (grinding wheel) to clearly define and (so) mechanically The edges of highly sensitive wafers are rounded. Furthermore, in order to improve the geometry and partially remove the damaged crystal layer, mechanical polishing steps (such as lapping or polishing) can be applied to the silicon wafer to reduce costs. Within the polishing step Page 7 is removed and a crystalline region and an edge of the surface of the wafer loss that may arise: the amount of material removal step of removing machining inevitably ^.

I 200425322 V. Description of the invention (5) Any impurities (such as metal impurities where the damaged parts are connected together) can be followed by an etching step. An embodiment of the etching step may be wet chemical treatment or plasma treatment of silicon wafers in an alkaline or acidic etching mixture. For example, the technical report TR 22.2342 of the American Computer Manufacturing Company (I BM) described a commercially available double-sided polishing machine of appropriate size,

The double-side polishing machine can be used to perform the polishing step of the present invention. The polishing machine mainly includes: a lower polishing disc (which can be rotated freely on the horizontal plane) and an upper polishing disc (which can be rotated freely on the horizontal plane). These polishing discs are covered with a polishing cloth and can be used for semiconductor wafers ( Here, silicon wafers) are subjected to material removal polishing on both sides, while a polishing fluid continuously supplied with an appropriate chemical composition can be simultaneously polished. The polishing machine has a pin gear, a normal, so the diameter of the reference disc, silicon can be polished only one light, multiple silicon crystals, wafer system and carrier disk to accommodate silicon crystal transmission or involute Examples of the number of reverse (pair) transfer carrier disks in the two-light operation process include the lower polishing disk and the round 'Shi Xi wafer circle eccentrically mounted ^ solid seven y wafer is better fixed to the polished over-circular size wire gear moving external pins During polishing, the shadow and polishing carrier plate is arranged in a circle along the circumference. However, in general, in order to save costs, the actual number depends on the structure of the polishing machine and on a geometric path, which is defined by the processing parameters in the process and the cutting frame of the carrier disc. For example, a rotary motion between the carrier plate and the polishing machine contact plate is achieved by means of a needle drive (via a rotating internal pin or ring gear and / or window ring). The size of the upper and lower polishing discs related to the Xiangshixi wafer is the design of the carrier disc and the rotation speed of the upper disc. If the center of the carrier disc always moves around the center of the polishing machine. If the carrier disc is around its axis,

200425322

An inner cycloid at the same time makes the wafer and the mechanical stability caused by the movement of the present invention significant and prevents the production of highly flat loads. Plastic and glass fibers are better. The path of rotation is to have at least the original material with sufficient light fluid enough to make the material necessary thickness with a disk. It is better to use steel. Especially for three silicon, the material-to-drive mechanism and polishing life are suitable for manufacturing and the geometry is made of metal steel or glass carrier disk path. Use the four-to-separation method. Furthermore, the chemical and photo-silicon silicon are integrated and have no disk. Glass fiber reinforced plastic, and a carrier tray (the parent carrier is mounted on a circular path), and the carrier tray can be loaded by any material (especially compression and tension W). The material must not withstand mechanical damage. To ensure that a; :: wafers are contaminated. In addition, the material is stress-free, has no unevenness, and has pre-principle. For example, these carrier trays of reinforced plastic or plastic-coated gold are preferred. Especially stainless

~ The carrier tray has one or more cutting frames (especially round ones are Jiaguna's one or more silicon wafers. In order to ensure that the silicon wafer can move freely within the rotation load, the diameter of the cutting frame Must be slightly larger than those for polishing silicon wafers: a slightly larger diameter of 0.1 to 2 mm is preferred, and a slightly larger diameter of 0.3 to 3 mm is better. In order to prevent wafer edges from being damaged during the polishing process The inner edge of the cutting frame in the carrier plate is injured, as suggested in European Patent EP 20831 5B1: It is best to add a layer of plastic lining the same thickness as the carrier plate inside the cutting frame. For example, in German patent DE 1 990 573 7A1 As mentioned above, the thickness of the carrier disc used in the polishing process of the present invention is preferably 400 to 120 micrometers, especially depending on the final thickness of the polished wafer. The silicon removal amount during the polishing step is 5 to 100 microns is preferred, but 10 to 60 microns is preferred, especially 20 to 50.

Page 9 200425322 V. Description of the invention (7) Micron is better.

Within the context of the description of face-down semiconductor wafer orientation, the double-side polishing step is preferably performed in a manner familiar to those skilled in the art. Polishing cloths with a wide range of properties are commercially available. The polishing is preferably performed using a commercially available polyurethane polishing cloth having a hardness of 40 to 120 (Shore A). Polyurethane fabrics with a hardness of 60 to 90 (Shore A) mixed with polyethylene fibers are particularly preferred. For polishing silicon wafers, it is recommended to continuously supply polishing fluid of Si A with acidity value of 9 to 12 (especially ^ to 丨 丨), including weight ratio (especially i to 5% by weight). 2. The polishing pressure is preferably from 0.05 to 0.5 bar, and more preferably from 0.3 to 0.3 bar. The silicon removal rate is preferably from 0.1 to 1.5 μm / min, and more preferably from 0.4 to 0.9 μm / min. When removing the polished semiconductor wafer from the lower polishing disc, it is best to place the «Hei Zhuan semiconductor wafer on a standard processing support, further processing it, and its surface is correctly oriented in the subsequent processing steps. . Compared with the conventional double-sided polishing (where the semiconductor wafer is front-faced when the semiconductor wafer is withdrawn), the holder that accommodates the semiconductor wafer is configured to rotate 80. , Try to rotate the conductor wafer by 18 °. . This work can be achieved by manual unloading or self-unloading. When a semiconductor wafer is mounted on a lower polishing disc, work of this nature is also possible.

The removed semiconductor wafer can be removed from the lower polishing disc manually or by means of an automatic moving (removing) device; in both cases, it is better to use a Shinji suction device. German patent DE 19958077A1 (page 6, lines 3 to 30) describes a suitable vacuum suction device. After being removed from the optical disc, the semiconductor wafer is finally put into a liquid bath (especially water-based

200425322 V. Description of invention (8) Better in bath). In this way, it can effectively prevent the polishing abrasive from drying out and prevent the vacuum suction appliances or (general name) removal equipment from forming a mark. After the polishing process is completed, 'any attached polishing fluid is cleaned from the silicon wafer and the wafer is dried. Depending on its further use, the front side of these wafers may need to be final polished in accordance with existing techniques, for example: using a soft polishing cloth and using an inspection polishing fluid with Si02 as the main component. Experimental examples: The users of the following experimental examples and comparative examples are a commercially available AC 2000 P2 double-sided polishing machine, produced by Peter, Waters, Rendsburg, Germany). The polishing machine is equipped with five stainless steel carrier discs with a polished surface and a thickness of 720 microns. Each carrier disc has six circular cutting frames with an inner diameter of 20.5 mm. The cutting frame is equidistantly arranged on a circular path and lined with a polyvinylidene fluoride layer. The batch can simultaneously polish 30 silicon wafers with a diameter of 2000 mm. The upper and lower polishing discs are coated with a commercially available, polishing cloth made by Rodel, trade name SUBA50 0, hardness 74 (Shore A), reinforced with polyethylene fibers. The polishing cloth taut on the lower polishing disc has a smooth surface; the surface of the polishing cloth taut on the upper polishing disc has a width of 1.5 mm and a depth of 0.5 mm, which is partially rounded, by pressing. A checkerboard pattern formed by annular grooves, and the arrangement pitch of the grooves is 30 mm. Comparative Example Always place 30 Shixi wafers with an etched surface and a diameter of 200 mm into a dicing frame of a carrier tray with the front side down. During polishing, water-based polishing abrasives (Le vas i 1 2 0 0

Page 11 200425322 V. Description of the invention (9) Type, produced by Bayer, Leverkusen, Germany, with a fixed solids content of 3.1% by weight and its acidity value by 知 知 # lack ~ 疋 blU2 The U-body s character is set at 11.4 with potassium carbonate and potassium hydroxide. The polishing process was performed under a pressure of n 9 ra, and the temperature of the upper and lower polishing discs was always 38 ° C. The material removal rate was 0.5. 8 microns / minute. The silicon removed from each side of the wafer was 15 microns. (2) After the thickness of the polished wafer reached 725 microns, the supply of the polishing abrasive was stopped and replaced with the supply of the stopper for 2 minutes. The stopper used is a 1% by weight aqueous solution of 013112 (^ 36 0 0 type) produced by Japan Fujimi Corporation. After the stop step is terminated, the device is opened. The silicon wafer in the carrier tray is completely wetted by the stop solution. A commercially available, Peter Walters unloading station was used to send the silicon wafers into a frame located in a water bath. After that, the nettle eve wafers were dried in a batch cleaning equipment, which was The bathing sequence is: Tetramethylammonium hydroxide / H2 02; HF / HC 1; Ozone; HC1 and use a commercially available drying device and operate according to Marangoni's principle. Nanometers after cleaning the wafer The phase system was measured on a ADE SQM CR83 device using a measuring field of 2 mm x 2 mm (HCT 2x2) and 10 mm x ί 0 mm (HCT 10 X 1〇). A total of 1 96 8 silicon wafers were polished. The nanophase was subsequently identified. The experimental example treated a total of 2 157 Shixi wafers with a engraved surface and a diameter of 2000 mm in a similar manner to the comparative example. The only and comparative examples The difference is that the silicon wafer placed in the cutting frame of the carrier disk has its front side facing down, and then is oriented along this Polishing. The statistical analysis results of the obtained nano values are shown in the table.

200425322 V. Description of invention (ίο) Comparative example: 1968 silicon wafer experimental example: 2157 silicon wafer measurement field HCT 2x2 HCT 10x10 HCT 2x2 HCT 10x10 average 18.50 40.48 15.24 33.06 standard deviation 4.87 9. 65 2.06 5.66 If this The silicon wafer is polished in a face-down manner, and the comparison shows that the nano-phase of the silicon wafer has been greatly improved for the measurement fields of two sizes. Ο

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Claims (1)

200425322 6. Scope of patent application 1 · A polishing process in which the polishing surface of the lower polishing disc is provided between the rotating polishing discs is fixed by a groove and fixed in a semiconductor wafer. When the semiconductor 2 is polished simultaneously after applying for a patent , Move to a water bath. 3 · In the case of polishing fluid after simultaneous patent application of the surface, the method of polishing the front and back of a semiconductor wafer with two polishing cloths at the same time, the cloth has a smooth surface and the interval between the polishing cloths of the upper polishing disc. The wafer is located on the path of the cutting frame of a carrier disc. During the polishing process, the polishing cloth of the wafer is in contact with the polishing pad of the front plate, and the polishing cloth on the back surface is in contact with the polishing cloth of the upper polishing plate. The method of the half term of Mosewei 1 it, in which the front and back ^ conductor Shi Xi wafer is a method of turning range 1 = Wo 1 or 2 by means of a vacuum suction device, in which the front and back The front side of the raw, # DanΛ bulk wafer is subjected to final polishing. Page 15