200303036 玖、發明說明 (發明說明應敘明：發明所屬之技術領域、先前技術 '内容 '實施方式及圖式簡單說 L發明戶斤屬之技術領域3 發明領域 本發明係關於一種用於液晶顯示器之薄膜電晶體基材 5 及其製造方法；更特別地是，關於一種用於液晶顯示器之 薄膜電晶體基材及其製造方法，其中一儲存電容可藉由在 黑色基質層（其形成在該薄膜電晶體基材上）上形成一包含 高濃度雜質之經重摻雜的多結晶矽（或多晶矽）而增加。200303036 发明 Description of the invention (The description of the invention should state: the technical field to which the invention belongs, the implementation of the prior art 'contents', and the drawings. Briefly, the technical field of the invention is the invention of the householder. 3 Field of the invention The present invention relates to a liquid crystal display device. A thin film transistor substrate 5 and a method for manufacturing the same; more particularly, a thin film transistor substrate for a liquid crystal display and a method for manufacturing the same, wherein a storage capacitor can be formed by On the thin film transistor substrate, a heavily doped polycrystalline silicon (or polycrystalline silicon) containing a high concentration of impurities is formed and increased.
L· 'J 10 發明背景 在現今資訊導向的社會中，電子顯示器的角色變得更 重要王σ卩種類的電子顯示器已廣泛使用在不同的工業領 域中。當電子顯示器領域的技術已連續發展時，已可提供 具有新功能的不同電子顯示器以與此資訊導向的社會其不 15 同之需求相符合。 ^ n ’電子顯示n為—種用來將訊息視覺地傳送 至人類的裝置。亦即，電子顯示器可定義為一種電子裝置 s其可將從不同電子設備所輸出的«訊信號轉換成可視 2認的光學訊息信號。同樣地，其可定義為—種能提供 作為人類與電子設備的連結橋樑之電子裝置。 這些電子顯示器可分類成發射型顯示器(其中光學訊 藉由光發射方式顯示）及非發射型顯示器（其中訊號 )光學調變方式（諸如光反射、分散及干擾現象等等）顯 不)。至於稱為有源顯示器的發射型顯示器，已例如有、 20 200303036 玖、發明說明 示器）等等 CRT(陰極射線f)、PDp(電漿顯示板）、咖(發光二極體） 及eld(電場致發光顯示器）等等。至於稱為無源顯示器的 非發射顯示器，已有LCD(液晶顯示器）及咖(電泳影像顯 5 CRT已使用在影像顯示器（諸如電視及監視器等等）上 -段最長的時間週期。CRT在顯示品質及經濟效率方面具 有最高的市場分配，但是亦具有許多缺點，諸如重量重、 體積大及高功率消耗。 同時間，當不同種類的電子元件小型化及重量輕型化 10 ，且由於半導體技術的快速發展而與電子元件的凝固化及 低驅動電廢及低功率一起時，已根據新的環境對具有更纖 細及更輕的性質和較低的驅動電壓及較低的消耗功率特徵 之平板型式顯示器有所需求。 在多種已發展的平板型顯示器當中，LCD更是比任何 15其它顯不器纖細且輕，並具有較低的驅動電壓及較低的功 率消耗。同樣地，其具有與CRT類似的顯示品質。因此， LCD可廣泛使用在不同的電子^件上。再者，因為㈣可 容易製造，其應用已逐漸寬廣。 液晶顯示器由二片形成電極的基材和插入其間的液晶 20所組成。液晶顯示器為一種藉由對電極施加電壓而進行顯 示操作之裝置，其會使液晶分子再排列以便控制通過此液 晶的光置。 在這些LCD中，已廣泛使用的共通結構包括二片基材 每片皆具有已形成在上面的電極及用來開關施加至該電 200303036 坎、發明說明 極的電壓之薄膜電晶體（TFT)。通常來說，會在二片基材 的任一片上形成電極。 當這些LCD面板的解析度隨著技術發展而增加時，經 由薄膜電晶體基材的資料線所施加的資料電壓也會增加。 但是，習知的電容器結構無法足夠地貯存所增加的資 料電壓。 t 明内 發明概要 因此，本發明係有關一種用於液晶顯示器之薄膜電晶 10體基材及其製造方法，其實質上可除去由於相關技藝之限 制及缺點而產生的一個或多個問題。 本發明之目標為提供一種薄膜電晶體基材，其具有一 能足夠儲存增加的資料電壓之電容器結構。 本發明之另一個目標為能夠使用相同罩幕來形成使用 15作為儲存電容器的下電極之經推雜的多晶石夕層圖案和複晶 閘極圖案。 本發明的額外特徵及優點將在下列說明中提出，可從 該說明中有某種程度的明目奢或可藉由實行本發明而學習。 本毛明之目軚及其它優點將藉由在所寫的說明及其申請專 利範圍和附加的圖形中所指出的特別結構而實現及獲得。 為了達成這些及其它優點和根據本發明之目的，如已 具體化且廣泛地摇诚，p担w ^ 已耠供一種用於液晶顯示器之薄膜 電晶體基材。t㈣膜電晶體基材包括：—黑色基質，其安 排在透明絕緣基材之連單元圖相，絲防止在此連的 20 200303036 玫、發明說明 早7C圖素間光漏；一第一氧化物薄膜，其形成在所產生的 包含黑色基質之基材上；一經重摻雜的多晶矽層圖案，其 形成在該第-氧化物薄膜上；_第二氧化物薄膜，其形成 在该重摻雜多晶矽層圖案之曝露表面上，而具有一曝露出 該重摻雜多晶矽層圖案的預定部分之第一接觸孔；一活性 多晶石夕層圖案’其形成在該第—氧化物薄膜與該第二氧化 物薄膜的活性範圍上 一第二氧化物薄膜，其在該活性多 10 15 晶矽層圖案之曝露表面上形成；一複晶閘極圖帛，其在包 含該第-接觸孔的第二氧化物薄膜上與在該第三氧化物薄 膜的選擇區域上形成，如此與該重摻雜多晶石夕層圖案相符 合且與在下層的重摻雜多晶石夕層圖案電連接；—第四氧化 物薄膜’其在所產生的包含複晶閘極圖案之基材上形成， 而具有一形成在該第四氧化物薄膜與下層第三氧化物薄膜 中的第二接觸孔，以便曝露出該活性多晶秒層圖案之源極 一接觸孔洞的第四氧化 薄膜’其形成在包含該 圖素電極，其形成在該 區；一資料線，其形成在包含該第 物薄膜之選擇部分上；一平面化的 資料線的第四氧化物薄膜上；及一 平面化薄膜上。 較佳地，該複晶閘極圖案包含—該薄膜電晶體的㈣ 20圖案，及一儲存電容器的上儲存電極圖案。 再者，該閘極電極圖案與該配置在通道區域下之經摻 雜的多晶矽層圖案電連接。 根據本發明的另-個觀點，已提供一種用於液晶顯示 器之薄膜電晶體基材的製造方法。該方法包括的步驟有： 200303036 玫、發明說明 10 15 在一透明絕緣基材上的毗連單元圖素間形成一黑色基質， 用來防止在毗連單元圖素間光漏；在該黑色基質上形成一 第一氧化物薄膜；在該第一氧化物薄膜上形成一經重摻雜 的多晶矽層圖案；在該重摻雜多晶矽層圖案的曝露表面上 形成一第二氧化物薄膜，該第二氧化物薄膜具有一會曝露 出該多晶矽層圖案的預定部分之第一接觸孔；在該第一氧 化物薄膜及該第二氧化物薄膜的活性區域上形成一活性多 晶矽層圖案；在該活性多晶矽層圖案之曝露表面上形成一 第三氧化物薄膜；在該第三氧化物薄膜的預定部分上形成 一複晶閘極圖案；在所產生的包含該複晶閘極圖案之基材 上幵^/成第四氧化物薄膜；在該第四氧化物薄膜及下層的 第一氧化物4膜之預定部分處形成—會曝露出該活性多晶 矽層圖案之預定部分的第二接觸孔；纟包含該第二接觸孔 之第四氧化物薄膜的選擇部分上形成_資料線；在包含該 資料線的第四氧化物薄膜上形成一平面化的薄膜；及在該 平面化薄膜上形成一圖素電極。 祀據本4月在δ亥黑色基質圖案與活性多晶石夕圖案間 形成-摻雜咼濃度雜質的多晶矽層圖案，且在該黑色基質 層與該摻雜多晶石夕層圖案間及在該㈣的多晶^圖案與 2〇該活性的多晶石夕層圖案間各別地插入一氧化物薄膜，以形 成豐片組型式的電容器，因此可足夠地儲存增加的資料電 壓。 此外，使用來作為儲存電容器的下電極及複晶閘極圖 案之經摻雜的多晶矽層圖案可使用相同的罩幕形成，而不 10 200303036 玖、發明說明 需要形成另外電容器基本所需的另外罩幕。 圖式簡單說明 本發明之上述及其它優點將藉由詳細地描述典型的具 體貝轭例且參考至附加的圖形而變得更明顯，其中： 5 第1圖為根據本發明之具體實施例用於液晶顯示器之 薄膜電晶體基材的截面圖；及 第2圖為沿著與該資料線垂直的方向所採截之數個單 元圖素區域的截面圖。 【實施方式】 10較佳實施例之詳細說明 現在，將麥考至附加的圖形詳細地說明本發明之典型 的具體實施例。 第1圖為根據本發明之具體實施例沿著資料線採截的 截面圖，用來闡明製造用於液晶顯示器之薄膜電晶體基材 15的方法；及第2圖為沿著與該資料線垂直的方向所採截之 數個單元圖素區域的截面圖。 簽照至第1及2圖，利用光微影光刻製程在諸如石英 (Si〇2)或玻璃的透明絕緣基材1〇〇上形成黑色基質圖案I。] ，如此該些較低的黑色基質圖案1〇2在單元圖素區域的界 20 面線上彼此相交（第一罩幕）。 再者，忒黑色基質圖案1 〇2並未隔離，而是連續地形 成每個單元圖素。 在包含该黑色基質圖案丨〇2的基材i 〇〇之全部表面上形 成一高溫氧化物（HTO)作為第一氧化物薄膜1〇4。 200303036 玖、發明說明 在此之後，在該第一氧化物薄膜上形成一對經重摻雜 的多晶石夕層圖案106，·。換句話說，在該第一氧化物薄 膜1〇4上形成一活性層圖案106。換句話說，利用光微影光 刻製程形成該經重摻雜的多晶矽層圖案丨〇6,丨〇6，，如此它 5們會與單元圖素區域的黑色基質圖案1()2有部分重疊（第二 罩幕）。 該經重摻雜的多晶矽層圖案1〇6，1〇6，分別地形成每個 早元圖素區域。 其-人，在所產生的包含該經重摻雜的多晶矽層圖案 10 106,游之基材上形成二氧化石夕的第二氧化物薄膜⑽，⑽，。 在此之後，進行一圖形化製程，以在該經重摻雜的多 晶石夕層圖案中規劃出欲使用作為儲存電容器而用於離子植 入法的部分（第三罩幕）。 之後，形成部分曝露出該經重摻雜的多晶矽層圖案 15 106·之第一接觸孔（H1)(第四罩幕）。 其後，形成包含源極區、漏極區及通道區的活性層 110 ’以覆蓋該第二氧化物薄膜圖案108與該第二氧化物薄 膜圖案108,的預定部分之全部表面。換句話說，該活性層 110形成不内凹第一接觸孔（H1)(第五罩幕）。 20 至於該活性層110，則使用單晶石夕（較佳為多晶石夕）。 再者，該活性層110可具有少量推雜的汲極(LDD)結構。 之後，在該活性層110上形成預定厚度的第三氧化物 薄膜112。第三氧化物薄膜112可藉由溼式氧化或乾式氧化 該活性層no而形成。所形成的第三氧化物薄膜ιΐ2仍然曝 12 200303036 玖、發明說明 露出第一接觸孔。 隨後，在所產生的包含第三氧化物薄膜112之基材的 王口p表面上積一多晶矽薄膜。此多晶矽薄膜可使用第二 罩幕（其使用來形成该經摻雜的多晶石夕層圖案1〇6，1〇6，）來圖 5形化。結果，在與該經摻雜的多晶矽層圖案106，106,相符 合之部分處形成閘極圖案114，114，。 間極圖案114，114,包括一與活性層11〇的通道區域重疊 之閘極114及-作用為儲存電容器的上電極之上健存電極 圖案114’。該上儲存電極圖案丨14，經由第一接觸孔出1)與 10該經摻雜的多晶矽層圖案106,電接觸。 其次，藉由離子植入製程或摻雜製程，使用閘極圖案 114，114,作為離子植入罩幕，將五價或三價的雜質離子植 入源極區及漏極區（第六、第七罩幕）。 隨後，在所產生的包含閘極圖案114，114，之基材上形 15成第四氧化物薄膜116。之後，藉由光微影光刻製程蝕刻 該第四氧化物薄膜116與下層第三氧化物薄膜所選擇的部 7刀，以形成第二接觸孔（H2)，所以曝露出源極區活性層 11〇(第八罩幕）。 其-人’在包含第二接觸孔（H2)的第四氧化物薄膜丨j 6 2〇之全部表面上，沉積預定厚度用於資料線之金屬薄膜。此 用於資料線的金屬薄膜可藉由光微影光刻製程來圖案化， 所以形成資料線118(第九罩幕）。 在此之後，在該包含資料線118的第四氧化物薄膜116 上形成平面化薄膜（或鈍化薄膜）12〇。該平面化薄膜12〇可 13 200303036 玖、發明說明 !用光微影光刻製程圖案化，以形成曝露出該沒極電極( 然顯不）的第三接觸孔（無顯示）（第十罩幕）。 在同時間，單元圖素區域可由該些問極線與該些資料 ^m之相交而定出輪廓。為了在定義的單元圖素區域上 二成圖素電極’可沉積預定厚度的透明導電薄膜(諸如氧 ’’因錫（ITO)薄膜或氧化銦鋅（IZ〇)薄膜）。 _然後圖案化所沉積的透明導電薄膜，以形成_經由第 二接觸孔與該沒極電極接觸之圖素電極122。 ίο 15 20 在藉由前述製程所形成的薄膜電晶體基 經重推雜的多晶，圖案陶⑽、該活性層u。及該二 具有—經由資料線輸人的資料電麗，且該黑色基質 u〇2及該儲存閉極圖案114,具有一般電星，其可使用在 各別層之間的全部絕緣層作為介電質層。結果，可獲得能 儲存資料電壓的足夠儲存電容。 如先前描述’根據本發明，在薄膜電晶體基材的活性 層下形成重摻雜多晶石夕層圖案，及在含有插入於此之間的 乳化物薄膜之摻雜多晶㈣圖案下形成—黑色基質圖案， 且所形成的三層可使用作為電容器，因此能夠保證一能妥 善處理隨著資料電壓增加的足夠儲存電容。 此外因為使用作為該儲存電容器的下電極之經重換 ㈣μ㈣_與„極㈣可藉由相同的單幕形成， 不需要在形成另外電容器«本所t Men 再者’該經摻雜的多晶石夕層圖案經由接觸孔與該閘極 圖案電連接1了這目的’雖然在該間極線中該開極線由 14 200303036 玖、發明說明 於斷裂或其類似物而開路-損壞（ope卜failed)，一流閘極線 (flowmg gate line)能夠備援，因此減低發生損壞的圖素。 雖然本發明已於本文中參考至其較佳的具體實施例而 描述及闡明，將由熟知此技藝之人士所明瞭，可製得不同 5的改質及變化而沒有離開本發明之精神及範圍。因此，意 右人的疋本發明涵盍本發明在附加的申請專利範圍及其同等 物範圍内之改質及變化。 【圖式1簡單^謂^明】 第1圖為根據本發明之具體實施例用於液晶顯示器之 10 薄膜電晶體基材的截面圖；及 第2圖為沿著與該資料線垂直的方向所採截之數個單 元圖素區域的截面圖。 【圖式之主要元件代表符號表】 100…透明絕緣基材 114，114，·.·閘極圖案 102…黑色基質圖案 116…第四氧化物薄膜 104···第一氧化物薄膜 H2···第二接觸孔 106，··"經重摻雜的多晶石夕層圖案 m···第一接觸孔 108,108’···第二氧化物薄膜 118…資料線 110…活性層 120…平面化薄膜 112…第三氧化物薄膜 122…圖素電極 15L · J 10 BACKGROUND OF THE INVENTION In today's information-oriented society, the role of electronic displays has become more important. The types of electronic displays have been widely used in different industrial fields. When the technology of the electronic display field has been continuously developed, different electronic displays with new functions have been provided to meet the different needs of this information-oriented society. ^ n 'Electronic display n is a device for visually transmitting information to humans. That is, the electronic display can be defined as an electronic device that can convert «signal signals output from different electronic devices into visible optical signal signals. Similarly, it can be defined as an electronic device that provides a bridge between humans and electronic equipment. These electronic displays can be classified into emissive displays (where optical signals are displayed by light emission) and non-emissive displays (where signals) are optically modulated (such as light reflection, dispersion, interference, etc.). As for the emission type display called an active display, there are, for example, C 2003 (cathode ray f), PDp (plasma display panel), coffee (light emitting diode), and eld. (Electroluminescence display) and so on. As for non-emissive displays called passive displays, LCD (liquid crystal display) and coffee (electrophoretic image display 5 CRT) have been used on image displays (such as televisions and monitors)-the longest period of time. CRT in Display quality and economic efficiency have the highest market share, but also have many disadvantages, such as heavy weight, large size and high power consumption. At the same time, when different types of electronic components are miniaturized and lightweight10, and due to semiconductor technology With the rapid development of electronic components, together with the solidification of electronic components and low driving electrical waste and low power, according to the new environment, tablets with slimmer and lighter properties, lower driving voltage and lower power consumption characteristics have been developed. There are demands for type displays. Among the many developed flat-panel displays, LCDs are slimmer and lighter than any other 15 monitors, and have a lower driving voltage and lower power consumption. Similarly, they have CRT has similar display quality. Therefore, LCD can be widely used in different electronic parts. Moreover, because ㈣ can be easily manufactured, its The use has gradually become wider. A liquid crystal display is composed of two substrates forming an electrode and a liquid crystal 20 interposed therebetween. A liquid crystal display is a device that performs a display operation by applying a voltage to the electrodes, which realigns liquid crystal molecules for control The common structure that has been widely used in these LCDs includes two substrates, each of which has an electrode formed thereon, and is used to switch the voltage applied to the electric 20030336 kan, the invention description pole. Thin film transistor (TFT). Generally speaking, electrodes are formed on either of the two substrates. When the resolution of these LCD panels increases with the development of technology, it is applied through the data line of the thin film transistor substrate The data voltage will also increase. However, the conventional capacitor structure cannot adequately store the increased data voltage. Summary of the Invention Therefore, the present invention relates to a thin film transistor 10-body substrate for a liquid crystal display and its substrate. The manufacturing method can substantially remove one or more problems caused by the limitations and disadvantages of the related art. In order to provide a thin film transistor substrate having a capacitor structure capable of sufficiently storing an increased data voltage, another object of the present invention is to be able to use the same mask to form a doped capacitor using 15 as a lower electrode of a storage capacitor. Polycrystalline stone layer pattern and compound gate pattern. Additional features and advantages of the present invention will be presented in the following description, from which a certain degree of obvious luxury can be learned or can be learned by implementing the present invention. The objectives and other advantages of this Maoming will be realized and obtained by the special structure indicated in the written description and its patent application scope and additional graphics. In order to achieve these and other advantages and the purpose according to the present invention, such as It has been concretely and widely sincerely provided, a thin film transistor substrate for a liquid crystal display has been provided. The film transistor substrate includes:-a black matrix, which is arranged in a connected unit of a transparent insulating substrate Photograph, silk prevents the light leakage between the pixels in this 20 200303036, invention description as early as 7C; a first oxide film formed on the resulting black matrix On the substrate; a heavily doped polycrystalline silicon layer pattern is formed on the first oxide film; a second oxide thin film is formed on the exposed surface of the heavily doped polycrystalline silicon layer pattern and has an exposure A first contact hole of a predetermined portion of the heavily doped polycrystalline silicon layer pattern is formed; an active polycrystalline silicon layer pattern is formed on the active range of the first oxide film and the second oxide film, and a second oxide is formed. Thin film formed on the exposed surface of the active 10 15 crystalline silicon layer pattern; a complex gate pattern, which is formed on the second oxide film including the first contact hole and on the third oxide Formed on selected regions of the film so as to conform to the pattern of the heavily doped polycrystalline silicon layer and to be electrically connected to the pattern of the heavily doped polycrystalline silicon layer below;-a fourth oxide film 'which is produced in the It is formed on a substrate containing a compound gate pattern, and has a second contact hole formed in the fourth oxide film and the third oxide film underneath to expose the source of the active polycrystalline second layer pattern. The fourth contact hole A thin film is formed on the pixel electrode including the pixel electrode, and is formed on the region; a data line is formed on the selected portion of the first thin film; and a fourth oxide film is a planar data line; and On a flat film. Preferably, the compound gate pattern includes a ㈣20 pattern of the thin film transistor and an upper storage electrode pattern of a storage capacitor. Furthermore, the gate electrode pattern is electrically connected to the doped polycrystalline silicon layer pattern disposed under the channel region. According to another aspect of the present invention, a method for manufacturing a thin film transistor substrate for a liquid crystal display has been provided. The method includes the following steps: 200303036, invention description 10 15 A black matrix is formed between adjacent unit pixels on a transparent insulating substrate, which is used to prevent light leakage between adjacent unit pixels; forming on the black matrix A first oxide thin film; forming a heavily doped polycrystalline silicon layer pattern on the first oxide thin film; forming a second oxide thin film on the exposed surface of the heavily doped polycrystalline silicon layer pattern; the second oxide The film has a first contact hole that exposes a predetermined portion of the polycrystalline silicon layer pattern; an active polycrystalline silicon layer pattern is formed on active regions of the first oxide film and the second oxide film; and the active polycrystalline silicon layer pattern A third oxide film is formed on the exposed surface; a complex gate pattern is formed on a predetermined portion of the third oxide film; and the resulting substrate including the complex gate pattern is formed on the substrate A fourth oxide thin film; formed at predetermined portions of the fourth oxide thin film and the first oxide 4 film underneath—a predetermined portion of the active polycrystalline silicon layer pattern is exposed Forming a data line on a selected portion of the fourth oxide film including the second contact hole; forming a planarized film on the fourth oxide film including the data line; and A pixel electrode is formed on the planarizing film. According to this April, a polycrystalline silicon layer pattern doped with erbium-concentration impurities was formed between the δH black matrix pattern and the active polycrystalline silicon pattern, and between the black matrix layer and the doped polycrystalline silicon pattern and between An oxide thin film is inserted between the polycrystalline pattern of the plutonium and the pattern of the polycrystalline layer of the active layer to form a capacitor of the abundant chip type, so that the increased data voltage can be stored sufficiently. In addition, the doped polysilicon layer pattern used as the lower electrode of the storage capacitor and the compound gate pattern can be formed using the same mask instead of 10 200303036. The invention explains that it is necessary to form another cap that is basically required for another capacitor. screen. The drawings briefly explain the above and other advantages of the present invention, which will become more apparent by describing a typical specific yoke example in detail and referring to the attached drawings, in which: Figure 1 is used according to the specific embodiment of the present invention. A cross-sectional view of a thin film transistor substrate for a liquid crystal display; and FIG. 2 is a cross-sectional view of several unit pixel regions taken along a direction perpendicular to the data line. [Embodiment] 10 Detailed Description of the Preferred Embodiment Now, McCoy to additional figures will explain in detail the typical specific embodiment of the present invention. FIG. 1 is a cross-sectional view taken along a data line according to a specific embodiment of the present invention to illustrate a method for manufacturing a thin film transistor substrate 15 for a liquid crystal display; and FIG. 2 is a view along the data line. A cross-sectional view of several unit pixel regions taken in a vertical direction. Signed to Figures 1 and 2, a black matrix pattern I is formed on a transparent insulating substrate 100, such as quartz (SiO2) or glass, using a photolithography process. ], So that the lower black matrix patterns 102 intersect each other on the boundary line of the unit pixel area (first mask). In addition, the black matrix pattern 102 is not isolated, but is continuously formed into each unit pixel. A high-temperature oxide (HTO) is formed on the entire surface of the base material i 00 including the black matrix pattern 01 as a first oxide film 104. 200303036 (ii) Description of the invention After that, a pair of heavily doped polycrystalline stone layer patterns 106, are formed on the first oxide thin film. In other words, an active layer pattern 106 is formed on the first oxide film 104. In other words, the photolithography process is used to form the heavily doped polycrystalline silicon layer pattern 丨 〇6, 〇〇6, so that they will be part of the black matrix pattern 1 () 2 in the unit pixel area Overlap (second curtain). The heavily doped polycrystalline silicon layer patterns 106, 106 form each early element pixel region separately. It is based on the formation of the second oxide thin film ⑽, ⑽, of the dioxide on the substrate containing the heavily doped polycrystalline silicon layer pattern 10 106. After that, a patterning process is performed to plan a portion (third mask) in the heavily doped polycrystalline silicon layer pattern to be used as a storage capacitor for the ion implantation method. After that, a first contact hole (H1) (fourth mask) is formed that partially exposes the heavily doped polycrystalline silicon layer pattern 15 106 ·. Thereafter, an active layer 110 'including a source region, a drain region, and a channel region is formed to cover the entire surface of the second oxide thin film pattern 108 and a predetermined portion of the second oxide thin film pattern 108. In other words, the active layer 110 forms a non-recessed first contact hole (H1) (a fifth mask). 20 As for the active layer 110, monocrystalline stone (preferably polycrystalline stone) is used. Furthermore, the active layer 110 may have a small amount of doped drain (LDD) structure. Thereafter, a third oxide thin film 112 having a predetermined thickness is formed on the active layer 110. The third oxide film 112 may be formed by wet-oxidizing or dry-oxidizing the active layer no. The formed third oxide film ιΐ2 is still exposed. 12 200303036 发明, description of the invention The first contact hole is exposed. Subsequently, a polycrystalline silicon thin film is deposited on the surface of the king opening p of the resulting substrate including the third oxide film 112. This polycrystalline silicon thin film can be shaped as shown in FIG. 5 using a second mask (which is used to form the doped polycrystalline silicon layer pattern 106, 106). As a result, gate patterns 114, 114, are formed at portions corresponding to the doped polycrystalline silicon layer patterns 106, 106 ,. The interelectrode patterns 114, 114 include a gate electrode 114 which overlaps with a channel region of the active layer 110 and a surviving electrode pattern 114 'which functions as an upper electrode of a storage capacitor. The upper storage electrode pattern 14 is electrically contacted with the doped polycrystalline silicon layer pattern 106 through the first contact hole 1). Secondly, by ion implantation process or doping process, gate patterns 114, 114 are used as ion implantation masks, and pentavalent or trivalent impurity ions are implanted into the source and drain regions (sixth, Seventh curtain). Subsequently, a fourth oxide film 116 is formed on the resulting substrate including the gate patterns 114, 114. Then, the selected portion of the fourth oxide film 116 and the lower third oxide film is etched by a photolithography process to form a second contact hole (H2), so that the source region active layer is exposed. 11〇 (eighth curtain). Its-person 'deposits a metal film of a predetermined thickness for the data line on the entire surface of the fourth oxide film 丨 j 6 20 including the second contact hole (H2). The metal thin film for the data line can be patterned by a photolithography process, so that the data line 118 (the ninth mask) is formed. After that, a planarization film (or passivation film) 120 is formed on the fourth oxide film 116 including the data lines 118. The planarizing film 12 can be 2003200336. Explanation of the invention! Patterned by a photolithography process to form a third contact hole (not shown) (the tenth cover) exposing the electrode (but not visible) of the electrode. screen). At the same time, the unit pixel area can be determined by the intersection of the epipolar lines and the data ^ m. In order to form a two-layered pixel electrode 'on a defined unit pixel area, a transparent conductive film (such as an oxygen-based (ITO) film or an indium zinc oxide (IZO) film) may be deposited to a predetermined thickness. The deposited transparent conductive film is then patterned to form a pixel electrode 122 that is in contact with the non-polar electrode via a second contact hole. ίο 15 20 Based on the thin film transistor formed by the aforementioned process, the polycrystalline silicon is re-doped, and the active layer u is patterned. And the two have—the data electricity that is input through the data line, and the black matrix u〇2 and the storage closed pole pattern 114 have general electric stars, which can use all the insulating layers between the individual layers as a medium. Electromass layer. As a result, a sufficient storage capacitor capable of storing a data voltage can be obtained. As previously described, 'According to the present invention, a heavily doped polycrystalline stone layer pattern is formed under the active layer of a thin film transistor substrate, and a doped polycrystalline gadolinium pattern containing an emulsion film interposed therebetween is formed. — A black matrix pattern, and the three layers formed can be used as capacitors, so it can ensure a sufficient storage capacitor that can properly handle the increase in data voltage. In addition, since the re-exchanged ㈣μ㈣_ and ㈣poles used as the lower electrode of the storage capacitor can be formed on the same single screen, there is no need to form another capacitor «本 所 t Men again 'the doped polycrystalline The Shi Xi layer pattern is electrically connected to the gate pattern through a contact hole. The purpose is' although the open electrode line in the interpolar line is opened by 14 200303036 发明, the invention is explained by a fracture or the like (ope) failed), the flowmg gate line can be backed up, thus reducing the pixels that are damaged. Although the present invention has been described and clarified with reference to its preferred embodiments, it will be understood by those skilled in the art It is understood by those skilled in the art that different modifications and changes can be made without departing from the spirit and scope of the present invention. Therefore, the present invention of the right people encompasses the scope of the present invention within the scope of additional patent applications and their equivalents. Modifications and changes. [Figure 1 is simple and easy to understand.] Figure 1 is a cross-sectional view of a 10 thin-film transistor substrate for a liquid crystal display according to a specific embodiment of the present invention; Data line A cross-sectional view of several pixel areas taken in the direction of the direction. [The main elements of the figure represent the symbol table] 100 ... Transparent insulating substrates 114, 114, ... Gate patterns 102 ... Black matrix patterns 116 ... Four oxide film 104 .. First oxide film H2 .. Second contact hole 106, " Heavy doped polycrystalline stone layer pattern m ... First contact hole 108, 108 '... · Second oxide film 118 ... data line 110 ... active layer 120 ... planarization film 112 ... third oxide film 122 ... pixel electrode 15