JP4496600B2 - Electro-optical device and projector - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention belongs to the technical field of electro-optical devices of an active matrix drive system, and in particular, includes a thin film transistor for pixel switching (hereinafter referred to as TFT as appropriate) and a light shielding film that defines an opening area of each pixel. It belongs to the technical field of an electro-optical device of the type provided in a laminated structure on a substrate.
[0002]
[Background]
2. Description of the Related Art Conventionally, in an active matrix driving type electro-optical device using TFT driving, a plurality of scanning lines and a plurality of data lines intersecting with each other are wired in an image display region in which a plurality of TFTs are arranged in a matrix. The portions where the scanning lines face the TFT semiconductor layer through the gate insulating film function as gate electrodes of the respective TFTs. Here, in general, it is necessary to use a conductive polysilicon film as a material of a TFT gate electrode in order to obtain transistor characteristics. Therefore, it is common to use a conductive polysilicon film for the scanning line material because of the restriction that it includes a portion that functions as a gate electrode.
[0003]
When the scanning signal is supplied through the scanning line configured as described above, the TFT is turned on, and the image signal supplied to the source region of the semiconductor layer through the data line is between the source and the drain of the TFT. To be supplied to the pixel electrode. Since the supply of the image signal through the data line is performed only for a very short time for each pixel electrode through each TFT, the voltage of the image signal supplied through the TFT is turned on. In general, a storage capacitor is added to each pixel electrode (in parallel with a liquid crystal capacitor or the like) in order to hold it for much longer than the above time. Such a storage capacitor is configured to include a capacitor line that is disposed opposite to a capacitor electrode extending from a conductive polysilicon film or the like that constitutes the drain region of the TFT, with a dielectric film interposed therebetween. In particular, such a capacitor line is generally made of the same conductive film as the scanning line (that is, a conductive polysilicon film), and is generally wired side by side in parallel with the scanning line.
[0004]
On the other hand, in this type of electro-optical device, if the display light passes through the gap between adjacent pixel electrodes (due to so-called light leakage), the contrast ratio is lowered and the image quality is lowered. For this reason, a stripe-shaped light shielding film is provided on the counter substrate so as to cover the gap between the pixel electrodes along the scanning line and the capacitance line, which are generally made of a transparent polysilicon film, etc., or the gap between the pixel electrodes along the data line is provided. The data line is formed to be wide from a reflective film such as an Al (aluminum) film so as to cover it. As described above, the opening region of each pixel (that is, the region through which light that effectively contributes to display passes) is defined by combining the light shielding film and the data line on the counter substrate.
[0005]
[Problems to be solved by the invention]
In this type of electro-optical device, there is a strong general demand for high-quality display images. For this purpose, the pixel aperture ratio is increased while the pixel pitch is reduced (that is, the display light in each pixel is increased). It is important to widen the opening area through which the display light is transmitted with respect to the non-opening area in each pixel through which no light is transmitted.
[0006]
However, according to the above-described background art in which the scanning lines and the capacitance lines are wired side by side in the image display region, the scanning lines and the capacitance lines can be wired in accordance with the increase in the aperture ratio of the fine pitch pixels. The non-opening area of each pixel becomes narrow. For this reason, as the pixel pitch becomes finer, the widths of the scanning lines and the capacitor lines have to be narrowed, so that the scan lines can have sufficient conductivity and a sufficiently large storage capacitor can be created. There is a problem that it becomes fundamentally difficult. In particular, since it is extremely technically difficult to form the gate electrode from a low-resistance metal film, the scanning line including the gate electrode has a much higher resistance than the metal film constituting the data line, for example. Since it must be formed of a highly conductive polysilicon film, it is practically very difficult to provide sufficient conductivity to the scanning line. If sufficient conductivity is not obtained for the scanning line or sufficient storage capacity is not obtained in this way, the problem is that the image quality deteriorates eventually due to increased crosstalk and ghosts in the display image. A point is created.
[0007]
On the other hand, according to the technique for defining the opening area of each pixel by combining the light shielding film and the data line on the counter substrate as described above, the light shielding against the oblique incident light or the strong incident light especially for the projector use is performed. It is difficult to do enough. In other words, according to this technique, light incident on obliquely incident light, back-surface reflected light, or light that penetrates the composite optical system when the electro-optical device is used as a light valve in combination with a double-plate projector are returned. The light is not sufficiently shielded, and it is also difficult to prevent the internal reflection light and the multiple reflection light from being generated by such oblique incident light and return light. Therefore, there is a problem that the contrast ratio is lowered by such oblique incident light, return light, internal reflection light, and multiple reflection light. In addition, when such oblique incident light, return light, internal reflection light and multiple reflection light enter the channel region of the pixel switching TFT, the TFT transistor characteristics deteriorate (light leakage) due to the photoelectric effect. Finally, there is also a problem that image quality deterioration is caused.
[0008]
The present invention has been made in view of the above-described problems, and it is possible to simultaneously reduce the resistance of the scanning line and increase the storage capacity while increasing the pixel aperture ratio, and at the same time, oblique incident light and return that do not contribute to display. An object of the present invention is to provide an electro-optical device capable of improving the light shielding performance against light, reducing crosstalk and ghost, and improving the contrast ratio, and capable of displaying a high-quality image.
[0009]
[Means for Solving the Problems]
In order to solve the above problems, an electro-optical device of the present invention includes a pixel electrode on a substrate, and a gate electrode made of a conductive film divided into island shapes for each pixel, and is connected to the pixel electrode. A thin film transistor; a data line connected to the thin film transistor; and an upper layer side of the thin film transistor that extends across the data line and is stacked on the gate electrode with an interlayer insulating film interposed therebetween. A conductive upper-layer light-shielding film that at least partially defines a region, and the upper-layer light-shielding film is connected to the gate electrode and also serves as a scanning line.
[0010]
According to the electro-optical device of the present invention, the thin film transistor is divided into islands for each pixel instead of the gate electrode of the thin film transistor being part of the scanning line extending across the data line as in the background art described above. A gate electrode made of the conductive film is provided. The gate electrode is formed so as to extend across the data line, and is connected to a conductive upper light shielding film that also serves as a scanning line. Here, as described above, it is technically very difficult to form the gate electrode itself from a low-resistance metal film, and the scanning line made of a conductive polysilicon film including the gate electrode has a low resistance from the material. Although it is very difficult to achieve this, the gate electrode itself is formed of a polysilicon film by forming the gate electrode and the scanning line in two layers (separate layers) laminated via an interlayer insulating film as in the present invention. At the same time, the scanning line can be composed of a low-resistance metal film. Therefore, by forming the gate electrode from a conductive polysilicon film, the transistor characteristics are realized, and the resistance is reduced by changing the material of the scanning line itself, so that the flicker and crosstalk are finally reduced. Image display is possible.
[0011]
Further, according to the electro-optical device of the present invention, since the gate electrode is made of an island-shaped conductive film, the same film as the gate electrode is formed on one side using the non-opening region of each pixel where the gate electrode is not formed. A storage capacitor can be configured as the capacitor electrode. That is, unlike the background art described above, it is not necessary to wire the capacitor lines side by side with the scanning lines, and a sufficient area can be secured to create a storage capacitor without expanding the non-opening area of each pixel. In addition, a contact hole for connecting the thin film transistor and the pixel electrode can be formed using such a region where the gate electrode is not formed.
[0012]
In addition to these, the upper-layer light-shielding film also serving as the scanning line can define the opening area of each pixel in the direction intersecting the data line. Even when handling strong incident light, especially for projector applications, for example, compared to the case where light is shielded by a light shielding film provided on the opposite substrate, the upper layer light shielding film that can be placed close to the thin film transistor allows oblique incident light. In addition, it is possible to efficiently improve the light shielding performance with respect to the internal reflection light or the multiple reflection light based on this. For the direction intersecting the data line, the non-opening area of each pixel can be defined by the upper light shielding film that also serves as the scanning line in this way, but the non-opening area of each pixel in the direction along the data line The line itself can be defined by forming it wide from a light-shielding conductive film such as an Al film. Thus, the lattice-shaped non-opening region can be defined by the upper light shielding films and the data lines intersecting with each other, and a reduction in contrast ratio due to light leakage in a region outside the pixel electrode can be prevented, and further to the channel region of the thin film transistor. The occurrence of flicker, crosstalk, or ghost based on deterioration of transistor characteristics due to the incidence of light can be reduced.
[0013]
As a result, the electro-optical device according to the present invention can simultaneously reduce the resistance of the scanning line and increase the storage capacity while increasing the pixel aperture ratio, improve the light shielding performance, and finally crosstalk. High-quality image display with reduced contrast and improved contrast ratio is possible.
[0014]
As described above, the upper light shielding film that also serves as the scanning line may be stacked between the gate electrode and the data line, or may be stacked between the data line and the pixel electrode.
[0015]
In one aspect of the electro-optical device of the present invention, the upper light shielding film extends in a stripe shape so as to intersect the data line.
[0016]
According to this aspect, the upper light shielding film extending in a stripe shape can be caused to function in the same manner as each scanning line extending in a conventional stripe shape.
[0017]
In another aspect of the electro-optical device of the present invention, the electro-optical device further includes a storage capacitor including a first capacitor electrode made of the same film as the conductive film constituting the gate electrode.
[0018]
According to this aspect, the storage capacitor includes the first capacitor electrode made of the same film as the gate electrode in the non-opening region of each pixel where the gate electrode is not formed. Accordingly, the storage capacity can be increased by using the data line formation region in plan view, and in particular, the non-opening region, which is traditionally the region for wiring the scanning line. Since the first capacitor electrode can be formed only by changing the patterning when forming the gate electrode, it is practically convenient.
[0019]
In the aspect including the storage capacitor, the storage capacitor may further include an intermediate conductive layer that relay-connects the pixel electrode and the thin film transistor, and the storage capacitor may include a second capacitor electrode made of the same film as the intermediate conductive layer. Good.
[0020]
With this configuration, the storage capacitor is provided in the non-opening region of each pixel where the gate electrode is not formed, in the first capacitor electrode made of the same film as the gate electrode and the second capacitor electrode made of the same film as the intermediate conductive layer. It is comprised including. Accordingly, the storage capacity can be increased by using the data line formation region in plan view, and in particular, the non-opening region, which is traditionally the region for wiring the scanning line. Furthermore, since such an intermediate conductive layer has a long interlayer distance between the pixel electrode and the thin film transistor, it avoids the technical difficulty of connecting the two with a single contact hole, and the two series contact holes with relatively small diameters both Can be connected, the plane area required to connect the two can be reduced, and the device reliability can be improved. Since the second capacitor electrode can be formed simply by changing the patterning when forming the intermediate conductive layer, it is practically convenient.
[0021]
In this case, the upper light-shielding film may be stacked between the intermediate conductive layer and the data line, may be stacked between the thin film transistor and the intermediate conductive layer, or may be stacked between the data line and the pixel electrode. They may be stacked between them.
In this case, it further comprises a grid-like or stripe-like conductive lower-layer light-shielding film disposed on the lower layer side of the thin film transistor on the substrate and covering at least the channel region of the thin film transistor when viewed from the substrate side. The first capacitor electrode may be connected to the pixel electrode to have a pixel electrode potential, and the second capacitor electrode may be connected to the lower light shielding film to have a fixed potential.
[0022]
With this configuration, since the lower light shielding film covers at least the channel region of the thin film transistor when viewed from the substrate side, the return light from the lower layer side of the thin film transistor (that is, the back reflection light or the electro-optical device as a light valve is a double plate type When the projector is used in combination with the projector, the channel region can be shielded against the light penetrating the combining optical system), and the characteristic deterioration of the thin film transistor due to the return light can be reduced. In addition, the lower light-shielding film is conductive, and the second capacitor electrode is connected to the lower light-shielding film so as to have a fixed potential. On the other hand, the first capacitor electrode is connected to the pixel electrode to have a pixel electrode potential. Therefore, the storage capacitor can be constructed by using the conductive lower light shielding film as the capacitor line.
[0023]
In the case where the lower-layer light-shielding film is configured as described above, the lower-layer light-shielding film is further extended from the image display area to the outside of the image display area, and outside the image display area, a constant potential line or a constant voltage is provided. It may be electrically connected to a potential source.
[0024]
According to this aspect, the lower light-shielding film connected to the second capacitor electrode in the image display area extends outside the image display area and drops to a fixed potential, and thus functions well as a capacitor line. In this case, in particular, the lower-layer light-shielding film can be set to a fixed potential relatively easily and reliably by using a constant potential line or a constant potential source for a peripheral circuit or a drive circuit in a peripheral region outside the image display region.
[0025]
Thus, when it comprises and comprises a lower layer light shielding film, it is preferable that the said lower layer light shielding film does not protrude from the formation area of the said upper layer light shielding film seeing planarly on the said board | substrate.
[0026]
With this configuration, the incident light is reflected from the upper surface of the lower light-shielding film that protrudes from the formation region of the upper light-shielding film, thereby generating internal reflection light and multiple reflected light inside the electro-optical device. Can be prevented.
[0027]
In the aspect including the above-described storage capacitor, the storage capacitor may be formed in a region overlapping the data line as viewed in a plan view.
[0028]
With this configuration, it is possible to increase the storage capacity by using a region overlapping the data line in the non-opening region of each pixel.
[0029]
In this case, the storage capacitor may be formed in a region overlapping the upper light shielding film where the data line does not exist in plan view.
[0030]
If constituted in this way, in addition to the area which overlaps the data line in the non-opening area of each pixel, the area which was traditionally the area for wiring the scanning line and the capacitor line is also used, The storage capacity can be increased.
[0031]
In this case, the storage capacitor may be formed in a region surrounding the gate electrode from at least two sides in plan view.
[0032]
With this configuration, the gate electrode made of an island-shaped conductive film is formed in a region surrounding the two sides (substantially in the shape of a letter) in plan view, or in a region surrounding the three sides (substantially By forming it in a U-shape, the storage capacity can be increased by efficiently using the non-opening region extending around the gate electrode.
[0033]
In another aspect of the electro-optical device according to the aspect of the invention, the upper-layer light-shielding film protrudes along the data line from a main line portion that extends across the data line in a plan view and a portion that intersects the data line. Projecting part.
[0034]
According to this aspect, the main line portion of the upper light shielding film can define the opening area of each pixel in the direction intersecting with the data line, and can further guarantee the function as the scanning line. On the other hand, the opening area of each pixel in the direction along the data line can be partially defined by the protruding portion of the upper light shielding film. The opening area of each pixel in the direction along the data line that is ahead of the protrusion and cannot be defined by the protrusion may be partially defined by a data line made of an Al film or the like.
[0035]
By forming the upper light shielding film only from the main line without providing such a protrusion, the opening area of each pixel in the direction intersecting the data line is defined by the upper light shielding film, and along the data line. The opening area of each pixel in the different direction may be defined exclusively by the data line.
[0036]
In this aspect, the protruding portion is formed wider than the data line in plan view, and the data excluding a portion where a contact hole for connecting the data line and the thin film transistor is opened. You may comprise so that the area | region of a line may be covered.
[0037]
With this configuration, the opening area of each pixel in the direction along the data line can be defined by the upper light shielding film. In addition, the incident light is reflected on the upper surface of the data line protruding from the formation region of the upper light shielding film, and the return light is reflected on the lower surface of the data line protruding from the formation region of the upper light shielding film, thereby Internally reflected light and multiple reflected light generated inside can be effectively reduced. Note that the upper light-shielding film is interposed between the data line and the thin film transistor by using a region ahead of the protruding portion of the upper light-shielding film in plan view (that is, a region where the upper light-shielding film is not formed). Even in this case, the contact hole connecting the two can be opened without any problem.
[0038]
Such an operation and other advantages of the present invention will become apparent from the embodiments described below.
[0039]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each of the following embodiments, the electro-optical device of the invention is applied to a liquid crystal device.
[0040]
(First embodiment)
The configuration of the electro-optical device according to the first embodiment of the invention will be described with reference to FIGS. 1 to 6. FIG. 1 is an equivalent circuit of various elements, wirings, and the like in a plurality of pixels formed in a matrix that forms an image display region of an electro-optical device. FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on the TFT array substrate on which data lines, scanning lines, pixel electrodes, etc. are formed, and FIG. 4 is a cross-sectional view taken along the line AA ′ of FIG. 2, FIG. 5 is a cross-sectional view taken along the line BB ′ of FIG. 2, and FIG. 6 is a cross-sectional view taken along the line CC ′ of FIG. FIG. In FIGS. 4 to 6, the scales of the layers and the members are different from each other in order to make the layers and the members large enough to be recognized on the drawings.
[0041]
In FIG. 1, a plurality of pixels formed in a matrix that forms an image display area of the electro-optical device according to the present embodiment includes a pixel electrode 9 a and a TFT 30 for controlling the pixel electrode 9 a. A data line 6 a to which a signal is supplied is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a. good. Further, the gate electrode 3a of the TFT 30 is made of an island-shaped conductive film for each pixel as will be described in detail later. In the plurality of gate electrodes 3a arranged in a horizontal row in FIG. A light shielding film 41 is connected. That is, in the present embodiment, the built-in light shielding film 41 is formed in a stripe shape in the horizontal direction in FIG. 1 and constitutes an example of the upper light shielding film. Scanning signals G1, G2,..., Gm are applied to the built-in light-shielding film 41 as the scanning lines in a pulse sequence at a predetermined timing in this order. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal S1, S2,..., Sn supplied from the data line 6a is obtained by closing the switch of the TFT 30 as a switching element for a certain period. Write at a predetermined timing. Image signals S1, S2,..., Sn written to the liquid crystal as an example of the electro-optical material via the pixel electrode 9a are between the counter electrodes (described later) formed on the counter substrate (described later). Is held for a certain period. The liquid crystal modulates light by changing the orientation and order of the molecular assembly according to the applied voltage level, thereby enabling gradation display. In the normally white mode, the amount of light passing through the incident light is reduced according to the applied voltage, and in the normally black mode, the amount of light passing through the incident light is increased according to the applied voltage. Light having a contrast corresponding to the image signal is emitted from the electro-optical device. Here, in order to prevent the held image signal from leaking, a storage capacitor 70 is added in parallel with the liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode. The storage capacitor 70 is formed between the drain of the TFT 30 and the first light-shielding film 11a as a capacitor line for supplying a constant potential as will be described in detail later. In the present embodiment, the first light-shielding film 11a is formed in a lattice shape in the vertical and horizontal directions as shown in FIGS. 1 and 3, and constitutes an example of a lower-layer light-shielding film that also serves as a capacitance line, and outside the image display area. It is dropped to a fixed potential.
[0042]
In FIG. 2, a plurality of transparent pixel electrodes 9a are provided in a matrix on the TFT array substrate of the electro-optical device, and data lines 6a and scanning lines are provided along the vertical and horizontal boundaries of the pixel electrodes 9a, respectively. A built-in light shielding film 41 (shown by a bold line in the figure) is provided.
[0043]
In addition, a gate electrode 3a made of a conductive polysilicon film formed in an island shape for each pixel is disposed so as to face a channel region 1a ′ indicated by a hatched region in the lower right portion of the semiconductor layer 1a. ing. Each gate electrode 3a is connected to a stripe-shaped built-in light shielding film 41 via a contact hole BMCNT. As described above, the pixel switching TFT 30 in which the gate electrode 3a is disposed opposite to the channel region 1a ′ is provided at each intersection between the built-in light shielding film 41 and the data line 6a.
[0044]
As shown in FIG. 3, the first light shielding film 11a provided below the TFT 30 on the TFT array substrate 10 is formed in a lattice shape so as to substantially overlap the data line 6a and the built-in light shielding film 41. The opening area of each pixel is defined by the light shielding film. The edge of each pixel electrode 9a is not shown in FIGS. 2 and 3, but is planar so that it slightly overlaps the edge of the grid-shaped non-opening region composed of the first light shielding film 11a and the built-in light shielding film 41. Has been placed.
[0045]
As shown in FIGS. 3 to 6, the first light shielding film 11 a includes a portion that covers the TFT 30 from the TFT array substrate 10 side (the lower side in FIGS. 4 to 6). The first light-shielding film 11a shields the return light from the back surface of the TFT array substrate 10 and the projection optical system, and it is effective that the characteristics of the TFT 30 change due to a leakage current when the TFT 30 is turned off by light excitation based on this light. To prevent. Such a first light shielding layer 11a is made of, for example, high Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), Mo (molybdenum), Pb (lead) or the like formed by CVD or sputtering. It consists of a metal simple substance, an alloy, a metal silicide, etc. containing at least one of melting point metals. The film thickness is, for example, about 50 to 300 nm. In particular, when a single optical system is configured by combining a plurality of electro-optical devices via a prism or the like in a multi-plate type color display projector or the like, projection light that penetrates the prism or the like from another electro-optical device Since the return light composed of the portion is strong, it is very effective to provide the first light shielding film 11a on the lower side of the TFT 30 in this way.
[0046]
On the other hand, as shown in FIGS. 2 to 6, the built-in light shielding film 41 is laminated between the TFT 30 and the data line 6a. The built-in light shielding film 41 is made of a single metal, an alloy, a metal silicide, or the like containing a refractory metal with a film thickness of about 50 to 300 nm, like the first light shielding film 11a. Alternatively, similar to the data line 6a, it is made of an Al film having a thickness of about 50 to 500 nm.
[0047]
As shown in FIG. 4, on the TFT array substrate 10, the data line 6a is electrically connected to the high concentration source region 1d in the semiconductor layer 1a made of, for example, a polysilicon film through the contact hole ACNT.
[0048]
On the other hand, as shown in FIG. 5, the pixel electrode 9a relays the barrier layer 34, which is an example of an intermediate conductive layer, to the high-concentration drain region 1e in the semiconductor layer 1a via the contact hole ICNT and the contact hole BCNT. Electrically connected. By using the barrier layer 34 as described above, even if the interlayer distance between the pixel electrode 9a and the semiconductor layer 1a constituting the TFT 30 is as long as about 1000 nm, for example, it is technically difficult to connect the two with a single contact hole. While avoiding this, the two series contact holes ICNT and BCNT having a relatively small diameter can be satisfactorily connected to each other, and the pixel aperture ratio can be increased. In particular, the use of such a barrier layer 34 is useful for preventing etching through when a contact hole is opened. Such a barrier layer 34 is made of a conductive polysilicon film formed by, for example, CVD. Or it consists of a metal simple substance, an alloy, a metal silicide, etc. containing at least one of high melting point metals, such as Ti, Cr, W, Ta, Mo, and Pb formed by CVD or sputtering. By comprising such a refractory metal, the barrier layer 34 can also function as a light shielding film that defines a part of the opening region of each pixel. However, such a barrier layer 34 may be composed of a metal film such as Al (aluminum) other than the refractory metal, and further includes a plurality of these films (for example, a polysilicon film and a metal film). You may comprise from a multilayer film. Further, it may be composed of a transparent conductive layer alone. In any case, the thickness of the barrier layer 34 is, for example, about 50 to 450 nm.
[0049]
As shown in FIG. 6, the island-shaped gate electrode 3a is connected to a built-in light shielding film 41 that also serves as a scanning line via a contact hole BMCNT.
[0050]
As shown in FIGS. 2 to 6, the first capacitor electrode 13 made of the same film as the gate electrode 3a (that is, a conductive polysilicon film) and the second capacitor electrode 33 made of the same film as the barrier layer 34 are formed. The storage capacitor 70 is disposed in a region overlapping the data line 6a in plan view and a region overlapping the upper light shielding film 41 around the gate electrode 3a (see FIG. 2) by being opposed to each other via the dielectric film 42. Has been built.
[0051]
The first capacitor electrode 13 is in surface contact with the barrier layer 34 in the adjacent region of the contact hole BCNT from which the dielectric film 42 has been removed (see FIG. 5), and is connected to the pixel electrode 9a through the barrier layer 34. (At the same time, the contact hole BCNT is connected to the high-concentration drain region 1e) to set the pixel electrode potential.
[0052]
The second capacitor electrode 33 is connected to the conductive first light-shielding film 11a through the contact hole SCNT (see FIG. 4). The lattice-shaped first light-shielding film 11a extends from the image display region in which the pixel electrode 9a is disposed to the periphery thereof, and is electrically connected to a constant potential source to be a fixed potential. That is, the second capacitor electrode 33 is connected to the first light-shielding film 11a and has a fixed potential. Thus, in the present embodiment, the first light shielding film 11a functions as a capacitor line. As a constant potential source to which the first light shielding film 11a extending from the image display area to the peripheral area is connected, a scanning line driving circuit (for supplying a scanning signal for driving the TFT 30 to the gate electrode 3a) Or a constant potential source of a positive power source or a negative power source supplied to a data line driving circuit (described later) for controlling a sampling circuit that supplies an image signal to the data line 6a, or supplied to the counter substrate 20 side. It may be a constant potential.
[0053]
The dielectric film 42 of the storage capacitor 70 is composed of a relatively thin SiNx, SiON, HTO film having a film thickness of, for example, about 5 to 200 nm, or a laminated film thereof. From the viewpoint of increasing the storage capacitor 70, the thinner the dielectric film 42 is, the better, as long as sufficient film thickness reliability is obtained.
[0054]
As shown in FIGS. 4 to 6, the electro-optical device includes a transparent TFT array substrate 10 and a transparent counter substrate 20 disposed to face the TFT array substrate 10. The TFT array substrate 10 is made of, for example, a quartz substrate, a glass substrate, or a silicon substrate, and the counter substrate 20 is made of, for example, a glass substrate or a quartz substrate. The TFT array substrate 10 is provided with a pixel electrode 9a, and an alignment film 16 on which a predetermined alignment process such as a rubbing process has been performed is provided above the pixel electrode 9a. The pixel electrode 9a is made of a transparent conductive thin film such as an ITO (Indium Tin Oxide) film. The alignment film 16 is made of an organic thin film such as a polyimide thin film.
[0055]
On the other hand, a counter electrode 21 is provided over the entire surface of the counter substrate 20, and an alignment film 22 subjected to a predetermined alignment process such as a rubbing process is provided below the counter electrode 21. The counter electrode 21 is made of a transparent conductive thin film such as an ITO film. The alignment film 22 is made of an organic thin film such as a polyimide thin film.
[0056]
The TFT array substrate 10 is provided with a pixel switching TFT 30 that controls switching of each pixel electrode 9a at a position adjacent to each pixel electrode 9a.
[0057]
As shown in FIGS. 4 to 6, the counter substrate 20 may be further provided with a second light shielding film 23 having a lattice shape or a stripe shape. By adopting such a configuration, it is possible to more reliably block incident light from the counter substrate 20 side. In addition, the second light-shielding film 23 functions to prevent the temperature rise of the electro-optical device by forming a surface on which incident light is irradiated with a highly reflective film.
[0058]
Between the TFT array substrate 10 and the counter substrate 20, which are configured as described above and are arranged so that the pixel electrode 9 a and the counter electrode 21 face each other, an electro-optic substance is placed in a space surrounded by a seal material described later. Liquid crystal, which is an example, is sealed and a liquid crystal layer 50 is formed. The liquid crystal layer 50 takes a predetermined alignment state by the alignment films 16 and 22 in a state where an electric field from the pixel electrode 9a is not applied. The liquid crystal layer 50 is made of, for example, a liquid crystal in which one kind or several kinds of nematic liquid crystals are mixed. The sealing material is an adhesive made of, for example, a photo-curing resin or a thermosetting resin for bonding the TFT array substrate 10 and the counter substrate 20 around them, and the distance between the two substrates is set to a predetermined value. Gap materials such as glass fibers or glass beads are mixed.
[0059]
Further, a base insulating film 12 is provided under the pixel switching TFT 30. The base insulating film 12 insulates the TFT 30 from the first light-shielding film 11a and is formed on the entire surface of the TFT array substrate 10, so that the surface of the TFT array substrate 10 is rough due to polishing, dirt remaining after cleaning, and the like. The pixel switching TFT 30 has a function of preventing deterioration of characteristics.
[0060]
In FIG. 4, the pixel switching TFT 30 has an LDD (Lightly Doped Drain) structure, and includes a gate electrode 3a, a channel region 1a ′ of the semiconductor layer 1a in which a channel is formed by an electric field from the gate electrode 3a, a gate Insulating thin film 2 including a gate insulating film that insulates electrode 3a from semiconductor layer 1a, data line 6a, low concentration source region 1b and low concentration drain region 1c of semiconductor layer 1a, high concentration source region 1d of semiconductor layer 1a and high concentration A concentration drain region 1e is provided. As shown in FIG. 5, a corresponding one of the plurality of pixel electrodes 9a is relay-connected to the high-concentration drain region 1e by a barrier layer 34 through contact holes ICNT and BCNT.
[0061]
As shown in FIGS. 4 to 6, on the gate electrode 3a, a first interlayer insulating film 4 in which a contact hole ACNT leading to the high concentration source region 1d and a contact hole ICNT leading to the high concentration drain region 1e are respectively formed. Is formed. A built-in light shielding film 41 is formed on the first interlayer insulating film 4, and a contact hole ICNT leading to the barrier layer 34 and a contact hole ACNT leading to the high concentration drain region 1 d are further formed on the built-in light shielding film 41. A second interlayer insulating film 7 is formed. A data line 6a is formed on the second interlayer insulating film 7, and a third interlayer insulating film 8 in which a contact hole ICNT to the barrier layer 34 is further formed is formed thereon. The aforementioned pixel electrode 9a is provided on the upper surface of the third interlayer insulating film 8 thus configured.
[0062]
As described above, according to the present embodiment, the gate electrode 3a and the built-in light-shielding film 41 that also functions as a scanning line are formed as two layers (separate layers) stacked via an interlayer insulating film. The built-in light shielding film 41 as a scanning line can be composed of a low-resistance metal film at the same time that it is composed of a polysilicon film. For example, in the case of a conductive polysilicon film, 10-20Ω / □ cm ² If it is a low resistance metal film used for the data line 6a, the built-in light shielding film 41 or the first light shielding film 11a, it has a sheet resistance of about 10Ω / □ cm. ² The following low sheet resistance can be realized. Alternatively, if it is sufficient to secure a resistance value comparable to that of a traditional scanning line, a stripe-shaped built-in light shielding film 41 having a narrower line width may be provided, so that the direction crossing the data line 6a is eventually obtained. It is possible to widen the opening area of each pixel.
[0063]
Furthermore, according to the present embodiment, since the gate electrode 3a is made of an island-shaped conductive film, as shown in FIG. 2, the gate electrode 3a is formed using the non-opening region of each pixel where the gate electrode 3a is not formed. The storage capacitor 70 can be configured by using the same film as the electrode 3 a as the first capacitor electrode 13. Therefore, it is possible to secure a sufficient area for creating the storage capacitor 70 without expanding the non-opening area of each pixel. In particular, as shown in FIG. 2, the storage capacitor 70 includes a portion formed in a region surrounding the gate electrode 3a from three sides in a substantially U shape when seen in a plan view, so that it extends around the gate electrode 3a. Non-open areas can be used efficiently. In addition, a contact hole ICNT for connecting the TFT 30 and the pixel electrode 9a can be opened using such a region where the gate electrode 3a is not formed (that is, the contact hole ICNT is formed as in the prior art). There is no need to wire the scanning lines avoiding or opening the contact holes ICNT avoiding the scanning lines).
[0064]
Particularly in the present embodiment, the first capacitor electrode 13 is made of the same film as the gate electrode 3a, and the second capacitor electrode 33 is made of the same film as the barrier layer 34. Therefore, the device configuration and the manufacturing process can be simplified. It is very advantageous. In particular, the first capacitor electrode 13 can be formed only by changing the patterning when forming the gate electrode 3a, and the second capacitor electrode 33 can be formed only by changing the patterning when forming the barrier layer. Further, since the first light-shielding film 11a disposed on the lower side of the TFT 30 is also used as the capacitor line 300 for dropping the second capacitor electrode 33 to a fixed potential, it is necessary to wire the gate electrode 3a side by side and the capacitor line. Absent.
[0065]
In addition to these, the built-in light shielding film 41, the data line 6a, and the first light shielding film 11a that cover the gate electrode 3a, the TFT 30 and the like from above and below, even when handling strong incident light as in projector applications, Sufficient light shielding can be performed against light that adversely affects display such as return light, internal reflection light, and multiple reflection light.
[0066]
As shown in FIG. 3, in the region along the built-in light shielding film 41, the wiring width of the first light shielding film 11a is slightly smaller than the wiring width of the built-in light shielding film 41, and the first light shielding film 11a is built in. It is preferable not to protrude from the formation region of the light shielding film 41. With this configuration, in the region along the built-in light shielding film 41, the incident light is reflected by the upper surface of the first light shielding film 11a that protrudes from the formation region of the built-in light shielding film 41. It is possible to effectively prevent the occurrence of internally reflected light and multiple reflected light. If the built-in light-shielding film 41 is formed to be slightly larger than the first light-shielding film 11a in this way, the return light from the TFT array substrate 10 side is at the part of the built-in light-shielding film 41 that protrudes from the formation region of the first light-shielding film 11a. Due to the reflection, a little internal reflection light and multiple reflection light are generated inside the electro-optical device. However, since the return light has a much lower light intensity than the incident light, the adverse effect of the internal reflection and the multiple reflected light due to the return light is less than that of the incident light. Therefore, the configuration of this embodiment is advantageous.
[0067]
Further, as shown in FIGS. 2 and 3, in order to form a contact hole ICNT connecting the pixel electrode 9a and the barrier layer 34, the built-in light shielding film 41 has a portion corresponding to the contact hole ICNT. . Accordingly, the light shielding performance against the incident light from the counter substrate 20 side in this portion is slightly lowered. In this embodiment, the island-like conductive film 3b made of the same film as the gate electrode 3a is replaced with this built-in light shielding. The film 41 is provided in an area where the film 41 does not exist. Although such a conductive film 3b is not a light shielding film, it has a property of absorbing light, and therefore exhibits a sufficient effect in preventing oblique incident light from reaching the channel region 1a of the TFT 30. Further, even if the built-in light shielding film 41 is constricted in this way, the first light shielding film 11a is not constricted (it is not necessary to constrict), so the first light shielding film 11a is an opening of a pixel in the vicinity of the contact hole ICNT. Define areas and prevent light leakage.
[0068]
In the embodiment described above, by stacking a large number of conductive layers, a step is generated in a region along the data line 6a and the gate electrode 3a. However, the TFT array substrate 10, the base insulating film 12, and the first interlayer insulating film 4 are formed. The planarization may be performed by digging a groove in the second interlayer insulating film 7 and embedding the wiring such as the data line 6a or the TFT 30 or the like, or the third interlayer insulating film 8 or the second interlayer insulating film 7 The planarization process may be performed by polishing a step on the upper surface by a CMP (Chemical Mechanical Polishing) process or the like, or by flattening using an organic SOG.
[0069]
Further, in the embodiment described above, the pixel switching TFT 30 preferably has an LDD structure as shown in FIG. 3, but has an offset structure in which impurities are not implanted into the low concentration source region 1b and the low concentration drain region 1c. Alternatively, it may be a self-aligned TFT in which a high concentration source and drain regions are formed in a self-aligned manner by implanting impurities at a high concentration using a gate electrode consisting of a part of the gate electrode 3a as a mask. In this embodiment, only one gate electrode of the pixel switching TFT 30 is arranged between the high concentration source region 1d and the high concentration drain region 1e. However, two or more gate electrodes are provided between these gate electrodes. You may arrange. If the TFT is configured with dual gates or triple gates or more in this way, leakage current at the junction between the channel and the source and drain regions can be prevented, and the off-time current can be reduced.
[0070]
In each of the electro-optical devices according to the first embodiment and the following embodiments, each interlayer insulating film that insulates between the conductive films is formed by TEOS (tetra-ethyl) by, for example, normal pressure, low pressure CVD, plasma CVD, or the like.・ Silicate glass films such as NSG (non-doped silicate glass), PSG (phosphorus silicate glass), silicon nitride films and oxides using ortho-silicate gas, TEB (tetra-ethyl boat rate) gas, etc. What is necessary is just to comprise from a silicon film etc. Moreover, the film thickness of each interlayer insulation film is about 100-1000 nm.
[0071]
In the present embodiment, in particular, the second capacitor electrode 33 that is set to a fixed potential is disposed between the first capacitor electrode 13 that is set to the pixel electrode potential and the built-in light shielding film 41 that functions as a scanning line. Capacitive coupling between the light shielding film 41 and the first capacitive electrode 13 can prevent the potential fluctuations of both from adversely affecting each other. Conversely, the first interlayer insulating film 4 between them need not be thick in order to reduce the adverse effects due to such capacitive coupling.
[0072]
(Second Embodiment)
Next, a second embodiment of the electro-optical device of the invention will be described with reference to FIG. Here, FIG. 7 is a plan view of the pixel of the TFT array substrate in which the light shielding film is extracted as in FIG. In FIG. 7, the same reference numerals are given to the same components as those in FIGS. 2 to 6 (first embodiment), and description thereof will be omitted.
[0073]
As shown in FIG. 7, in the second embodiment, the planar shape of the built-in light shielding film 41 ′ that also serves as a stripe-shaped scanning line is different from that in the first embodiment. More specifically, the built-in light-shielding film 41 ′ includes a main line portion that extends across the data line 6a and a protrusion portion that protrudes along the data line 6a from a location where it intersects the data line 6a. About another structure, it is the same as that of the case of 1st Embodiment.
[0074]
Therefore, according to the second embodiment, as in the case of the first embodiment, the opening area of each pixel in the direction intersecting the data line 6a can be defined by the main line portion of the built-in light shielding film 41 ′. By the protruding portion of the light shielding film 41 ′, most of the opening area of each pixel in the direction along the data line 6a can be defined. Then, the vicinity of the contact hole ACNT ahead of the protruding portion may be shielded by the data line 6a. Note that the protruding portion of the built-in light shielding film 41 'is formed wider than the data line 6a, so that the return light is reflected by the lower surface of the data line 6a protruding from the region where the protruding portion of the built-in light shielding film 11a is formed. Thus, it is possible to effectively reduce the internally reflected light and the multiple reflected light generated inside the electro-optical device.
[0075]
Here, the electrical connection between the first capacitor electrode 13 and the high-concentration drain region 1e in the first and second embodiments described above will be described with reference to FIG. FIG. 8A is an enlarged cross-sectional view showing a portion related to the electrical connection in the BB ′ cross section shown in FIG.
[0076]
As shown in FIG. 8A, the first capacitor electrode 13 is electrically connected to the high-concentration drain region 1e through the barrier layer 34 to be a pixel electrode potential. Such a connection can be obtained relatively easily when the contact hole BCONT is formed by setting “the thickness of the barrier layer 34> the thickness of the insulating thin film 2 (gate insulating film)”.
[0077]
However, as shown in FIG. 8B, even if the first capacitor electrode 13 and the high concentration drain region 1e are directly connected by opening a contact hole BCNT ′ in the insulating thin film 2 (gate insulating film). Good. For such connection, when the high concentration drain region 1e made of a polysilicon film or the like is exposed at the bottom of the contact hole BCNT ′, the surface oxidation of the high concentration drain region 1e can be an obstacle. Such an oxide film can be removed relatively easily by light etching with hydrofluoric acid. However, if light etching with hydrofluoric acid is performed on the insulating thin film 2 (gate insulating film), defects such as pinholes may occur. Therefore, as shown in FIG. Is electrically connected to the high-concentration drain region 1e through the barrier layer 34 in order to improve device reliability.
[0078]
Alternatively, as shown in FIG. 8C, the first capacitor electrode 13 may be extended to the right in FIGS. 2 and 5, for example, and integrated with the conductive film 3b. In this case, the second capacitor electrode 33 is similarly extended rightward and integrated with the barrier layer 34. Then, the second capacitor electrode 33 and the first capacitor electrode 13 that face each other via the dielectric film 42 in FIG. 8C also function as a part of the storage capacitor 70. At this time, the contact hole BCNT ′ is provided to connect the first capacitor electrode 13 and the high concentration drain region 1e. The contact hole ICNT is provided for connecting the first capacitor electrode 13 and the pixel electrode 9a (that is, connecting the first capacitor electrode 13 directly to the pixel electrode 9a without relaying the barrier layer 34).
[0079]
(Overall configuration of electro-optical device)
The overall configuration of the electro-optical device according to each embodiment configured as described above will be described with reference to FIGS. FIG. 9 is a plan view of the TFT array substrate 10 viewed from the counter substrate 20 side together with the components formed thereon, and FIG. 10 is a cross-sectional view taken along the line HH ′ of FIG.
[0080]
In FIG. 9, a sealing material 52 is provided on the TFT array substrate 10 along the edge, and in parallel with the inner side of the sealing material 52, for example, an image display region made of the same or different material as the second light shielding film 23. A third light-shielding film 53 is provided as a frame that defines the periphery of 10a. In a region outside the sealing material 52, a data line driving circuit 101 and an external circuit connection terminal 102 for driving the data line 6a by supplying an image signal to the data line 6a at a predetermined timing along one side of the TFT array substrate 10. A scanning line driving circuit 104 for driving the gate electrode 3a by supplying a scanning signal to the gate electrode 3a at a predetermined timing using the built-in light shielding film 41 as a scanning line is provided along two sides adjacent to the one side. Is provided. Needless to say, if the delay of the scanning signal supplied to the gate electrode 3a is not a problem, the scanning line driving circuit 104 may be provided on only one side. The data line driving circuit 101 may be arranged on both sides along the side of the image display area 10a. Further, on the remaining side of the TFT array substrate 10, a plurality of wirings 105 are provided for connecting between the scanning line driving circuits 104 provided on both sides of the image display region 10a. In addition, at least one corner of the counter substrate 20 is provided with a conductive material 106 for electrical connection between the TFT array substrate 10 and the counter substrate 20. As shown in FIG. 10, the counter substrate 20 having substantially the same outline as the sealing material 52 shown in FIG. 9 is fixed to the TFT array substrate 10 by the sealing material 52.
[0081]
On the TFT array substrate 10, in addition to the data line driving circuit 101, the scanning line driving circuit 104 and the like, a sampling circuit for applying an image signal to the plurality of data lines 6a at a predetermined timing, and a plurality of data lines A precharge circuit for supplying a precharge signal of a predetermined voltage level in advance to the image signal to 6a, an inspection circuit for inspecting quality, defects, etc. of the electro-optical device during manufacture or at the time of shipment are formed. Also good.
[0082]
In each of the embodiments described above with reference to FIGS. 1 to 10, instead of providing the data line driving circuit 101 and the scanning line driving circuit 104 on the TFT array substrate 10, for example, on a TAB (Tape Automated Bonding) substrate. The mounted LSI for driving may be electrically and mechanically connected via an anisotropic conductive film provided on the periphery of the TFT array substrate 10. Further, for example, a TN mode, a VA (Vertically Aligned) mode, a PDLC (Polymer Dispersed Liquid Crystal) mode, and the like are respectively provided on the side on which the projection light of the counter substrate 20 enters and the side on which the emission light of the TFT array substrate 10 exits. A polarizing film, a retardation film, a polarizing plate, and the like are arranged in a predetermined direction according to the operation mode and the normally white mode / normally black mode.
[0083]
Since the electro-optical device in each embodiment described above is applied to a projector, three electro-optical devices are respectively used as RGB light valves, and each light valve has a dichroic mirror for RGB color separation. The light of each color resolved through the light enters as projection light. Therefore, in each embodiment, the counter substrate 20 is not provided with a color filter. However, an RGB color filter may be formed on the counter substrate 20 together with the protective film in a predetermined region facing the pixel electrode 9a where the second light shielding film 23 is not formed. In this way, the electro-optical device in each embodiment can be applied to a direct-view type or reflective type color electro-optical device other than the projector. Further, a microlens may be formed on the counter substrate 20 so as to correspond to one pixel. Alternatively, it is also possible to form a color filter layer with a color resist or the like under the pixel electrodes 9 a facing RGB on the TFT array substrate 10. In this way, a bright electro-optical device can be realized by improving the collection efficiency of incident light. Furthermore, a dichroic filter that produces RGB colors by using interference of light may be formed by depositing several layers of interference layers having different refractive indexes on the counter substrate 20. According to this counter substrate with a dichroic filter, a brighter color electro-optical device can be realized.
[0084]
The present invention is not limited to each of the above-described embodiments, and can be appropriately changed without departing from the spirit or concept of the invention that can be read from the claims and the entire specification. An optical device is also included in the technical scope of the present invention.
[Brief description of the drawings]
FIG. 1 is an equivalent circuit of various elements, wirings, and the like provided in a plurality of matrix pixels that form an image display region in an electro-optical device according to a first embodiment of the invention.
FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed in the electro-optical device according to the first embodiment.
FIG. 3 is a plan view of a pixel of a TFT array substrate in which a light shielding film in the first embodiment is extracted and shown.
4 is a cross-sectional view taken along line AA ′ of FIG.
5 is a cross-sectional view taken along the line BB ′ of FIG.
6 is a cross-sectional view taken along the line CC ′ of FIG.
FIG. 7 is a plan view of a pixel of a TFT array substrate in which a light shielding film in a second embodiment is extracted and shown.
FIG. 8 is a cross-sectional view (FIG. 8A) showing an example of electrical connection between the first capacitor electrode and the high-concentration drain region, and a cross-sectional view showing another example (FIG. 8B, FIG. c)).
FIG. 9 is a plan view of a TFT array substrate in the electro-optical device according to each embodiment as viewed from the counter substrate side together with each component formed on the TFT array substrate.
10 is a cross-sectional view taken along the line HH ′ of FIG. 9. FIG.
[Explanation of symbols]
1a ... Semiconductor layer
1a '... channel region
1b ... low concentration source region
1c: low concentration drain region
1d ... High concentration source region
1e ... High concentration drain region
2. Insulating thin film (gate insulating film)
3a ... Gate electrode
3b ... conductive film
4. First interlayer insulating film
6a ... Data line
7. Second interlayer insulating film
8 ... Third interlayer insulating film
9a: Pixel electrode
10 ... TFT array substrate
11a ... 1st light shielding film
12 ... Underlying insulating film
13 ... 1st capacity electrode
16 ... Alignment film
20 ... Counter substrate
21 ... Counter electrode
22 ... Alignment film
23. Second light shielding film
30 ... TFT
33. Second capacitor electrode
34 ... Barrier layer
41, 41 '... Built-in light shielding film
50 ... Liquid crystal layer
70 ... Storage capacity
SCNT, BCNT, ICNT, ACNT, BMCNT ... Contact hole

Claims (11)

On the board
A pixel electrode;
A thin film transistor having a gate electrode made of a conductive film divided into islands and electrically connected to the pixel electrode;
A data line electrically connected to the thin film transistor;
An intermediate conductive layer that relay-connects the pixel electrode and the thin film transistor;
A conductive upper-layer light-shielding film that extends across the data line on the upper layer side of the thin-film transistor and is stacked on the gate electrode via an interlayer insulating film and at least partially defines an opening region of the pixel When,
A first capacitor electrode made of the same film as the gate electrode and electrically connected to the thin film transistor and the pixel electrode; and disposed opposite to the first capacitor electrode via a dielectric film; A storage capacitor having a second capacitor electrode made of the same film ,
The electro-optical device, wherein the upper light shielding film is formed of a material having a resistance lower than that of the gate electrode, and is electrically connected to the gate electrode and also serves as a scanning line.   The electro-optical device according to claim 1, wherein the upper light shielding film extends in a stripe shape so as to intersect the data line. On the substrate, provided with a conductive lower layer light-shielding film in a lattice shape or stripe shape, which is disposed on the lower layer side of the thin film transistor and covers at least a channel region of the thin film transistor when viewed from the substrate side,
The first capacitor electrode is electrically connected to the pixel electrode to be a pixel electrode potential, and the second capacitor electrode is electrically connected to the lower light shielding film to be a fixed potential. The electro-optical device according to claim 1 . The lower-layer light-shielding film extends from the image display area to the outside of the image display area, and is electrically connected to a constant potential line or a constant potential source outside the image display area. Item 4. The electro-optical device according to Item 3 . The lower shielding film, the electro-optical device according to claim 3 or 4, characterized in that not protrude from the formation region of the upper light shielding film in plan view of the substrate. The storage capacity, the electro-optical device according to any one of claims 1 to 4, characterized in that it is formed in a region overlapping the data line in plan view. The electro-optical device according to claim 6 , wherein the storage capacitor is also formed in a region where the data line does not exist in a plan view and overlaps the upper light shielding film. The electro-optical device according to claim 7 , wherein the storage capacitor is formed in a region surrounding the gate electrode from at least two sides when viewed in a plan view. The upper-layer light shielding film includes a main line portion extending across the data line as viewed in a plan view, and a protruding portion protruding along the data line from a location intersecting the data line. Item 9. The electro-optical device according to any one of Items 1 to 8 . The protrusion is formed wider than the data line in plan view, and the data line is formed except for a portion where a contact hole for connecting the data line and the thin film transistor is opened. The electro-optical device according to claim 9 , wherein the electro-optical device covers the formed region. Projector characterized by comprising an electro-optical device according to any one of claims 1 to 10.

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