TR199902280A2 - Es timing circuit. - Google Patents
Es timing circuit.Info
- Publication number
- TR199902280A2 TR199902280A2 TR1999/02280A TR9902280A TR199902280A2 TR 199902280 A2 TR199902280 A2 TR 199902280A2 TR 1999/02280 A TR1999/02280 A TR 1999/02280A TR 9902280 A TR9902280 A TR 9902280A TR 199902280 A2 TR199902280 A2 TR 199902280A2
- Authority
- TR
- Turkey
- Prior art keywords
- microprocessors
- cards
- values
- ensure
- timing circuit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1658—Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
- G06F11/1683—Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Hardware Redundancy (AREA)
- Debugging And Monitoring (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Bus Control (AREA)
Abstract
Bu bulus, mikroislemeci (1) içeren, es iki sayisal kartin eszamanli çalismasini saglayan, bir tüm devre ile ilgili olup özellikleri her iki kartin bibirlerinin belleklerine (5) erisimini saglamak, kartlarin eszamanli çalismaya baslamasi için gerkeli sinyalleri üretmek, eszamanli çalismayi saglamak amaciyla her iki karttaki mikroislemcilerin (1) komut çevrimi bazinda eszamanli çalismasini saglammak, eszamanli çalisma sirasinda her iki mikroislemecinin (1) adres ve veri yollarin (7,8) karsilastirarak olusacak uyumsuzluklari saptamak, uyumsuzlugu bir kesme isaretiyle her iki mikroislemeciye (1) bildirerek uyumsuzlugun olustugu adres ve veri yolu (7,8) degerlerini içsel bir kütüge yazarak mikroislemcilerin (1) bu degerleri okuyabilmesini saglamaktir.This invention, including the microprocessor (1), allows simultaneous operation of two digital cards, is related to a whole circuit, its features are to provide access to the memory (5) of both cards, to generate the necessary signals for the cards to start working synchronously, to ensure synchronous operation. to ensure that the microprocessors (1) on the card work simultaneously on the basis of the command cycle, to identify the incompatibilities that will occur by comparing the address and data paths of both microprocessors (1), to both microprocessors (1) with an interrupt signal and to be incompatible with both microprocessors (1) By writing the values of the data bus (7,8) to an internal library, microprocessors (1) can read these values.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TR1999/02280A TR199902280A2 (en) | 1999-09-17 | 1999-09-17 | Es timing circuit. |
PCT/TR2000/000050 WO2001020465A2 (en) | 1999-09-17 | 2000-09-18 | Synchronizer circuit |
AU76989/00A AU7698900A (en) | 1999-09-17 | 2000-09-18 | Synchronizer circuit |
GB0208703A GB2371390B (en) | 1999-09-17 | 2000-09-18 | Synchroniser circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TR1999/02280A TR199902280A2 (en) | 1999-09-17 | 1999-09-17 | Es timing circuit. |
Publications (1)
Publication Number | Publication Date |
---|---|
TR199902280A2 true TR199902280A2 (en) | 2001-02-21 |
Family
ID=21622162
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TR1999/02280A TR199902280A2 (en) | 1999-09-17 | 1999-09-17 | Es timing circuit. |
Country Status (4)
Country | Link |
---|---|
AU (1) | AU7698900A (en) |
GB (1) | GB2371390B (en) |
TR (1) | TR199902280A2 (en) |
WO (1) | WO2001020465A2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10122693B4 (en) * | 2001-05-10 | 2004-05-06 | Siemens Ag | Method for operating a redundant processor unit for a highly available computing system |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3864670A (en) * | 1970-09-30 | 1975-02-04 | Yokogawa Electric Works Ltd | Dual computer system with signal exchange system |
FR2561410B1 (en) * | 1984-03-13 | 1987-11-20 | Merlin Gerin | PROCESS CONTROL ASSOCIATED WITH TWO REDUNDANT PROGRAMMABLE CONTROLLERS |
CA1239227A (en) * | 1984-10-17 | 1988-07-12 | Randy D. Pfeifer | Method of and arrangement for ordering of multiprocessor operations in a multiprocessor system |
EP0306211A3 (en) * | 1987-09-04 | 1990-09-26 | Digital Equipment Corporation | Synchronized twin computer system |
DE4341082A1 (en) * | 1993-12-02 | 1995-06-08 | Teves Gmbh Alfred | Circuit arrangement for safety-critical control systems |
-
1999
- 1999-09-17 TR TR1999/02280A patent/TR199902280A2/en unknown
-
2000
- 2000-09-18 AU AU76989/00A patent/AU7698900A/en not_active Abandoned
- 2000-09-18 GB GB0208703A patent/GB2371390B/en not_active Expired - Fee Related
- 2000-09-18 WO PCT/TR2000/000050 patent/WO2001020465A2/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2001020465A2 (en) | 2001-03-22 |
GB2371390B (en) | 2004-07-14 |
GB2371390A (en) | 2002-07-24 |
AU7698900A (en) | 2001-04-17 |
WO2001020465A3 (en) | 2001-12-27 |
GB0208703D0 (en) | 2002-05-29 |
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