GB2371390A - Synchronizer circuit - Google Patents
Synchronizer circuit Download PDFInfo
- Publication number
- GB2371390A GB2371390A GB0208703A GB0208703A GB2371390A GB 2371390 A GB2371390 A GB 2371390A GB 0208703 A GB0208703 A GB 0208703A GB 0208703 A GB0208703 A GB 0208703A GB 2371390 A GB2371390 A GB 2371390A
- Authority
- GB
- United Kingdom
- Prior art keywords
- microprocessors
- allows
- boards
- address
- synchronised
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1658—Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
- G06F11/1683—Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Hardware Redundancy (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Debugging And Monitoring (AREA)
- Bus Control (AREA)
Abstract
This invention is related to an integrated circuit for the synchronous operation of two identical digital boards comprising microprocessors, wherein it allows each board to access to each other's memories (5), produces the necessary signals to start the synchronised operation of boards, allows the microprocessors (1) on both boards to have a synchronised operation on a command interpretation basis to provide synchronised operation, determines the probable incompatibilities by comparing the address and data buses (7, 8) of both microprocessors (1) during the synchronised operation, reports the incompatibility to both microprocessors (1) by a break signal, and allows the microprocessors (1) to read the address and data bus (7, 8) values of an incompatibility by writing the said values on an internal log.
Description
.,UK Patent Application,g,GB ',2371 390 HA {43} Date of Printing by UK
Omce 24.07.2002 (21) Application No 0208703.g (51) INTCL7 G06F 11/16
(22) Date of Filing 18.092000 (52) UK CL (Edition T) (30) Priority Data G4A AEC A12N A12T (31) 9902280 (32) 17.09.1999 (33) TR
(56) Documents Cited by ISA (86) International Application Data EP 0315303 A W086/02475 A PCT/TR00/00050 En 18.092000 FR 002561410 A US 5862502 A US 3864670 A
(87) International Publication Data WO01/20465 En 22.032001 (58) Field of Search by ISA
INTCL7 G06F
Online: EPO4ntarnal, PAJ, WPI Data (71) Applicant(s) Netas Northern Eloetrie Tealeeommunieation A S. Ilncorporated in Turkey) (74) Agent and/or Address for Service Netas, Alemdao Cad., Umranlye 81244. h tanbul. Lloyd Wise, Tregoar & Co Turkey Commonwealth House, 1-19 New Oxford Street, LONDON, WC1A lLW, United Kingdom (72) Inventor(s) Omer Aydin Atilla Tanyeli Ozgur Kayalar (54) Abstract rtle Synehronizer eireuit (57) This invention is related to an integrated circuit for the synchronous operation of two identical digital boards comprising microprocessors, wherein it allows each board to access to each other's memories (5), produces the necessary signals to start the synchronised operation of boards, allows the microprocessors ( 1} on both boards to have a synchronised operation on a command interpretation basis to provide synchronised operation, determines the probable incompatibilities by comparing the address and data buses (7, 8) of both microprocessors (1) during the synchronised operation, reports the incompatibility to both microprocessors (1) by a break signal, and allows the microprocessors (1) to read the address and data bus (7, 8) values of an incompatibility by writing the said values on an internal log.
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Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TR1999/02280A TR199902280A2 (en) | 1999-09-17 | 1999-09-17 | Es timing circuit. |
PCT/TR2000/000050 WO2001020465A2 (en) | 1999-09-17 | 2000-09-18 | Synchronizer circuit |
Publications (3)
Publication Number | Publication Date |
---|---|
GB0208703D0 GB0208703D0 (en) | 2002-05-29 |
GB2371390A true GB2371390A (en) | 2002-07-24 |
GB2371390B GB2371390B (en) | 2004-07-14 |
Family
ID=21622162
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0208703A Expired - Fee Related GB2371390B (en) | 1999-09-17 | 2000-09-18 | Synchroniser circuit |
Country Status (4)
Country | Link |
---|---|
AU (1) | AU7698900A (en) |
GB (1) | GB2371390B (en) |
TR (1) | TR199902280A2 (en) |
WO (1) | WO2001020465A2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10122693B4 (en) * | 2001-05-10 | 2004-05-06 | Siemens Ag | Method for operating a redundant processor unit for a highly available computing system |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3864670A (en) * | 1970-09-30 | 1975-02-04 | Yokogawa Electric Works Ltd | Dual computer system with signal exchange system |
FR2561410A1 (en) * | 1984-03-13 | 1985-09-20 | Merlin Gerin | Control for a process associated with two redundant programmable automatic controllers |
WO1986002475A1 (en) * | 1984-10-17 | 1986-04-24 | American Telephone & Telegraph Company | Method of and arrangement for ordering of multiprocessor operations in a multiprocessor system |
EP0315303A2 (en) * | 1987-09-04 | 1989-05-10 | Digital Equipment Corporation | Duplicated fault-tolerant computer system with error checking |
US5862502A (en) * | 1993-12-02 | 1999-01-19 | Itt Automotive Europe Gmbh | Circuit arrangement for safety-critical control systems |
-
1999
- 1999-09-17 TR TR1999/02280A patent/TR199902280A2/en unknown
-
2000
- 2000-09-18 AU AU76989/00A patent/AU7698900A/en not_active Abandoned
- 2000-09-18 GB GB0208703A patent/GB2371390B/en not_active Expired - Fee Related
- 2000-09-18 WO PCT/TR2000/000050 patent/WO2001020465A2/en active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3864670A (en) * | 1970-09-30 | 1975-02-04 | Yokogawa Electric Works Ltd | Dual computer system with signal exchange system |
FR2561410A1 (en) * | 1984-03-13 | 1985-09-20 | Merlin Gerin | Control for a process associated with two redundant programmable automatic controllers |
WO1986002475A1 (en) * | 1984-10-17 | 1986-04-24 | American Telephone & Telegraph Company | Method of and arrangement for ordering of multiprocessor operations in a multiprocessor system |
EP0315303A2 (en) * | 1987-09-04 | 1989-05-10 | Digital Equipment Corporation | Duplicated fault-tolerant computer system with error checking |
US5862502A (en) * | 1993-12-02 | 1999-01-19 | Itt Automotive Europe Gmbh | Circuit arrangement for safety-critical control systems |
Also Published As
Publication number | Publication date |
---|---|
WO2001020465A2 (en) | 2001-03-22 |
WO2001020465A3 (en) | 2001-12-27 |
AU7698900A (en) | 2001-04-17 |
GB2371390B (en) | 2004-07-14 |
GB0208703D0 (en) | 2002-05-29 |
TR199902280A2 (en) | 2001-02-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20060918 |