SU995200A1 - Automatic synchronizer with constant advance time - Google Patents

Description

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The invention relates to devices for automatically synchronizing alternators of alternating current of various frequencies, in particular, generators with a nominal frequency of 400 Hz.

Automatic synchronization devices are known that are operable during synchronization of high-frequency generators, in which the determination of the time of activation is carried out by comparing the phase difference increment over consecutive discrete time intervals with the current value of phase difference 1 and 2.

The disadvantages of these devices are low accuracy at close to zero difference in the frequencies of synchronized voltages, complexity and lack of reliability, due to the need for a large amount of computational operations.

The closest in technical sushi to the present invention is a device for automatic synchronization with a constant lead time, which contains two square pulse formers, connected to a PhpaTopoM phase computer, two RS triggers, And logic circuits, two counters with a comparison circuit.

diagrams of the analization of the state of the counter and the duration of the period, the OR logic and the pulse extender. In this case, square pulse drivers with inputs for connecting mains voltage and generator outputs are connected to the phase comparator, the counting input of the first counter is connected to one of the square pulse drivers, and the inputs of the comparison circuit are connected to the outputs of the second pulse counter.

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The device works as if

synchronization of generators with frequency

50 Hz and increased frequency when

beating period less than the time before 15 and 3.

However, this device does not have high speed, since the cycle of its work has two stages. The first stage is not less than the lead time, ton, in which the duration between two moments of phase coincidence is exceeded ton, which may include one or several beat periods, the second stage, in which time is determined from ton BEFORE phase coincidence. The duration of the second stage in the best case can be one beat period. Thus, the device generates a switch-on signal with a specified lead time once for several beat periods, the number of which can be from two to a value determined by the frequency difference of the synchronized voltages. The purpose of the invention is to increase the speed of the device to one beat period, regardless of the frequency difference. The goal is achieved by the fact that, in an automatic synchronizer containing two square pulse drivers connected to a phase comparator, two pulse counters, the counting input of the first of which is connected to one of the square pulse drivers, are connected to a portion of their inputs pulse counter, and logic And, entered accumulating adder, the inputs of which are connected to the outputs of the first pulse counter, the input of zero installation is connected to the input of the initial the second pulse counter and the output of the phase comparator, and the synchronization input of the summation with the output of the logic circuit I, the analysis circuit of the code combinations, the inputs of which are connected to the outputs of the accumulating adder and the inputs of the comparison circuit, a single vibrator connected to the R-BXO zero setting first pulse counter, the counting input of which is combined with the counting input of the second pulse counter, and a pulse generator connected to one of the inputs of the logic circuit AND, the other input of which is connected to the input of a single-vibration Ator and to the analysis of the code combinations, while the output of the synchronizer is the output of the comparison circuit. FIG. 1 shows a block diagram of the proposed device; in fig. 2 and 3 are timing diagrams explaining its principle of operation (in Fig. 3, the designations of the time diagrams correspond to the designation of the U1 nodes in Fig. 1). Automatic synchronizer contains two formers 1 and 2 rectangular pulses that convert sinusoidal voltages of like phases (Up and Uc) of synchronized objects into rectangular pulses, phase comparator 3, which forms a short pulse at the moments of synchronized voltage phases, counters 4 and 5 pulses with the counting inputs T and the input of the initial installation (NU), accumulating adder 6 with the R input of the zero setting and the C input of the summing synchronization, the comparison circuit 7, the analysis code circuit 8, ogicheskuyu AND circuit 9, a monostable multivibrator 10 and a generator 11, which forms the high frequency rectangular pulses. The device works as follows. By the number of counting pulses, which can be used as rectangular pulses from one of the formers 1 or 2, counted by the counter 5 during the period of the beating period, the duration of the beating period is determined (nj in one beat period, n in the other, etc. .). After that, at the moment of the end of one and the beginning of another period of beatings, the value of the period of bending counted out by the counter increases by k times, where k 1,2,3 ... is any integer number. This continues until the ratio for one beat period is fulfilled, in another, etc. The values thus obtained nk and n, -k correspond to the minimum time interval between two moments of phase coincidence, the duration of which is not less than the specified advance time ton at the current, moment in time. One time from the beginning of each beat period, a time corresponding to n-k (for another beat period, etc.) is counted, reduced by an amount corresponding to the lead time. The moment of reaching the specified number of pulses corresponds to the point in time with a specified lead time, which can be both in the same beat period and after several beat periods, depending on the duration of the beat period. Counting the duration of each of the periods of the beats p, P | etc. is carried out by the counter 5. At the moment of the end of one beat period (Fig. 3) and the beginning of the other, the accumulating adder 6 is reset to the zero state at the R input by a pulse from the phase comparator 3. The logic analysis circuit of the code combinations, the output of which takes zero logic level with code combinations of accumulating adder corresponding to values less than t, and one - with code combinations of adder corresponding to values of t, produces a signal corresponding to ton. As a result, this input signal t to the AND 9 circuit and allows passage of the pulse accumulator from the generator 11 to the C-sync input. After the first pulse from the generator 11, the adder 6 (previously reset to the zero state) is added with the number stored at that moment in counter 5 ( or n, etc.). In the second pulse, the number with the second pulse is added to the number already in the adder 6

counter 5, etc. until the condition. (or the like) is fulfilled. When code accumulators appear in the adder 6 corresponding to the ign values, a signal appears at the output of the analysis circuit 8. Forbidding the passage of pulses from the generator 11 to the C input of the adder.

At the same time, by the same change in the signal at the output of the analysis circuit 8 with the one-shot, 10 a pulse is generated to reset the counter 5, which starts a new cycle of counting the duration of the beat period. The summation process by the adder 6 lasts a short time (for this purpose, generator 11 with pulses of sufficiently high frequency is used) as compared to counting pulses with a frequency equal to the frequency of one of the synchronized generators, i.e. the time of summation does not affect the accuracy of the device, and the reset of counter 5 practically coincides with the beginning of the periods of beats.

Thus, in the adder 6, a code is permanently stored corresponding to the minimum time interval between two moments of phase coincidence, the duration of which is not less than the specified advance time ton at the current time.

Counter 4 at the beginning of each beat period from the phase comparator 3 is set to the initial state corresponding to a predetermined advance time (i.e., equal to the number of counting pulses within the ton interval). The counting pulses arriving at the T input of the counter 4 increase its state and at the time corresponding to the predetermined advance time until the phases coincide, the state of the counter 4 becomes equal to the state of the adder 6, which is detected by the comparison circuit 7, at the time of the coincidence of the states of the counter 4 and adder 6 from the last moment of phase coincidence will be counted time nkt (for another beat period n ,. item). From this moment on, through time t, one of the moments of phase coincidence will occur, since (n-k is the value equal to the minimum time interval between two moments of phase coincidence, the duration of which is not less than the specified advance time t.

A signal with a predetermined advance time is formed in such a way that, each, the period of the beats and, if necessary, synchronization of alternating current generators, can be expanded by known methods to the required magnitude and issued to activate the corresponding equipment.

The proposed synchronizer allows the formation of a signal with a specified time ahead of each beat period, regardless of the duration of the beat period, including the case

5 when the beat period of synchronized generators is shorter than the switching on time of the generator switching equipment, which is especially important when synchronizing generators with a higher frequency, for example 400 Hz.

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Claims (1)

Invention Formula An automatic synchronizer with a direct advance time, containing two square pulse formers with inputs for connecting to a network voltage and a generator, connected by outputs to a phase comparator, two pulse counters, a counting input The first of which is connected to one of the rectangular pulse formers, a comparable circuit connected by part of its inputs to the outputs of the second pulse counter, and an AND logic circuit, characterized in that it is equipped with an accumulating adder whose inputs are connected to increase performance. to the outputs of the first pulse counter, the zero-setup input is connected to the initial setup input of the second pulse counter and to the phase comparator output, and the synchronization input to the output of the logic circuit And, Hema analysis codewords whose inputs are connected to outputs nakaplivayuschegr adder and to inputs of a comparison circuit, 5 one-shot connected to the R-input zero installation of the first pulse counter, the counting input of which is combined with the counting input of the second counter to them. pulses and a pulse generator connected to one of the inputs of the logic circuit AND, the other input of which is connected to the input of the one-shot and to the output / analysis circuit of the code combinations, while the output of the synchronizer is the output of the comparison circuit. Information sources, taken into account in the examination 1 USSR author's certificate No. 394890, cl. H 02 J 3/42, 1974. 2 USSR author's certificate No. 531230, cl. H 02 J 3/42, 1977. 3 USSR author's certificate No. 855855, cl. H 02 J 3/42, 1979.. Fig, 1 and Period, SucHuii n-lK-tm ton q / (- tpa n CveaivuKf | / 7 SM6 I i out n -k-tg ton Hfk-ttnten n /12 fif i / f ton P2 -K tffn I h (rig 3