SU1045374A1 - Device for detecting difference frequency - Google Patents

Description

The invention relates to pulsed light engineering and can be used in frequency-pulse type devices. A device is known for separating the difference frequency of two pulse sequences, containing four T) triggers and an .RS trigger, the inputs of which are connected to the input busbar, and the clock frequency is fed to the clock inputs of the first and second D-triggers, the inverse of the second and the second the fourth D-flip-flops are connected to the reset inputs of the first and second TE-flip-flops respectively, the B-INPUTS of which are connected respectively to the direct and inverse outputs of the H5 flip-flop fJ-1 The disadvantage of this device is that it does not allow time The remaining frequency of two pulsed sequences close in frequency pulsating around each other, and the presence of clocking creates additional accuracy in measuring the difference frequency, since there is a delay of impulses, the closest to the technical essence and the achieved result to the proposed the frequencies of two pulse sequences containing the first and second inverters, the first and second triggers, the first outputs of which are connected to the first inputs of the corresponding These are the first and second elements And, the second inputs of which are connected respectively to the first and second input buses and inputs of the first and second inverters, respectively, and the first inputs of the second and first triggers, respectively, the second inputs of which are connected to the outputs of the third and fourth elements, respectively, the inputs of which are connected to the second outputs of the first and second triggers, respectively, and the second inputs to the outputs of the second and first inverters respectively 2 The known device, ensuring normal matching operation. the phase positions of the pulses of the input sequences does not allow for the difference frequency of two pulse sequences close in frequency and pulsating with respect to each other. In this case, the ripple of the input frequencies leads to disruption of the order of alternating pulses, which leads to the alternate appearance of false results of the first or second sequences at the outputs of the first and second And elements, The purpose of the invention is to expand the functionality of the device, namely, the possibility of obtaining a difference frequencies of pulsating and close in frequency pulse sequences. The goal is achieved by the fact that the device for switching the difference frequency contains the first and second inverters, the first and second triggers, the outputs of which are connected to the first inputs of the first and second elements And, the second inputs of which are connected respectively to the first and second input buses and inputs, respectively the first and second inverters, the third And the fourth elements And, the third trigger and the third and fourth inverters, the input of the third inverter is connected to the first inputs of the first and third triggers, the output h the first inverter, with the first input of the second and second inputs of the third trigger, the first output of which is connected to the third input of the first and first inputs of the fourth element I and the second output - with the third input of the second and first inputs of the third elements And, the second inputs of the third and fourth elements And are connected with the first inputs of the first and second elements, respectively, whose outputs are connected respectively to the first and second output buses, the fourth input of the first - with the output of the second inverter and the second input of the first trigger, and h The fourth input of the second is with the output of the first inverter and the second input of the second trigger, and the outputs of the third and fourth elements of And are connected to the inputs of the third and fourth inverters, respectively. FIG. 1 shows a structural electrical circuit of the device; FIG. 2 - in (eemenny-I1y diagrams, which explain its operation. The device for differential frequency switching includes inverters 1–4, elements AND 5–8, triggers 9–11, input 12 and 13, and output 14 and 1.5 busbars: The device operates in the following way. In the initial state, at the outputs of the flip-flops 9 and 10 and at the second, the output of the flip-flop 11 has a logical O. Bus 12 and 13 receive an impulse sequence (Fig. 2 a, b). on the bus 12, at the time of its termination, sets logic 1 at the output of trigger 9 (Fig. 2, c). Similarly, Igugpu. On the bus 13, at the time of its termination, it sets 10 1 on the output of the trigger, which causes the appearance of O at the output of the inverter 4 and returns to the initial state of the trigger 10 (Fig. 2 g), and on the second output of the trigger 11 1 is set (FIG. 2 d) .. This causes O to output At the inverter 3, by which the flip-flops 9 and .11 return to the initial state. At the same time, O from the output of flip-flop 9 prohibits the next pulse from the bus 12 through the element 5 per bus 14. Thus, the alternation of pulses on tires 12 and 13 n It causes the appearance of spurious impulses on tires 14 and 15 (FIG. 2, section I).

In the case of coincidence in the phase of the pulses of both sequences (Fig. 2, section I), the possibility of passing a part of the pulse of any of the sequences is excluded by the fact that during occurrence 1 at the output of trigger 9 (or 10) to the fourth input of element 5 (or 6) comes an inverted pulse from the bus 13 (or 12), which prohibits the passage of a part of the pulse of one of the sequences.

If in the interval between two pulses on bus 12 a bus does not receive a pulse (Fig. 2, section I), then 1 at the output of the trigger 9, which is set after the first pulse on the bus 12 ends, will allow the passage of pulses of this sequence (except the first) through the element 5 to the bus 14 (Fig. 2 e).

In the case of the separation of the difference frequency pulsating and close

the frequency of the impulse afterpovgtelt p-tee (when the order is interleaved. li ..- pulses on the input buses are violated; the appearance of two additional pulses; -tire 13 with f 7 2. prpzo, git to ume, the outputs of the flip-flops 9, 10 g of the first output of the flashing light 11 are applied to O, and the second pulse of the sequence {does not pass the bus 15 (Fig. 2, section W). In addition, then the next two pulses on the tire 12 also do not lead to the pulse on bus 14, since after the end of the first pulse and on bus 12, the output of trigger 9 is stored.

five

Dialogically, the device works at -2. the difference frequency signal in this case is removed from Nina 15 (output of element 6.

Thus, the device provides enhanced functionality as compared with the prototype, namely: it allows the separation of the difference frequency to be close to the frequency of the input signals.

5 pulse sequences of frequency-modulated relative to each other.

Comparative tests of the proposed device and the known device have shown that it enables the separation of the difference frequency from 0.0039-260 Hz when the frequency of the second sequence changes from 500 to 760 Hz with a frequency deviation of 0.1%, while the prototype of the device provides a reliable allocation of the difference frequency within 4-260 Hz with the same input signals.

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Claims (1)

A device for allocating a difference frequency, containing the first and second inverters, the first and second triggers, the outputs of which are connected to the first inputs of the first and second elements And, the second inputs of which are connected respectively to the first and second input buses and inputs of the first and second inverters, different the fact that, in order to expand functionality, it introduced the third and fourth elements And, the third trigger and the third and fourth inverters, and the output of the third inverter is connected. ·· with ' the first inputs of the first and third triggers, the fourth inverter output is with the first input of the second and second input of the third trigger, the first output of which is connected to the third input of the first and first input of the fourth AND element, and the second output to the third input of the second and first input of the third elements And, the second inputs of the third and fourth elements. Are connected to the first inputs of the first and second elements, respectively, the outputs of which are connected respectively to the first and second output buses, the fourth u input of the first - with the output of the second ϊ .. _x inverter and the second input of the first trigger, and the fourth input of the second - j. with the output of the first inverter ^ and in the second input of the second trigger, with 1 outputs of the third and fourth elements And connected to the inputs of the third and fourth inventors, respectively.