SU972525A1 - Device for simulating receiver local oscillator irradiations - Google Patents

Description

The invention relates to electronic modeling in radio engineering and can be used to solve problems of analysis and synthesis of conditions for ensuring electromagnetic compatibility (EMC) of electronic equipment. ⁵ A mathematical model of the electromagnetic effect of useful and interfering signals (l] ^and ^ 2] on the radio is known. _{| 0} However, the use of a mathematical model using arithmetic electronic computers leads to lengthy and time-consuming operations for compiling and debugging calculation programs involving qualified specialists.

Closest to the invention is a device for simulating local oscillator emissions, comprising a control unit including a voltage to binary converter, a synchronizer, a start element and five delay elements connected in series, as well as a frequency modulation unit consisting of two code decoders, a trigger , groups of triggers, two groups of AND elements, an adder, an AND element, a group of registers and a register counter [3] The disadvantages of the known device include low modeling accuracy and limited Functionality: the device models only the frequency ratios of the radiation of the local oscillator.

The aim of the invention is to improve the accuracy of modeling and expand the functionality of the device by modeling the amplitude ratios of radiation.

This goal is achieved by the fact that in the device for simulating the radiation of the local oscillator of the receiver, containing a software unit consisting of a series-connected node in, yes, a voltage to binary converter, sequentially connected start buttons and five elements

E: 972525 delay, the control input of the voltage to binary converter is connected to the output of the trigger element, the output of the fourth delay element is also connected to the trigger input synchronously; a slider, which sets the input of which is connected to the output of the fifth delay element, and a frequency modulation unit, including two code decoders, a trigger, a group of triggers, a pulse counter-0 ow, an element And, two groups of elements And, an adder and a group of registers whose discharge outputs are respectively connected to the inputs of the adder, the outputs of which are connected to the first inputs of the elements And the first group, respectively, the second inputs of which are combined and connected to the output of the second delay element of the program block, the outputs of the elements And the first group 1 are connected to the zero inputs of the group triggers, the unit inputs of which are combined and connected to the installation input of the adder, the installation inputs of the group registers, the installation input of the register-counter, and the output of the fifth delay element of the program unit, the counting inputs of the group triggers are connected to the outputs of the elements of the second group accordingly, the first inputs of which are combined and connected to the output of the third delay element of the program unit and to the control input of the register-counter, the bit outputs of which are connected with the inputs of the first code decoder, the first output of which is connected to the zero input of the trigger, the single input of the trigger is connected to the output of the second code decoder, and the single output is connected to the first input of the AND element, the output of which is the first output of the device and connected to the information input of the register-counter, the individual outputs of the group triggers are connected to the inputs of the second code decoder, the zero output to the “th” group trigger (k = 2, ..., n) is connected to the second input of the (k-1) th element of the second group, the second input of the pgo element And the second one. groups and the second input of the And element are connected to the output of the synchronizer, the group of outputs of the voltage-to-binary converter is connected to the information inputs of the group registers, the information input of the register-counter, a reverse shift register, an operational DC amplifier and a group of digital-analogue converters are additionally introduced moreover, the bit inputs of the reversing shift register are connected to the output of the And element, the installation input is connected to the output of the fifth 5 delay element of the program block, in the irrational input is connected to the corresponding output of the voltage-to-binary converter, the reverse control input is connected to the second output of the first code decoder, and the bit outputs of the reverse shift register are connected to the information inputs of the digital-to-analog group converters, the control inputs of which are connected to the corresponding outputs of the voltage-to-binary converter code, and the installation inputs are combined and connected to the output of the fifth delay element of the program block, the outputs are digital-to-analog reobrazovateley combined and connected to the input of the operational DC amplifier whose output is the second output device.

The device has a reverse shift register, the outputs of which are connected to the first inputs of digital-to-analog converters, the output of each of which is connected to the input of an operational DC amplifier, the output of which is the second output of the device, the first and sixth outputs of the program unit being connected respectively to the second and third the inputs of digital-to-analog converters and the first and second inputs of a reversing shift register, to the other inputs of which the first and second outputs of the unit are connected go modeling.

The drawing shows a structural diagram of a device.

The device contains an operational amplifier 1 DC, digital | analogue converters 2, register 3 shifting reversible, block 4 frequency simulation, program block 5 ·

Block 4 of frequency modeling includes registers 6, adder 7> the first group of elements And 8, the second group of elements And 9, the group of flip-flops 10, the code decoder 11, the element 12, the count / chick 13 pulses, the code decoder 14, the trigger 15 · 'Software block 5 contains sequentially connected delay elements 16–20, input unit 21, voltage-to-binary converter 22, start-up element 23, and synchronizer 24.

The device operates as follows.

On the remote control of node & 21, numbers c · c * r 4 * 2 x>'lr> A r <2 and —r = · are dialed which mean · mm, respectively, the tuning frequency of the modeled radio receiver, its intermediate frequency, band and half the band of the local oscillator emissions. The numbers entered in block 22 are converted to a binary code and stored. The decoder 11 is constantly tuned to the code O, ..., 0. The decoder 14 is preliminarily ' _η A £ _а tuned to the codes of numbers 0 and ~~.

Then, an impulse signal is supplied from element 23, which passes through a chain of consecutive blocks 16-20. In this case, the specified operating mode of the program unit 5 is implemented. In accordance with the signal passing through the chain of blocks 16-20, the signals of Set, U-1, U-2, U ~ 3, SI and Reset sequentially arrive at the outputs of the program block 5.

On the Installation command, the code of the number Δί <2_ is transmitted to the cells of the register-counter 13. For the same. ¹ team in the register.

lax ~ k'number of codes of numbers

I + 1 _pr or -f _np depending on the design of the simulated radio receiver.

. Simultaneously, block-scale quantities are entered into the blocks' 2, in the zero bit> of the shift register 3, 1 is written.

After executing the Installation command from the program unit 5, the U-1 command is sent to the adder 7 of the frequency modeling unit 4, by which the hour is calculated in the adder 7, TOTES

H ^f np 2

After the delay time interval necessary for performing the calculation operation, command U-2 is sent from block 5, according to which the calculated value fj in binary code ^{50 is} written in trigger cells 10.

Then, from the program block 5 to block 4 the command U-3 "register-counter 13 and triggers 10 are connected according to the scheme of the counter counter. With the inclusion of the synchronizer 24, the process of modeling the radiation of the local oscillator begins. Clock pulses are fed to is .45

972525 6 counter subtraction formed by the elements And 9 and triggers 10.

After passing the clock from the triggers 10, a signal is transmitted; code 0, .., 0 to the decoder 11, which generates a signal that translates the trigger 15 in the state when the element And 12g opens.

Therefore, after the expiration of the I shaft of time corresponding to the denomination of the number of fj clock pulses from the fifth output of the program unit, the pulse signals begin to flow through the open element And 12 to the first ί output of the device and to the inputs of the shift register 3. Using the signals arriving at the first output, the frequency components of the local oscillator radiation. The pulses supplied ί to the inputs of register 3, perform the function of the bias. As a result, code 1, recorded initially in the zero bit of register 3, is transmitted sequentially from the least significant to the most significant bits. In accordance with the passage of 'code 1, starting from the first discharge, digital-to-analog converters (DAC) 2 are turned on. The scale of the converter of the reference voltage of the DAC 2 is determined by the magnitude of the radiation amplitude of the modeled local oscillator. The currents from the outputs of two DACs are included are summed in the operational amplifier 1 and fed ^- to the output 2 of the device.

The shift of the code from the least significant to the most significant bits of register 3 continues during the sequence of the number of - ^ - '' pulses, starting from the nth. At the time of receipt of Iflf- ...

- ^ - = - of the 1st pulse from the decoder 1h, the reverse signal 3 receives the reverse signal, thanks to which the code 1 starts to move 'from the highest to the least significant bits of the register 3. In accordance with the progress of the code 1, the DAC 2 is disconnected during the interval of the second burst of pulses . Thus, the total current supplied to the output 2 of the device, first gradually increases, and then decreases, which corresponds to the change. the envelope of the local oscillator radiation. The passage δ ^ ~ ^{γο of the} pulse counted from the moment of the opening of the key element And 12 causes the formation of the code 0, .., 0 in the register counter 13. At the same time, a signal is generated in the code decoder 14, which is interim5, it is 7 972525 8 using the trigger 15 closes the element And 12. This completes the cycle of modeling the frequency-energy characteristics of the radiation of the local oscillator.

At the end of the simulation cycle j From the program block 5, the Reset command is issued and the device returns to its initial state.

Thanks to the introduction of new elements and connections, the accuracy of modeling is increased in the device and the functionality is expanded in comparison with the known devices.

The device for modeling the radiation of the local oscillator of the regional 1S radio receiver offers certain advantages over the well-known one, since it allows you to simulate both the frequency and amplitude characteristics of the local oscillator radiation. 20

The invention can find application in the creation and improvement of models of the receiver and transmitter, in the development of machines for the operational frequency distribution of radio-electronic 2S means that exclude mutual software. bellows between them, as well as when creating devices for analyzing the conditions of EMC RES.

The positive effect obtained from the application of the invention lies in the fact that it is possible to create and improve various types of modeling devices that provide input of the initial data, an accelerated process of modeling the conditions of _J5 EMC and excluding operations for the compilation and debugging of calculation programs requiring the involvement of qualified specialists. The effectiveness of modeling devices increases due to the fact that, at a small additional hardware cost, modeling accuracy increases, the range of tasks and the scope of modeling devices expand significantly.

Claims (3)

1. Mathematical modeling of the electromagnetic effect on the radio receiver of useful and interfering signals. -Radio electronics abroad. Mutual interference and electromagnetic compatibility of radioapparctures. Issue 21-22, NIIEIR, M., 1966, p. H1. 2. Mathematical modeling electromagnetic interference and unintentional interference.-M. , Soviet Radio, 1977 t. 1, p. 68 3. USSR author's certificate №, cl. G 06 G, 1977 (prototype). electromagnetic effect. Elek