SU966700A1 - Device for counting binary unity number - Google Patents

Description

(5) DEVICE FOR COUNTING NUMBER OF BINARY

The device relates to automation and computing and can be used to control binary numbers modulo 3 C-) Devices for determining the number of units in binary numbers are known, containing counters, triggers, logic elements lj. Their disadvantage is the low speed and the impossibility of calculating the number of units modulo 3. The closest to the present invention is a parallel counting device of the number of units in the binary number, containing a register of half summators, logic elements. The outputs of the bits of the original number are connected to the inputs of the half adders of the 1st cascade, the outputs of the half adders of 1 cascade are connected to the inputs of the half adders of the second, etc. 2. They have the disadvantage of not being able to count the units of a binary number modulo 3 or 2. The purpose of the invention is to expand the functionality of the device with. account allowing for modulo-three or two counting. The goal is achieved by the fact that a device for counting the number of binary units containing groups of single-digit adders, each (l + 3k), (2 + 3k), (3 + 3k) bits of the binary number are connected respectively to the transfer input, the first and the second operands of the k-ro adder of the first group, where k varies from zero to Vi-l | 3, n is the number of binary bits of the binary number, groups of two-digit adders are entered, the number of groups of which is equal to the number of groups of single-digit adders, and their number in each group is equal to the number of odds 9 mators of the previous group of adders and a group of elements I, the number of which and the number of elements of the Ivgroup coincide with the number of one-digit adders of the corresponding group, the control input of the device connected to the first inputs of the elements AND of all groups, the output of the sum and the transfer of each one-digit adder all | Groups connected respectively to the input of the first bit of the first operand and the input of the first bit of the second operand of the corresponding two-bit adder of the corresponding group, the output of the wasp each odnorazr summa--stand. The torus of all groups is connected to the input of the second bit of the first operand of the corresponding two-bit adder of the corresponding group and with the second input of the corresponding element AND of the corresponding group, the output of each element M in the whole group is connected to the transfer input of the corresponding two-bit adder of the corresponding group, the outputs of the first and the second bits of each odd two-bit adder of the i-th group are connected respectively to the carry inputs and the first operand of the corresponding single-bit adder a ((+ T) group, the outputs of the sums of the first and second bits of each even two-bit adder of the ith group are connected, respectively, to the input of the second operand of the corresponding one-bit adders (| H-1) -th and (1+ 2) -and groups, the output of the sum and transfer of the one-digit adder of the last group are the outputs of the device. The drawing shows the functionality of the device circuit., The device contains one-digit adders 1 of the first group, two-bit Hbie adders 2 of the first group of two-digit adders, single-bit adders / 3 second group ppa, dvuhrazmatmator 1

Inputs

Outputs A1 B1 S1 P O O

.0 o

one

1 o

About 1

 Adder 2

Inputs

P A1 B1 A2 B2 S1 5.2

000000О

Claims (2)

010-0 01 О 010001 О 0 common adders - the second group, one-digit adders 5 of the third group, two-digit adders 6 of the third group, one-bit adders 7 of the fourth group, two-digit adders of the fourth group, one-digit adder of the 9th group , groups of elements And 10. Inputs A1, B1, L2, B2, S1, 52 and P, respectively, mean B) one of the first bit of the first operand, the input of the first bit of the second operand, the input of the second bit of the first operand, the input of the second the bit of the second operand, the first bit of the sum, the second bit of the sum and the carry. The inputs A1, B1, P of adders 1 are connected to the output bits of the original number. Outputs S1 of adders 1 are connected to inputs A 1 of adders 2. Outputs P of adders 1 are connected to inputs 81 and A1 of adders 2. Outputs S1 and S2 of adders 2 are connected to inputs P, A1, B1 of adders 3, as well as adders 5, etc. . The outputs of the last two adders are connected to the inputs of the adder 9. The control inputs of the device are connected to the first inputs of all elements And 10. On the second inputs of all elements And 10 connected outputs transfers adders 1,3 ... The device works as follows. In the mode of counting the number of units modulo 3, a zero control signal is applied to the control input of the device. At the outputs of each of the adders 1, binary codes are formed (with weights S1, P - 2) of the number of units contained in three-bit groups into which the initial number is divided and which are connected to the inputs of the adders 1. At the inputs S1, S2 of each of the adders 2 ( As can be seen from the diagram}, the following signals are generated depending on the signals at the inputs. Adder 1 Outputs 01 O 1 1 1 O O 1 Thus, at the outputs S1 and S2. Of each of the adders 2, the number of units is equal to the sum modulo three numbers of units at the inputs of the corresponding adder 1, i.e. O, 1 or 2, (the weights of the outputs S1 and S2 are equal 1). The outputs S1, S2 of adders 2, grouped in three, are connected to the inputs of adders 3, Outputs 51, P of adders 3 are connected similarly to adders 1 to the inputs of adders 4. Therefore, at outputs S1 and S of each of adders k the number of units is equal to the sum modulo 3 the number of units at the inputs of the corresponding adder 3 (the weights of the outputs are equal to 1.) Thus, at the inputs S1, S2 of the last cascade adders, the number of units is also equal to the modulo 3 units contained in all bits Totalizer 1 Outputs Inputs P A1 B1 S1 P 000 00-1 1 1 1 1 1 Thus, at the outputs S1 and S2 for each of the adders 2, the number of units is equal to the sum modulo two numbers at the inputs of the corresponding adder 1, i.e. O, 1 or 2 (weights S1 and 52 are 1). Adder 2 InputsExits 001 1 01 1 O 1 O O 10 1 O 00 1 1 O 1 T 00 1 101 1 0111 00 O of the source binary number. These outputs are connected to the inputs of the adder 9. At its outputs S and P, a binary code of the said sum is formed. In the counting mode of the number of units modulo two, a single control signal is applied to the AND 10 elements. At the outputs S1, P of each of the adders 1, a binary code is formed (with weights S1 - 1, P - 2) of the number of units contained in three-bit groups into which the initial number is divided and which are connected to the inputs of the adders 1. At the outputs S1, S2 Each of the adders 2 generates the following signals depending on the input signals (the transfer signal of the adders 1 passes through the AND 10 elements without change). Adder 2 Inputs Outputs Р A1 A1 B2 A2 S1 S2 0000000 010-00 1 О 1011000 1011000 1 1 i; one . 010 Outputs 51 and 52 of the coolers 2, grouped in three, are connected to the inputs of adders 3, outputs 51, and P of the summers 3 are connected in the same way as the accumulators 1 to the inputs of accumulators C. I9 Therefore, at the outputs SI and S2 of each of the adders k, the number of units is equal to module two numbers of units at the inputs of the corresponding adder 3 (, the weights of the outputs are 1). Consequently, at the outputs S1,52 of the adders of the last groups, the number of units also equals the sum modulo two units contained in all bits. dah is the source binary number. These outputs are connected to the inputs of the adder 9. At its output S, a double signal of the said sum is formed. This device forms; code modulo three (two) numbers contained in the original binary number, i.e. its functionality is higher. In this case, unlike the known serial modulo three units of account counting (counters, distributors, the device is much faster. In addition, the parallel counting device is more reliable and robust compared to serial counting devices. Inventory counting device the numbers of binary units containing groups of single-digit adders, each (1 + 3k) -, (2i-3k) -, (3 + 3k) -e bits of the binary number being connected respectively to the transfer input of the first and second operand the k-ro adder of the first group, where k varies from zero to), n is the number of binary digits of the binary number, differently from the fact that, in order to expand the functional capabilities of the device by providing the possibility of counting the number-units modulo , the device introduced groups of two-digit adders, the number of groups of which is equal to the number of groups of one-digit adders, and, 8 0 their number in each group is equal to the number of one-digit adders of the previous group and the group of elements And, the number of K9th and the number of elements In the group coincides with i the number of one-digit adders of the corresponding group, with the device control input connected to the first inputs of the AND elements of all groups, the output of the sum and transfer of each one-time adder of all groups is connected respectively to the input of the first bit of the first operand and the input of the first digit the bit of the second operand of the corresponding two-bit adder of the corresponding group, the transfer output of each one-bit adder of all groups is connected to the input. the house of the second bit of the first operand of the corresponding two-bit adder of the corresponding group and with the second input of the corresponding element AND of the corresponding group, the output of each element And of all groups is connected to the transfer input of the corresponding two-bit adder correspondingly; of the first and second digits of each fuzzy two-bit adder of the 1st group are connected respectively to the carry inputs and the first operand of the corresponding single-bit adder (+1) -th group, the outputs of the first and second digits of each even two-bit the accumulator of the 1st group are connected respectively to the input of the second operand of the corresponding one-bit adders of the () -th and (1 + 2) -th groups, the output of the sum and transfer of the one-bit accumulator of the last group are the outputs of the device. Sources of information taken into account during the examination 1. USSR author's certificate No. 716041, cl. G About F 11/00, 1980. 2. USSR author's certificate number 726526, cl. G About F 5/02 1E80 (prototype).