SU966690A1 - Device for discriminating extremum from nm-digital binary codes - Google Patents

Description

The invention relates to automata, computer and computing equipment and can be used in the implementation of digital automation technology, as well as for converting and encoding information in facsimile technology. ..

A device for comparing P numbers is known, containing n - analysis nodes, AND, OR, NOT, Pfci tl trigger elements.

A disadvantage of this device is the necessity of shifting binary numbers in ring registers, which excludes the possibility of parallel use of register information for arithmetic and logic over numbers. The use of colorad shift registers also removes the reliability of devices. And its capabilities.

The closest to the present invention is a device for extracting extremal binary numbers n, t-bit, containing a matrix of cells, each of which contains AND, OR, prohibition elements, the first input of the AND element connected to the first input of the cell, and the output with the first input element OR, output

which is connected with the first output cell and the second input of the next cell of the given line, the third inputs of the cells are connected to the bus of the corresponding bit, which is connected to the first inputs of the elements And the numbers are picked up, the second input of which is connected to the prohibition element It is connected to the fourth input of the cell, and the output is connected to the second output of the cell, the second input of the AND element is connected to the third input of the cell, and the second input of the OR element is connected to the control input of the prohibition element and the second input of the cell contains a delay element and in each row - a NOT element, a prohibition element, an OR element and a trigger, in each column - a multiple input

20 element OR, the output of which is connected to the removal bar of the corresponding bit 2 3.

The disadvantage of this device is its complexity.

25

The purpose of the invention is to simplify the device by reducing the number of connections and the number of elements used.

The goal is achieved by

Claims (2)

30 that a device for extracting the extremum of n m-ra.d binary numbers, contains t-bit registers and groups of elements AND, t-input elements OR, triggers, and the output of registers is bitwise connected to the first one The inputs of the elements AND corresponding to the group, the outputs of which are connected to the inputs of the corresponding m-Bxd output element OR, the installation inputs of the flip-flops in the unit are connected to the reset input of the device, contains the element EXCLUSIVE OR, the second inputs of the same elements AND all groups with Dineny with the corresponding control buses in comparison with the device, the third inputs of the elements AND of each group are connected to the outputs of the corresponding triggers and the outputs of the code of the register number containing the extreme number of the device, the outputs of the n-input elements OR are connected to the first inputs of the corresponding elements of the EXCLUSIVE OR and with the corresponding inputs of the p-input element OR, the output of which is connected to the second inputs of the elements EXCLUSIVE OR, and is the output of the code of the extremal number of the device, you the moves of the elements EXCLUSIVE OR are connected to the zero inputs of the corresponding triggers. The drawing shows the scheme of the proposed device. It contains n m-bit registers 1 in which the direct t-bit codes are written (for the case of extracting the maximum number) of the compared binary numbers, a. . . a, t).) The first bit of these numbers is the highest. The device contains a group of three-input elements AND 2, TP-input elements OR 3, elements EXCLUSIVE OR 4, triggers 5, p-input element OR b, bus 7 control by bitwise comparison of the device. DEVICE works as follows. In the absence of control sitals on tires 7, and therefore on one of the inputs of the elements And 2, has a voltage level corresponding to logical 6. Therefore, the outputs of the elements And 2, OR 3 and OR 6 also have O. Accordingly, at the outputs of the elements. EXCLUSIVE OR 4 level of logic O. At the same time, trigger 5 does not change its state (switching of triggers 5 occurs when a voltage corresponding to logical 1 appears at its installation input). Before starting the comparison with the installation pulse from the control bus, the triggers 5 are set in position. 1, open all the elements. And 2 at the third entrance. ; In case of sequential control signals on Izhnakh 7, the voltage level of which corresponds to logical 1, a serial bitwise analysis of the investigated numbers occurs, starting with the highest bit. In the case of unequal numbers in the analyzed bits, the installation takes place: in the O triggers there are 5 registers that have O in this category; Let the values of the most significant digits of all numbers be equal. In this case, when the appearance on the first bus is 7, the set-up. equalizing signal at the outputs of the elements And 2 higher bits, at the outputs of the elements OR 3 and OR b. appears 1. Since both inputs of the EXCLUSIVE OR elements are provided with the levels corresponding to level 1, the outputs of the EXCLUSIVE OR elements; 4 - level, corresponding to O: triggers 5 do not change their state. In case the values of the most significant bits of all numbers are equal to O, the state of the trigger also; does not change, since when a control signal appears on the first bus 7, at the outputs of the elements AND 2, OR 3, or 6 it is appropriately at both inputs of the EXCLUSIVE OR 4 levels O, and at their outputs O, which are not the states of the flip-flops change. 5. If the inequality is higher in the higher-order number, then when the control signal arrives on the first bus. 7, coincidence 1 occurs at the inputs of the And 2 elements, connected to the direct outputs of those registers in which cTabits 1 is written. Therefore, at the output of these elements. And 2, at the output of the corresponding elements OR 3 and at the output of the element OR b, 1 appears, which is fed to the second inputs of the EXCLUSIVE OR 4 elements of all the registers. Wherein . At the output of any element EXCLUSIVE OR 4, a signal 1 is produced, which resets the corresponding trigger 5, if the first input of the EXCLUSIVE OR element from the corresponding element OR 3 is O. (Switching of the triggers 5 occurs when voltage appears on its installation input corresponding to logical 1). According to the above algorithm, all other bits are analyzed as the control signals appear on the subsequent buses 7. As a result, only those triggers 5 that correspond to the registers with the maximum number are left unset, and the sequential element appears on the output element OR 6 code of this number. If it is required to select the minimum number of the investigated numbers, then the registers record the inverse value of the codes of the investigated numbers. Then the code of the number allocated from the set of inverse values of the codes of the studied numbers is the inverse value of the code of the minimum studied number. When using this technical solution decreases to; The quality of the elements used is reduced and the number of connections between them is reduced. ; The invention The device of the day of the selection of extremum from n t-bit binary numbers, containing n t-bit registers and groups of elements And, t-entry elements OR, triggers, the outputs of registers are bitwise connected to the first inputs of the elements And the corresponding group, outputs which are connected to the inputs of the corresponding t-input element OR, the installation inputs of the flip-flops into the unit with the device reset input, which means that, in order to reduce equipment costs, the device contains the elements EXCLUSIVE E OR, p-entry element OR / and the second inputs of the elements of the same name AND of all groups are connected to the corresponding control points. By comparison of the device, the third inputs of the AND elements of each group are connected to the outputs of the corresponding triggers and the outputs of the leg code; a measure of the register containing the extreme number of the device; the outputs of the t-input elements OR are connected to the first inputs of the corresponding elements EXCLUSIVE OR and the corresponding inputs of the n-input the OR element whose output is connected to the second inputs of the EXCLUSIVE OR elements and is the output of the device’s extreme number code, the outputs of the EXCLUSIVE elements or. are connected to zero The inputs of the respective triggers. Sources of information / taken into account in the examination. 1. The author's certificate of the USSR 620976, kl.S About F 7/02, 1977. 2. USSR author's certificate №526888. cl. G 06 F 7/06, 1978 (prototype). c51 c51   codecode code & zucm / ja