SU955441A1 - Transistor direct frequency converter control method - Google Patents

Description

The invention relates to a converter technique and can be used in the construction of direct frequency inverters, for example, for frequency-controlled electric drives or for autonomous power supply systems.

Methods are known for joint and separate control of converter keys comprising counter-connected valves 13 and

2 .:.

in the first case, control pulses are simultaneously supplied to two valves in opposite groups, in the second, separately, depending on information from the current sensor (DT).

In case of joint control in the inverter, at the moments of switching the keys, due to the end time of switching the valves on and off, an overlap of keys is observed and through-currents flow through them. This deficiency is most pronounced in the ac transistor switches. Through currents degrade energy. The transducer readings result in reduced reliability.

The closest in technical essence to the proposed is

a separate control method, in which the direction of the load current is measured using a current sensor, generates a enable signal for switching on the transistor group of one current direction and a signal to ban the switching on of the transistor group for another current direction, which eliminates the simultaneous operation of both transistor

10 groups 2.

However, the use of separate control in frequency converters also has significant drawbacks associated with the presence of the dead zone of the DT. In the absence of information about the load current in the dead zone, separate control can be performed in two ways. When entering the dead zone, you can

20 remove control pulses from a working group of transistors and apply to the opposite group. In this case there is a gap in the load current and a pause. The second option: from the moment of entry

25, the removal of control pulses from the transistors of the working group and the supply of pulses to the opposite group can be delayed into the dead zone. In this case takes place

There is 30 iestoka pause, but the current gap is absent only for a certain current value, if the delay is unregulated, or for all current values, if the pause is adjustable, depends on the load current. In the latter case, the circuit is complicated, and the pause in the current curve is significant. The presence of pauses degrades the quality of the output current of the converter. The purpose of the invention is to improve the quality of the output current by eliminating pauses between half-waves of current. The goal is achieved by using the control method of a transistor direct frequency converter, which consists in measuring the direction and instantaneous value of the current, using a current sensor having a dead zone, generating transistor control pulses of the converter groups and at a current greater than the dead zone current sensor, these ig / control pulses alternately with the output voltage frequency are supplied to the transistors of one of the groups providing flow t If the load current is of the corresponding direction, at a load current less than the current zone of the current sensor insensitivity, control pulses feed both their groups to the transistors simultaneously. This method can be implemented in the NFC with a cyclic algorithm of operation of the keys, if the latter consist of two anti-series-connected transistors with a diode connected in parallel with each of them, and the control pulses go to the transistor bases separately. Fig. Yes shows the frequency converter circuit; in fig. 1b is a diagram of a transistor switch in FIG. 2 is a control system diagram; FIG. 3epures of control pulses by an extractor in FIG. 4 is a diagram of a single phase converter; in fig. 5 - timing diagrams of the formation of output voltages and TOKadl gJ, AV UCA have line voltage). The device holds AC transistor switches 1, a load resistance 2, a current direction sensor 3, a prohibition unit 4, a current 5 current circuit 5, a block; b forging pulses, generator 7, prohibition block 8, A, B, C - input pins. Consider the example of the transistor NFC implementation of the proposed method. Such a frequency converter is made in the form of three bridge circuits on the above keys (Fig. 1). Load 2 is connected to the output pins of each bridge. Current sensors 3 are connected to the load in each phase, which provide information about the direction of the load current. The control system consists of a master oscillator 7, the output of which is connected to the input of the control pulse forming unit b. The outputs of block 6 are connected to one of the Inputs of circuits 2 And, which form a block of 8 prohibitions. The second inputs of the circuit 2 And the signals from the block 4 of the formation of prohibitions. In turn, block 4 consists of a trigger, two circuits 2 Н-ЕЕ and circuit 5 zero current. The inputs 4 are connected to the outputs of the current direction sensor 3. The principle of operation of the device that implements the control method is as follows. The master oscillator 7 generates sawtooth signals 9 (FIG. 3), which are compared with an adjustable DC voltage level, as a result of which pulses 10 are generated, the duration of which determines the amount of pause in the output voltage of the frequency converter. The pulses 10 are fed to the input of the block 6, in which the pulse sequences 11 are formed. Consider the phase A of the converter as an example. Signals about current 1d and Td from current sensor 3 are fed to the RS-flip-flop inputs (Fig. 2). Suppose that at the output of current sensor 3 a 1d O signal (one of the transistors conducts current) and a 1d 1 signal (the opposite group of other transistors does not conduct current). In this case, the potentials 1 (output) and O (output) are set at the output of the toigger. At the output of block 5, a potential 1 is established. Therefore, according to the circuit (Fig. 2), the pulses 12 are sent to the transistors of the converter, and the pulses 13 are prohibited. If the signal is 1d 1, the signal is Td O, then pulses 13 are transmitted, and pulses 12 are inhibited. Thus, the path for the flow of through current is eliminated. If signals 1d, which takes place in the dead zone of the current sensor, either when the converter is first turned on, or at the moments of current change, thanks to the 5 current zero circuit, at which the potential O is set, pulses 12 and 13 are allowed to pass simultaneously. But, since the load current is almost zero at the same time, the switching of the transistors occurs much faster and the overlap time, and hence the duration of the pulses of the through-current current, is significantly reduced, i.e. transistor operation modes become safer and power converter performance is improved.

These three modes of operation of the converter for two directions of the load current and the work in the dead zone of the current sensor are illustrated by the plots of control pulses in FIG. 3

Thus, the combined control method is implemented in the converter: separate control outside the dead band of the current sensor and joint control within the dead band. As a result, by eliminating pauses, the shape of the output current is improved, and by limiting the through currents, the energy performance of the converter is also improved.

Additionally, to illustrate the essence of the method, we consider the case of relation-impulse regulation pu (voltage converter output voltage converter in Fig. 1, using the diagrams in Fig. 5, on the current curve intervals (i) tQ - t; t - tj, t - t. Pulses control is supplied to one of the transistors of the AC key, which participates in the formation of a positive or negative half-wave current. Thus, separate control of groups of transistors is realized. At the same time, as can be seen from Fig. 4, the path for squids is completely eliminated x currents in the switchable and energized transistor circuit, which are caused by the finite switching time of the transistors. If at the canceled intervals control pulses are simultaneously applied to both transistors of the key, i.e., to use joint control of the transistor groups, then the path for the flow of through current is shown by the dotted line in Fig. 4. Its value depends on the circuit of controlling the base current of the transistors, the presence of inductances, etc., but excluding the through currents with the joint control method possible. On interval1X curve of current tx, - tj -. tg- t, T.e, in the dead zone of the load current sensor when changing polarity

current, in order to maintain the continuity of the current curve by means of a simple control system, the control is implemented jointly: the control pulses are applied to both transistors in the AC switches simultaneously. Through the indicated intervals, through currents are possible, but since the collector current of the transistors is close to zero, then the through currents can be practically excluded by controlling their base current.

Thus, the beneficial effect of the invention is to significantly reduce the through currents in the NFC in the absence of pauses in the current curve.

Claims (2)

1.Kartashov R.P. et al. Thyristor frequency converters with artificial switching, Kiev, Technika, 1979. 2.Rutmanis LA et al. Ways of controlling direct-connected frequency converters and artificial switching. Riga, Knowledge, 1976. ABC TO L5 -frt L I fie A 8 C