SU1415383A1 - Device for controlling m-phase thyristor bridge-type inverter - Google Patents

Abstract

The invention relates to electrical engineering and can be used in autonomous inverters. The purpose of the invention is to increase the stability of the work and enhance the functionality. The device contains a master oscillator 1 connected through a distributor-former 2 to / 2m to identical control channels. The device carries out an unambiguous regulation of the order in which control pulses arrive at the control electrodes of the thyristors. Expansion of functionality is accomplished by providing adjustment of the duration of the reference pulses and, accordingly, adjusting the output voltage. 3 cl. with S (L

Description

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The invention relates to electrical engineering, namely to converter equipment, and can be used in control systems for autonomous thyristor inverters operating as part of an adjustable AC drive.

The purpose of the invention is to increase the stability of the thyristor inverter in dynamic modes and enhance functionality by introducing a start mode.

Fig. 1 shows a circuit diagram of a device for controlling a three-phase thyristor inverter; Fig. 2 shows timing diagrams explaining the principle of operation of the device; FIG. 3 is a circuit diagram of a thyristor inverter.

A device for controlling a three-phase thyristor inverter (FIG. 1) contains a master oscillator 1 connected to a distributor-former of 2 pulses with 2t outputs per 2t of identical control channels, which contain an IZ element, a power amplifier 4, the output 5 of which is intended to be connected to a control the main inverter thyristor electrode, common to all control channels; 6 filling pulse generator, connected by its output to the first inputs of the IZ elements, each control channel, which also include oh 7, third 8 and fourth 9 elements And, the first 10 and second 11 RS-triggers binary counter 12, first 13, second 14, third 15 and fourth 16 AND-NOT elements and the second power amplifier 17, the output 18 of which is intended to be connected to the control electrode of the switching thyristor of the inverter. In this case, the first inputs of the element And 7 of each channel are combined and designed to connect the starting block, and the second are connected simultaneously with the output of the distributor-former 2 pulses with the R input of the first 10 and S input of the second 11 RS flip-flops, as well as the first the input element 8, the second input of which is connected to the output of the RS-flip-flop 10, and the output from the input of the second power amplifier 17, the counting and installation inputs of the binary counter 12 are connected respectively to the outputs

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elements 3 and 7, and the first and fourth outputs are connected to the inputs of the element 13, the second and third to the inputs of the element 14, the output of which is connected to the R input of the RS flip-flop 11, and also to the combined inputs of the element 15 connected to one of the inputs element 16, the second input of which is connected to the fourth output of the binary counter 12, and the output is connected to the second input of element 3 and to the first input of the element 9, the second input of which is connected to the output of the RS flip-flop 11, and the output connected to the input of the first power amplifier 4, S-input RS-flip-flop 10 is connected to the output of the Enta 1 H-o

In addition, the following time dependences are shown (Fig2): 19 is a diagram of a reference control signal coming from one of the outputs of the distributor-former 2; 20 - signal from the output of the starting block; 21 - diagrams of the signal at the output of element 7; 22-25 are diagrams of signals formed at the first second, third and fourth outputs of binary counter 12, respectively; 2629- diagrams of signals at the outputs of elements 13-16, respectively;

30 is the signal at the output of element 3;

31 and 32 are diagrams of signals at the outputs of RS flip-flops 10 and 11, respectively; 33 and 34 are diagrams of control signals for the switching and main thyristors of the inverter generated at the outputs of the power amplifiers 17 and 4.

The inverter (FIG. 3) contains the main thyristors 35 and 36 of the inverter phase and the switching thyristors 37 and 38 of the inverter phase, the reverse current valves 39 and 40, the switching inverters of the inverter phase 41 and 42, the inverter switching throttle 43, output terminals 44 46 thyristor inverter, designed to connect the load.

The device for controlling the g-phase bridge thyristor inverter operates as follows.

The master oscillator 1 generates a sequence of voltage pulses whose frequency corresponds to the required frequency of the power voltage at the output and) of the inverter, and supplies it to the input of the distributor-former 2, which forms and distributes

Each 2m-channel limits the rectangular sequences of the reference signals 19 (Fig. 2) in accordance with a predetermined algorithm for the inverter output voltage. The number of channels of the control device corresponds to the number of the main thyristors of the inverter. For the bridge three-phase inverter (FH) the number of channels in the control device must equal to six. Moreover, the reference signals designed to control the thyristors of one phase are two sequences of antiphase pulses. The shift angle between identical pulses of the reference signals: the individual phases is 2 / l / m, where m is the number of phases of the inverter

In addition to the reference control signal 19 from the output of the generator 6 of the filling pulses, the square-channel control channel receives square clock pulses. When a stepped signal 20 (FIG. 2) is applied by the trigger unit, a rectangular voltage 21 is formed at the output of the element 7, which is fed to the R input of the binary counter 12, which is the command signal to start counting the pulses of the generator 6 by the counter 12 on the first, the second third and fourth outputs of which form rectangular sequences of Sh-Shul 22 ± 25, respectively. Signals 22 and 25 from the first and fourth outputs of binary counter 12 arrive at the inputs of element 13, from whose output signal 26 goes to the S input of the first RS- trig Ore 10, a signal 31 of a 1 unit signal appears at its output. This signal is added to the control reference signal 19 of the element 8, from the output of which the voltage in the form of a square pulse 33 is fed to the input of the second power amplifier 17, where it is amplified to the required level is then applied to controllers. switching thyristor 38 electrode. Signals 23 and 24 from the second and third outputs of binary counter 12 are fed to the inputs of element 14, from whose output the voltage is in the form of a signal 27 nocTvnaeT to the R input of the second RS flip-flop 11 and to the combined inputs of the 15 "B element resulting in the output of the second RS flip-flop 11, a signal appears 32 32

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as a logical unit, and the signal 28 from the output of element 15 is fed to the input of element 16, to another input of which comes the signal from the fourth output of binary counter 12, as a result of which the output of element 16 is formed by a rectangular impulse 29 arriving simultaneously to the inputs elements 3 and 9. When the H 3 input signal appears at the input of the logic zero, the flow of the generator 6 pulses to the C input of the binary counter 12 stops and the signals at its outputs remain unchanged until the end of the reference pulse. As a result of the logical summation of signals 29 and 32, arriving at the input of element 9, a signal 34 is fed at its output and fed to the input of the first power amplifier 4, where it is amplified to the required level and fed to the control electrode of the main thyristor 35 of the first phase of the inverter ( FIG. 3).

Thus, at the outputs 5 and 18 of each channel of the three-phase thyristor inverter control device, two interconnected sequences and functions for controlling the main and coder fyt inverter thyristors, are formed. The intensity of which, as well as the shift of these pulses relative to each other, are determined by the actual parameters of the switching circuits of the inverter and the recovery time of the triggering properties of the main T1 sensors and can be adjusted by changing the frequency of the filling pulses of the generator 6

A device for a rectified T-phase bridge T1 {inverter allows to significantly increase the stability of the thyristor bridge voltage inverter by unambiguously regulating the order of receipt of control pulses on the control electrodes of the switching and main thyristors of the inverter with the link of their parameters with dynamic properties of both the thyristors themselves and the switching circuits of the inverter

Expansion of the functionality of the proposed device for controlling a three-phase thyristor inverter is achieved by providing adjustment of the duration of the reference pulses and, COO correspondingly, adjusting the output voltage of the thyristor inverter. In addition, the stability of the formation of control pulses, regardless of the mode of operation of the converter, allows the use of the proposed device for controlling the dynamic modes of a controlled electric drive.

The proposed solution can be used in frequency-controlled frequency converters not only with a predetermined valve switching algorithm.

inverter, but also in the most promising converters that implement frequency-current control with the formation of a sinusoidal load current.

Claims (1)

Invention Formula A device for controlling a t-phase bridge thyristor inverter containing a master oscillator coupled to a pulse driver distributor with 2m-outputs, 2 tons of identical control channels, each of which contains an I element, a power amplifier whose output is intended for connection to the control electrode of the corresponding main thyristor of the inverter, common for all control channels, a generator of full pulses, connected by an output to the first inputs of the elements AND of each control channel, I’m saying EEC in that, with the aim of increasing the stability of operation of the inverter in thyristor dynamic scanning modes and expansion capability by introducing the start mode, each channel further the second, third and fourth elements are introduced, the first and the second RS-triggers, the binary counter, the first, second, third and fourth elements and the second power amplifier, the output of which is intended to be connected to the control electrode of the switching thyristor, anti-phase specified main, while the first inputs of the second elements AND of each channel are combined and designed to connect the starting block, and the second are connected simultaneously with the corresponding output of the pulse distributor, with the R input of the first and the S-input of the second RS-flip-flops, respectively, as well as with the first input of the third element And, the second input of which is connected to the output of the first RS-flip-flop, and the output to the input of the second power amplifier, the counting and installation inputs of the binary counter are connected respectively to the outputs of the first And the second element is And, and the first and fourth outputs are connected to the inputs of the first AND-NOT element, and the second and third - to the inputs of the second AND-NOT element, the output of which is connected to the R input of the second RS flip-flop, as well as to the combined inputs of the third element n and n E connected to the first input of the fourth element AND-NOT, the second input of which is connected to the fourth output of the binary counter, and the output connected to the second input of the first element And to the first input of the fourth element And, the second input of which is connected to the output of the second RS-trigger, and the output is connected to the input of the first power amplifier, S - the input of the first RS-flip-flop is connected to the output of the first NAND element 21 23 ppppp ppp 2 about 25 27 28 29 P 32 JJ J " I I sapp P g 1 p FIG. 2 .JL