SU1636970A1 - Method of starting up a self-contained current inverter for uninterrupted-supply generating sets - Google Patents

Abstract

This invention relates to electrical engineering. The purpose of the invention is to improve the energy characteristics of uninterruptible power supply units (UPS) by reducing the startup time of the UPS inverter. The starting method for an autonomous parallel current inverter is to capture the moment of supply of the control pulse to the compensator thyristor first in turn. After forming the start signal of the inverter, triggering pulses are applied to the next two thyristors of the inverter bridge. After the occurrence of linear voltages at the output of the inverter, the starting pulses are applied to the next two inverter thyristors. 2 Il. i with S С / 3

Description

The invention relates to electrical engineering and can be used in control systems for autonomous current inverters with combined excitation if it is necessary to obtain a short starting time for an inverter 1 torus, in particular in the structures of uninterrupted power supply units (UPS) with a voltage inverter in an unloaded reserve.

The purpose of the invention is to improve the energy characteristics of the UPS by reducing the startup time of the UPS inverter.

On the functional diagram of the device for implementing the method; Fig. 2 shows timing diagrams of the control pulses of the thyristors of the compensating device, the bridge inverter and the output voltages of the inverter.

The device contains six channels 1-6 of thyristor control of the inverter bridge, each of which includes a synchronization node 7, a sawtooth voltage generator 8, a voltage driver 9 proportional to the amplitude of the inverter linear output voltage, a JO comparator, a driver 11 driver, two-input element And 12 and three-input element OR 13,

but

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oe with

output voltage regulator 14 and start-up unit 15, which includes six 16-21 single-shotrs, AND 22, two-input element, OR-NOT 23 six-input element, and two 24 meters.

The input of the synchronization node 7 is connected to the inverter output (conditionally shown), the first output of the synchronization node 7 is connected to the first input of the generator 8, the output of which is connected to the first input of the comparator 10, the second output of the synchronization node 7 is connected to the input of the former 9 the voltage output connected to the second input of the comparator 10, the third output of the synchronization node 7 is connected to the third input of the comparator 10, the output connected to the input of the driver And pulses, the output of which is connected to the first input element And 12, the output of element 13, the second inputs of the elements AND 12 channels 1-6 are connected to the forward output of the counter for two 24 The second inputs of the elements OR 13 of each of the channels 1-5 are connected to the third inputs of the elements OR 13 of the subsequent channels 2-6, to the first five inputs of the element OR-NOT 23 and to the outputs of one-shot 16-20 respectively, the second input of the element OR 13 of channel 6 is connected to the third input of the element OR 13 of channel 1, to the neck of that input of the element OR-NOT 23 and to the output of the one-shot 21 The outputs of the elements OR 13 channels 1-6 are designed to connect to the control the corresponding electrodes of the corresponding thyristors of the inverter bridge, the output of the element OR-NE 23 is connected to the clock input of the counter 24, the inverting output of which is connected to the first input of the element 22, the second input of which is connected to the input of the zero setting of the counter 24 and to the signal conditioner U (shown ° conditionally). The output of element 22 is connected to the installation inputs of zero one-oscillators 16-21, the clock inputs of which are intended to be connected to the outputs of the thyristor control channels of the compensator. The second input of the sawtooth generator 8 is connected to the output of the output voltage controller 14, the output of which is connected to the first input reference voltage driver Uon, the second input

five

Q 5 0 5 0, Q 5

0

Started to be connected to the output of an inverter.

The inputs of the device are supplied with the output voltages of the inverter U6b (J (J & reference voltage Uon, start signal of the inverter U (,,. CK, compensator thyristor control pulses IR). At the outputs of the device, the inverter thyristor control pulses are generated. of the start-up unit to the input of the inverter thyristor control channels, the start signals UC1 - UCg and the inhibit signal are received. The thyristor control pulse generation and their phase shift during regulation are produced by identical control channels 1-6. Atel 11 is formed at time equal to zero the sum of three voltages at the inputs of comparator 10. The phase inverter control signal at the input of the generator 8 determines the slope 8 formed by the generator and the sawtooth voltage, respectively, the angle of turn-off valves

The starting method is as follows.

Before the inverter starts, triggering pulses are supplied to the control electrodes of the compensator thyristors with a time delay between the starting pulses corresponding to the 60-degree interval of the output voltage. In the initial state, the second input of the element 22 and the zero input of the counter 24 are given a logical signal O, coming through the element And 22 to the inputs of the installation of zero single-vibrators 16-21 and prohibiting the passage of compensator start pulses to the thyristor control channels - the inverter, at the same time the logical signal O with The output of the counter 24 is fed to the second inputs of the elements 12 And channels 1-6, prohibits the passage of the thyristor control pulses of the inverter B. The time t (figure 2) generates a start signal, while the logical 1 through the element 22 enters the inputs of the zero setting of one-oscillators 16 -21, allowing them to work. At time t, a thyristor control pulse of the compensator, for example, the sixth, is fed to the clock input of the one-shot 16, which forms the control pulse output to the second input

element OR 13 channel 1 and the third input element OR 13 channel 2, while the outputs of channels 1 and 2 are formed by the control pulses of the first and second inverter thyristors. At the same time, a unit is recorded in the counter 24. When the linear voltage at the output of the inverter reaches the threshold value, the signals of latching of the linear voltage go to the nodes 7 of the synchronization control channel and to the second input of the output voltage regulator 14 At the moment t3, a start pulse is sent to the next compensator thyristor, at the output of the single vibrator 17 forms and a control pulse through OR elements 13 of the channels 2 and 3 is supplied to the control electrodes of the second conductive th and third inverter thyristors. At the same time, a logical O at the inverse output is recorded in counter 24 and fed through element I 22 to the inputs of setting zero one-shot 16-21, prohibiting the formation of pulses. The signal of logical 1 at the second inputs of elements 12 of channel 1-6 permits the passage of control pulses. Inverter drivers formed by channels 1-6. In this case, the transition to the phase control

By reducing the start-up time, the proposed method allows for loads capable of interrupting the supply voltage over 22 ms to use the structure of an uninterruptible power supply unit in which the inverter is in an unloaded reserve.

which improves the energy characteristics of the aggregates

Claims (1)

Invention Formula Starting method autonomous parallel an inverter power supply for uninterruptible power supply units containing a three-phase inverter bridge and a three-phase compensator, consisting in that six control pulses are applied to the control electrodes of the compensator thyristors with a time delay between control pulses corresponding to a 60-degree the inverter's output period interval, generate an inverter start signal, record the occurrence of linear voltages at the inverter output, characterized in that improving the energy performance by reducing the start-up time of the inverter of the uninterruptible power supply unit, fix the time of the control pulse to the control the electrode of the first in turn thyristor of the compensator, after the formation of the start signal of the inverter, and at this moment serves the triggering pulses simultaneously to the control electrodes two subsequent thyristors of the inverter bridge, counting from the number. the specified thyristor compensator, after the appearance of linear voltages at the output of the inverter at the time of filing the next control pulse of the next thyristor of the compensator is supplied by the triggering pulses simultaneously to the control electrodes of the two following inverter thyristors the bridge. L. 7 A C, z of the Criminal Code (/ "" / "" to, Chg U m tf, s (/ "(/ g, TI ... i. Ubit.UHt Nominal value The boundaries of the zone of acceptable values FIG. 2