SU911499A1 - Exchange device - Google Patents

Description

(5) DEVICE FOR EXCHANGE

 I

The invention relates to computing and can be used to build computing systems.

A device for the exchange is known, which contains an address register and provides a group reference to several functional blocks in.

The disadvantage of the device is that it does not fully solve the task of interfacing a group of subscribers with a computer I / O channel. g -

Closest to the present invention is an I / O control unit comprising a control signal issuing unit, an information issuing unit, a status register (first register), a sampling unit, a control unit, an address unit (the first comparison unit), and a control receive register. signals (second register), information reception register (third register), command register (fourth register) 21.

The disadvantages of the device is that it provides only one subscriber to the computer.

. The purpose of the invention is to expand the field of application by creating a group exchange mode in one call to an exchange device. This goal is achieved by the fact that 6 an exchange device comprising a control signal output unit

Fo information output unit, a sampling unit, a control unit, a first block comparison, first, second, third and fourth registers, as well as input and output control signal buses, and

15 input and output information buses, with the control signal input bus connected to the second register input, the output of which is connected to the first input of the control signal output unit, to the first input of the sampling unit, to the first input of the control unit and to the first input of the first comparison unit , the first output of which is connected to the second inputs of the control unit, the first output of which is connected to the second input of the sampling unit, the output of which is connected to the second input of the control module issuing unit, the first output and the third input cat The first is connected to the third input and the second output of the control unit, the third output of which is connected to the first input of the information output unit, the second input of which is connected to the output of the first register, the first input of which is connected to the fourth output of the control unit, the second output of the control output signal of En with the output bus control signals the output of the issuing unit, information is connected to the output information bus, the input of the information bus is connected to the input of the third register, the output of which is connected to the second input the house of the first comparison block and the first input of the fourth register, the pairing block is entered, the second and third blocks are compared, the pairing block, the second and third comparison blocks, the decoder and the fifth register are entered, the third register output is connected to the first inputs of the block an interface, a second comparison unit, a fifth register and a third comparison unit, the second input of which is connected to the second output of the first comparison unit, the fourth input of the control unit is connected to the first output of the third comparison unit, the second output of which is dinene with the second input of the fifth register, the third output of which is connected to the fifth input of the interface unit, the first output of which is connected to the third input of the information output unit, the second output of the fifth register is connected to the second input of the second comparison unit, with the fourth input of the information output unit and with the third input of the interface block, the second output of which is connected to the second input of the first register, the output of the fourth register is connected to the fourth input of the interface block, the third output of which is connected to the third input of the third block comparing, the output of the second comparing unit is connected to the fifth input of the control unit, the sixth input of which is connected to the fourth output of the interface block, the output of the second register is connected to the first input of the decoder, the second input of which is connected to the output of the third register, the fifth output of the control unit is connected with the third input of descrambler, the output of which is connected to the second input of the fourth register. The drawing shows a block diagram of the proposed device. The device for the exchange contains the control signal output unit 1, the information output unit 2, the interface unit 3, the first register C, the sampling unit 5, the control unit 6, the second, first and third comparison units, the fifth register 10, the decoder 11, the second , the third and fourth registers 12-I, input and output buses 15 and 1 of the control signals and input and output information buses 1 and 18. The device for the exchange provides a subscriber group to the computer I / O channel. The connection to the channel is made by tires 15-18. The interfacing unit 3 contains trunk amplifiers, a subscriber subscriber polling unit, selectors for receiving subscriber control signals. The second comparison unit 7 is made according to known binary code comparison schemes and is intended for determining the busy state of the addressed subscriber. The third comparison unit 9 is designed to determine the ready state of a group of subscribers connected to the device for exchange and can be performed on combinational circuits. Fifth register 10 is designed to store the addresses of subscribers and can be performed according to known registers construction schemes. The decoder 11 is designed to issue control signals to the control unit 6 and the fourth register 14 and can be performed according to a known scheme. The device works as follows. The exchange operation is always carried out at the initiative of the CMB and is carried out in three phases: the phase of establishing communication with the subscriber, the exchange phase and the end phase of the exchange. In the phase of establishing communication with the subscriber, the channel transmits 16 bytes of the address to the input information bus and accompanies it with the control signal of the CHANNEL ADDRESS on the input bus 15 of the control signals. Each computer subscriber is assigned an address byte. The least significant bits of the address byte identify the number abo-. nent connected to this device for exchange. The most significant bits of the address byte determine the device number for the exchange, since several devices can be connected to the computer for exchange. The most significant bits of the address byte from the output of the third register 13 are fed to the input of the first comparison unit 8, which compares the address of the device for exchange. the addresses present in the byte, with the number of this device for exchanging, for example, using toggle switches. If the addresses are not compared (the channel refers to another device for exchange), then at the first output of the first comparison unit 8, a signal is received at the second input of the & control, which the first output controls the sampling unit 5 and the VTO output - the unit 1 issuing control signals so that the output signal of the next device for exchange is fed to the output bus 17 of the control signals. If the addresses coincide, if the device is not occupied, the second output of the first comparison unit 8 will receive the signal arriving at the second input of the third comparison unit E, which analyzes the availability of the subscriber requested by the channel. The lower input of the address byte of the third register 13 arrives at the first input of the third comparison unit 9. The third input of the third comparison unit 9 receives the signals of subscribers' readiness for the exchange from the third output of the third interface unit 3. If the subscriber to whom the channel is addressed is ready for exchange, then a signal is sent to the fourth input of control unit 6 from the first output of the third comparison block 9 and from the second output to the second input of the fifth register 10. At the command of the control 6 block, the 1 output control Signals are generated by the USER'S OPERATION signal, indicating to the channel that the addressable device is connected. At the same time, the first entry into the fifth register 10 of the address of the subscriber present at the output of the third register is recorded at 13. If the subscriber is not ready for operation or

is absent in the system, then a signal is received from the third comparison unit 9 to the fourth input of the control unit 6.

Claims (2)

from the first output of the fifth register 10. If the command is of an official character, then the command is recorded in the fourth through which the SUBSCRIBER SELECT signal will be transmitted to the channel, indicating the channel that there is no subscriber in the system. When exchanging on the initiative of the subscriber, the subscriber writes his number in the fourth register 1 and the status byte having only the ATTENTION pointer in the first register 1, and then sends the TRANSMIT state command to the control unit 6. The control unit 6 brings the status byte to the computer with the ATTENTION bit. Having received this byte-state, the computer starts the exchange operation. Having received the SUBSCRIBER OPERATION signal, the channel removes the address byte from the input information bus 16 and the CHANNEL ADDRESS signal from the input bus 15 control signals. After that, from the fifth register 10, through the information output unit 2, the subscriber’s address is output to the channel to the output information bus 18. From the control output unit 1, the command from the control unit 6 receives the subscriber’s service signal to the output bus 17 control signals. The channel compares the issued and received addresses and, if they are equal, sends 1 command byte to the input information bus, and the corresponding control signal to the input bus 15 control signals. The commands of the channel include commands that the subscriber must execute and commands of an official nature that do not require the work of the subscriber, for example, the IDLE. The decoder 11. analyzes the command byte fixed in the third register 13. If the command belongs to a group of commands to be executed by subscribers, then a signal appears on the output of the decoder 11, according to which the command byte from the output of the third register 13 is written in the fourth register. The channel is transmitted a zero byte of state, and on this the phase of establishing communication with the subscriber is completed. In the exchange phase, the received command for the output of the fourth register 1 is transmitted to the subscriber via the conjugation unit 3. In this case, the number of the subscriber to whom the command should be transferred is sent to the second input of block 3 of conjugation 7 O register C and is not performed and the command is not communicated to the subscriber. The decoder 11 transmits a signal about the service command, to the control unit 6 which processes the corresponding service signals. If, as a result of the command being executed, the subscriber needs to connect to the channel for information exchange, the subscriber, via mate 3, writes his address in the fifth register 10 and transmits the corresponding signals (receive or transmit information) to control unit 6. The control unit exposes the control signals to the output bus 17 via the control signals output unit 1, the SUBSCRIBER REQUIREMENT signal. When a SUBSCRIBER signal is received from the channel through the second register 12, control unit 6 generates a SUBSCRIBER signal. The subscriber addresses the channel to the subscriber's channel from the fifth register 10. The subscriber's address is accompanied by the corresponding service (NAM signal. Service cVfrf + al enters the channel through the output bus 17 of control signals. The subscriber’s address enters the channel through the output information bus 18 through the information output unit 2. After receiving the exchange permission from the channel, the subscriber begins to exchange information. and the p channel by the subscriber through the block 3 communicates information to the information output block 2. When receiving information, the signals from the input data bus 16 through the third register 13 are transmitted to the interface block 3 and then to the subscriber who is on the exchange with the computer. the exchange, the control unit 6 removes the A60NE / TA OPERATION signal and the information exchange phase is completed in the exchange end phase, the subscriber records his number in the fifth register 10 and the status byte in the first register. The status byte indicates how the information was exchanged. Each bit of the status state has a specific value, for example, an ERROR DAN: OUT, EQUIPMENT MALFUNCTION, etc. If there was no error situation in the exchange process, then the status byte contains only End of exchange indicators: THE CHANNEL FINISHED, THE SUBSCRIBER FINISH Simultaneously with the recording of the status byte in the first register, the subscriber transmits to the control unit 6 the TRANSFER STATE command. With this command, the control unit 6 processes the sequence of signals characterizing the phase of the end of the exchange: transmits a TR signal to the channel, the SUBSCRIBER'S FLEECE, transmits the subscriber's address and status byte, accompanied by their corresponding service signals. The status byte is communicated to the channel via the output information bus 18 through the information output unit 2. The completion of the exchange phase of the channel command is completed. Formula of Invention A device for communication comprising a control signal issuing unit, an information issuing unit, a sampling unit, a control unit, a first comparison unit, first, second, third and fourth registers, as well as input and output control signal buses and input and output information bus, with the input bus control signals connected to the input of the second register, tra, the output of which is connected to the first input of the control signal output unit, to the first input of the sampling unit, to the first input of the control unit and to the first input the first comparator unit, the first output of which is connected to the second input of the control unit, the first output of which is connected to the second input of the sampling unit, the output of which is connected to the second input of the unit, issued control signals, the first output and the third input of which are connected to the third input and the second output of the unit control J whose third output is connected to the first input of the information output unit, the second input of which is MmHetto with the output of the first register, the first input of which is connected to the fourth output of the control unit, the second output the control signal output unit is connected to the output bus of the control signals, the output of the information output unit is connected to the output information width, the input information bus is connected to the input of the third register, the output of which is connected to the second input of the first byte comparison and es that, in order to expand the area application by creating a group exchange mode for one call to the device for exchange, it contains the interface block, the second and third comparison blocks, the decoder and the fifth register, with the output of the third register connected to the first inputs of the interface block, the second comparison block, and the fifth register and the third unit of comparison, the second input of which is connected to the second output of the first comparison unit, the fourth input of the control unit is connected to the first output of the third reference unit, the second output of which is connected to the second input) the third register, the third output of which is connected to the fifth input of the interface unit, the first output of which is connected to the third input of the output information, the second output of the fifth register is connected to the second input of the second comparison unit, to the fourth input of the information output unit and to the third input an interface unit, the second output of which is connected to the second input of the first register, the output of the fourth register is connected to the fourth input of the interface block, the third output of which is connected to the third input of the third comparison unit, the output of the second the comparison unit is connected to the control unit input, the sixth input of which is connected to the fourth output of the interface unit, the output of the second register is connected to the first input of the decoder, the second input of which is connected to the output of the third register, the fifth output of the control unit is connected to the third input the decoder, the output of which is connected to the second input of the fourth register-. Sources of information taken into account in the examination; 1. USSR author's certificate V 636603, Kfl. G About F. 1976. 2. USSR author's certificate N-1 53685. cl. G About F C / O, 1973 (prototype).