SU879761A2 - Pulse duration discriminator - Google Patents

Description

one

The invention relates to a pulse technique and can be used in facsimile equipment, for example, designed to transmit and receive weather meteorological maps, and is an improvement of the known device described in the author. 790261.

The main author's certificate describes a pulse selector for duration, which contains a series-connected pulse generator of a reference frequency, a first gate, a first pulse counter, a trigger, a first element NOT, a second gate, a second pulse counter, and a second element NOT whose input is connected to the second input of the first the valve and the output of the bits of the pulse counter, the input of which is connected to the input bus, the third input of the first valve and the input of the first element NOT. The second input of the second valve is connected to the output of the pulse generator of the reference frequency, the third input to the output of the second element is NOT, and the fourth to the output of the conversion bits of the second pulse counter, the output of which is connected to the second input of the trigger, the reset input of which is connected to the input of the generator pulses of the reference frequency and the synchronization bus, and the output to the input resets the second pulse counter Ml.

The disadvantage of this device is a significant distortion — and even the loss of individual pulses of the selected sequence — when it is clocked.

ten

The aim of the invention is to expand the functionality of the device.

The goal is achieved. so that in the pulse selector

15 duration, containing connected in series pulse generator of the reference frequency, the first valve, the first pulse counter, the trigger, the first element is NOT, the second valve,

20 the second pulse counter and the second element NOT, whose input is connected to the second input of the first valve and the output of the bits of the first pulse counter, the reset input of which is connected to the input bus, the third input of the first valve and through the first element NOT to the first input of the second valve, the second input of which is connected to the output of the pulse generator

30 reference frequency, the third input - to

The second element is NOT loaded, and the fourth is to the output of the incremental bits and the input of the alarm device of the second pulse counter, the output of which is connected to the first trigger input, the second input of which is connected to the output of the first pulse counter, the reset input to the input of the reference frequency pulse generator and the synchronization bus and the output is connected to the Reset input of the second pulse counter, and the outputs of the first and second valves are connected respectively to the inputs of the first and second pulse counters, the third element is NOT, the third, the fourth, and five and the sixth valves, additional triggers and a decoder, the first input of which is connected to the output of the reference frequency generator and the nepBfcJM input of the first valve, the second input to the first inputs of the fifth and sixth valves and the clock frequency pulse bus, and the output to the first inputs of the third and fourth valves, the second input of the third valve directly, and the fourth through the third element is NOT connected to the trigger output, and the outputs of the third and fourth valves are connected respectively to the first and second inputs of the first additional ADDITIONAL trigger which outputs through the fifth and sixth gates connected to first and second inputs of the output devices incorporated Doponitelnye second flip-flop, whose resetting input is connected to the reset input of the flip-flop and the first additional synchronization bus.

The drawing shows a structural electrical circuit of the device.

The device contains a valve 1 connected in series, a pulse counter 2 consisting of counters 3 and an isolator signal 4 tunable within the capacity of counter 2, trigger 5, a generator of impulses of the reference frequency, element 7 HE, pulse counter 8 consisting of from recalculating bits 9 and signaling device 10, element 11 NOT, valve 12, decoder 13, element 14 N valves 15, 16, trigger 17, valves 18.19 and trigger 20.

The input bus is connected to the first input of the valve 1, the input of the element 11 NOT and to the input Reset of the counter 2 pulses. The output of valve 1 is connected to the counting input of the pulse counter 2, the output of bits 3 of which is connected to the first input of the valve 1, to the input of element 7 NOT and to the input of the signaling device 4, the output of which is connected to the second input of the trigger 5 whose input. The reset is connected to bus synchronization, inputs Reset triggers 17,20 and the input of the generator b Reset, and the output is connected to the input Reset counter 8 pulses, with the second input of the valve 15, the input element 14 NOT. The third input of the valve 1 is connected to the output of the generator 6, the second input of the valve 12 and the second input of the decoder 13. The first input of the valve 12 is connected to the output element

11NE, the third input of the valve 12 is connected to the output of the element 7 NOT. Output; valve 12 is connected to the counting input of the pulse counter 8, the output of bits 9 of which is connected to the fourth input of the valve 12 and the input of the detector 10, the output of which is connected to the first input of the trigger 5. The output of the HE element 14 is connected to the second input of the valve 16, the first input of which is connected with the first inlet valve 15

and with the output of the decoder 13, the outputs of the valves 15 and 16 are connected respectively to the first and second inputs of the trigger 17. The direct and inverse outputs of the trigger 17 are connected respectively to the first inputs of the valves 18.19, the second inputs of which are connected to the first input of the decoder 13 and the clock input frequencies. The outputs of the valves 18, 19 are connected respectively to the first and second inputs of the trigger 20, the output of which is the output of the device.

The device works as follows.

A pulse of the sequence arriving at the input bus of the device opens valve 1 and gives the permission for counting on input Reset of the pulse counter 2. The synchronizing pulse sets the inputs Reset triggers 5.17 and 20, and the pulses of the reference frequency through the open valve 1 arrive at the counter 2 pulses, consisting of recalculating bits 3 and defining the lower time threshold of the selector. When the pulse duration of the sequence is greater than the lower time threshold, the signal from the output of the recalculating bits 3 closes the gate 1 and the signaling device 4 sets the unit potential at the output of the trigger 5. .At the same time, the signal from the output of the conversion bits 3 through element 7 does NOT open the valve

12and, if at this time the pulse at the output of the trigger 5 is already absent, the valve 12 is open from element 11 NOT, the pulses from the generator 6 through the open valve 12 go to the counter 8. The upper time threshold of the selector is determined by counting bits 9. The signal from the output of the counting bits 9 closes the valve 12 and the detector 10 overturns the trigger 5, the zero potential from the output of which sets the input 8 to the reset state. When the duration of the impulse of the sequence is greater than the upper time threshold, the valve 12 is closed at the input from element 11 NOT until it ends, after which

through the open valve 12, the pulses of the reference frequency arrive at the input of the counter 8. The signal from the output of the recalculating bits 9 closes the valve 12 and the signaling device 10 overturns the trigger 5. From the output of the trigger 5, the signal goes to the first input of the valve 15 and through element 14 NOT to the first input gate 16. A gate pulse is received from the decoder 13 to the second inputs of the valves 15 and 16, which is separated from the pulses of the reference frequency and is located in the middle of the interval between the pulses of the clock frequency. If there is a pulse at the output of the trigger 5, the valve 15 is opened and the gate pulse through the open valve 15 overturns the trigger 17 at the first input, the direct output of which opens the valve 18 and the first clock pulse through the open valve 18 overturns the trigger 20 at the first input and sets it to output, which is the output of the device, is a single potential. At the end of the pulse at the output of the trigger 5, the valve 15 is closed, and the valve 16 is opened through the element 14. The strobe pulse from the decoder 13 through the open valve 16 overturns the second input trigger 17, the direct output of which closes the valve 18, and the inverse output opens the valve 19. The first clock pulse over the open valve 19 overturns the trigger 20 into the initial state the Thus, a timed selection signal appears at the output of trigger 20.

The proposed device favorably differs from the indicated prototype in that it allows, along with the restoration of a sequence of pulses after selection, if it is necessary to isolate the pulses below the temporary

the selection threshold with the subsequent restoration, perform clocking of the selected pulse sequence with minimal distortion of the waveform at the output.

Claims (1)

1. USSR author's certificate No. 790261 3. 248505, cl. H 05 K 5/20, 04/05/77 (the same author).