SU877539A2 - Logic device - Google Patents

Description

(54) LOGICAL DEVICE

I

The invention relates to discrete-type automatic devices, solving logic control problems described by a system of equations of temporal Boolean functions according to a given algorithm, sequentially in time.

According to the main author. St. No. 591858 a logical device is known that contains a program block consisting of a pulse generator and a program accumulator, a command depot, AND input and output elements, a NOT register, a shift register, AND elements, a logic block, a time relay, a memory cell, a clock generator, Shift register pulse shaper and shift register trigger.

The disadvantage of such a device is that it is critical to changing the values of time-exposures, since their change is associated with a complete replacement of the time relay.

The purpose of the invention is to expand the functionality of the device by changing the time intervals without changing the time relay.

The goal is achieved by the fact that the logical device contains a pulse counter and a group of elements AND, the first input of the first element AND of a group connected to the output of the pulse generator of the program block and to the input of the pulse counter, the first input of each element of the group starting from the second, with the output of the previous element AND group, the outputs of elements AND group are connected to the informational inputs of the time relay, the second inputs of all elements And group are connected to the group of outputs of the pulse counter.

The drawing shows a block diagram of the device

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Claims (1)

The device contains program block 1, decoder 2 commands, elements AND 3-7, elements AND 8-11, element OR 12, element AND-NOT 13, shift register 14, element 15, logical block 16, time relay 17, cell 18 Memories, HE element 19, And 20 and 21 elements, shift register setting trigger 22, shift register setting pulse generator 23, sync pulse shaper 24, pulse generator 25, drive 26 programs, input and output highways 27-34, pulse counter 35, a group of 36 elements And, the output 37 of the pulse generator. Program block 1 generates a command consisting of the address of the input; GO and output elements AND and the sign / inversion of the input variable. The decoder 2 commands converts the code of the selected address to the control signal supplied to the corresponding elements AND 8-11. At the same time, the inversion signal of the input variable is supplied and the logic unit 16 is fed to the control input of the element 13, the driver 24 generates a clock pulse. Input variables coded with O and 1 are input to inputs 27 and 28 of elements 5 and 6 from the monitoring system or directly from sensors. Along with the input variables to the inputs 29-1 to 29-VI of the elements And 3-1 3-Ts, signals are output from the outputs 30-1 30 and the relay 17-1 to 17-Ts of time, to the input 31 of the element I 4 from the output 32 whose ki 18 memory, and the input element And 7 from the output of the logic unit 16. Logical block I6 and functional nodes 19-23 process the input information in accordance with the algorithm laid down in the program block 1. Results processing through the elements And 8 A -1 1 is output to the inputs of the ynpa object of laziness along chains 33 and 34, to the input of the memory cell 18 and to the inputs of the relay 17-1 17 M time. Pulse counter 35 converts a sequence of operating frequency signals of a master oscillator into a binary code. A group of 36 elements And converts a binary code arriving at its inputs from a pulse counter 35 in G1 sequences of discrete time reference signals, where UI is the number of outputs of elements AND of group 36, with each time a sequence of discrete time reference signals is formed at each output. The outputs of the elements And group 36 are connected to the inputs of the relay 17-1 -1 7-And time. All relays 17-1 - 17-I are of the same type (identical), built, for example, on impulse counters and transducers of codes. The possibility of working out the same type of time relays and different time exposures is provided by applying to the inputs of the corresponding time relays AND sequences of discrete signals of the reference time with frequencies f,;,. .., j, respectively, from the outputs of elements AND of group 36. The application of the invention makes it possible to expand the functionality of the device, since the device is less critical to changing time exposure values. When changing the exposure, the time relay is not fully replaced, but the time relay is switched to another output of elements AND of group 36. Invention formula Logical device according to auth.St. No. 591858, characterized in that, in order to extend the functionality by changing the time extracts without changing the time relay, the device contains a pulse counter and a group of elements AND, the first input of the first element AND of the group connected to the output of the pulse generator of the program block and to the input of the counter pulses, the first input of each element And group, starting from the second, is connected to the output of the previous element AND group, the outputs of elements AND group are connected to the information inputs of the time relay, the second inputs of all elements s and group connected to a group of outputs of a pulse counter. Sources of information taken into account in the examination 1. USSR Author's Certificate No. 591858, cl. G 06 F 9/04, 1975.