SU1381529A1 - Trunk line exchange controller - Google Patents

Abstract

The invention relates to computing and can be used in devices that organize the exchange of information between sources and receivers connected by a common backbone, if necessary, to process different-rate information flows. The invention is designed to extend the scope of use. This is achieved by introducing into the pulse distributor a feature of an address containing a code counter, a group of triggers, an AND element and a one-tuner. 4 il.

Description

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The invention relates to computing and can be used in devices that organize the exchange of information between sources and receivers connected by a common backbone, if necessary, to process different-rate information flows.

The aim of the invention is to extend the scope of application.

FIG. 1 shows a functional diagram of the device; in fig. 2 - diagram of the distributor of pulses of signs of the address; in fig. 3 is a diagram of a controlled capacitive pulse distributor; in fig. 4 is a diagram of an address generation unit.

Exchange control device ma10

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they are set to the initial state, and also they are fed to the first inputs of the controlled distributors 4 pulses of the master and the slave devices and start them to generate the next control code at each clock cycle.

The distributor of 3 pulses of the address signs produces the signs of addresses (pages) in the form of pulses, the duration of which determines the duration of transmission of the sequence of control codes, and the frequency of the corresponding attribute of the address determines the frequency of transmission of the array of sequences of control codes at this address. The pulses from the bit-output wand contain a generator of 1 pulses, 23 counter codes of the codes (except for the first trigger 2, the distributor of 3 pulses of the address indications, the controlled distributor of 4 pulses, the trunk control 5, the address generation block 7, 20 , Element AND 8, counter 9 clocks, first element 2И-OR 10, bus line II synchronization, second element 2И- OR 12, second trigger 13, second element OR 14, first element OR 15, one-vibra) are fed to the counting inputs of the triggers groups 24 and front fr Ontom switch these triggers in a single position. The triggers of group 24 are switched to zero position by pulses coming from the output of the first bit of the counter 23 codes, which are modulated on the element I 25 by pulses coming from Tina 1 1. Modulation of the pulse from the output of the first discharge of the counter 23 codes to the centralizer 16, desfrater 17 the third element 25 cops And 25 pulses from the output of the bus 11 2I-OR 18, the decoder 19, one-shot is necessary to provide a reliable peretor 20, the elements And 21,22. switching in triggers in a single position

The distributor of 3 pulses of indications 24 by the leading edges of the pulses, postaddress (see Fig. 2), contains p-discharge g-digits from the discharge outputs of counter 23, this terminal counter of codes 23 intended for circuits. When switching inverse output

 the n-th bit of the code counter 23 to a single position at the output of the one-shot 26, a pulse is generated, which at the master device switches through the third element 2I-OR 18 the trigger 13 to a single

generating a sequence of pulses, the frequency of which determines the frequency of the formation of the characteristics of the address; to the triggers of groups 24 (1), forming for the duration signs of addresses; element And 25, one-shot 26.

position. This trigger connection 13

The controlled distributor 4 impulse- - provides the formation of the sign M-th

owls contains a counter 27, a group of 28 elements I. The block 6 of the formation of an address contains an encoder 29, a group of 30 elements I.

The control device for the exchange on the highway works as follows.

When the power is turned on, all elements of the device that have two steady states are reset to their original (zero) state. After that, from the output of the generator 1, the pulses, frequency and duration of the kotaadraza with a frequency equal to the frequency of formation (M-1) of the th sign, if this sign is formed from the direct output of the nth digit of the counter 23. Using 40 of these signs to form control addresses in systems using two devices, control information is transmitted over the information bus at a frequency twice as large as in systems where one device is used. This makes it easier to determine the frequency and duration of the scan;

The change of control codes received at the first input of the 9-clock counter starts it. After m ticks (, 2, ...), at the output of the 9 ticks counter, a signal is generated that arrives at the first input of the first trigger 2 and sets its direct output to a single position. A high potential from the direct output of the first trigger 2 is fed to the second input of the first group of the first element 2I-OR 10 and allows the synchronization pulses to pass to the bus 11. These pulses from the bus 1 1 go to the second inputs of the counter 9 clocks of the master and slave devices and

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devices, the generated signs of addresses on the first discharge of counter 23 and on triggers 13, 24 are received by separate lines to separate inputs of the element OR 14 and the address formation block 6, where by the sign of the p-th control code received from the first output of the second decoder 19 , an address code is generated. The indication of the address is transmitted from the output of the element OR 14 to the third input of the second group of the second element 2I-OR 12. At the output of this element, pulses are formed that read the code information produced in the control valve 4,

they are set to the initial state, and also they are fed to the first inputs of the controlled distributors 4 pulses of the master and the slave devices and start them to generate the next control code at each clock cycle.

The distributor of 3 pulses of the address signs produces the signs of addresses (pages) in the form of pulses, the duration of which determines the duration of transmission of the sequence of control codes, and the frequency of the corresponding attribute of the address determines the frequency of transmission of the array of sequences of control codes at this address. The pulses from the discharge outputs of the counter of 23 codes (except for the first discharge) are fed to the counting inputs of the triggers of groups 24 and the leading edge switches these triggers to a single position. The triggers of group 24 are switched to zero position by pulses coming from the output of the first bit of the counter 23 codes, which are modulated on the AND 25 element by pulses coming from Tina 1 1. Modulating the pulse from the output of the first discharge of the counter 23 codes on the element And 25 pulses from the output tires 11 are needed to reliably re-apply code counter 23 to a single position at the output of the one-shot 26, a pulse is generated, which at the master device switches through a third element 2I-OR 18 trigger 13 to a single

position. This trigger connection 13

provides the formation of the sign of M-go

addresses with a frequency equal to the formation rate (M-1) of a sign, if this sign is formed from the direct output of the nth digit of counter 23. When using these signs to form control addresses in systems using two devices, the control information the data bus is transmitted at a frequency twice as large as in systems where one device is used. This makes it easier to monitor the health of such

There is no control over the health of such

devices, the generated signs of addresses on the first discharge of counter 23 and on triggers 13, 24 are received by separate lines to separate inputs of the element OR 14 and the address formation block 6, where by the sign of the p-th control code received from the first output of the second decoder 19 , an address code is generated. The indication of the address is transmitted from the output of the element OR 14 to the third input of the second group of the second element 2I-OR 12. At the output of this element, pulses are formed that read the code information produced in the control valve 4,

Bus 5. At the same time, the read pulses from the output of element 2I-OR 12 are fed to the third input of the address generation unit 6. The code information is read into bus 7 by pulses arriving at the combined inputs of all elements AND 30 from the output of element 2И OR 12. The readout of the address code in P1in 7 is carried out only when the read pulse coincides with the sign of the control code on M-1 the address, which is the control for the master device, besides the code of the number of this address, bus 7 is transmitted and the control information, which is generated in the address formation block 6, when the control code sign arriving from the second output of the decoder 19 and the sign (M - 1) -th address, coming from the output of the distributor 3 pulses. The control information code is read out when the read pulses from the output of element 2I-OR 12 coincide with the indication of the control code. In this way, the operation of the master at addresses from first to (M-1) -th is organized. When the inverse output of the n-th bit of the counter 23 is switched from zero to one position, a single device pulse is generated at the output of the one-shot 26, which triggers the switch 13, which forms the sign of the M-th address in duration. The sign of the M-th address from the direct output of the flip-flop 13 is fed to the fourth input of the address generation unit 6, where the code of this address is generated on the basis of the control code. The sign of the M-th address also goes to the second input of the element AND 8 and through the element OR 14 to the third input of the second group of the second element 2 OR OR 12. At the output of this element, pulses are formed that read the code information produced in the controlled distributor 4. These pulses also arrive at the input of block b for reading the code of the M-th address at the time of arrival of the sign of the control code.

The slave device receives, via the control bus, a sequence of control codes generated by the master, one of these sequences is converted by the decoder 17 into a pulse, which is fed from the first output of this controller to the second input of the controlled distributor 4 and sets it to the slave devices.

The slave device receives the code of the sign and the number (M-1) of the address via buses 5, 7 and II, converts it with the decoder 17 into a pulse, which from the second output of this decoder is fed through And 22 to the third input of the distributor 3

and sets all bits, except for the n-th, counter 23 to the zero position, and the n-th bit to the single position.

The slave device receives, on buses 5, 7 and 11, the code of the feature and the number of the M-th address, which is converted by the decoder 17 into a pulse coming from its third output to the second input of the single synchronizer 20. The pulse from the output of the one-shot 20 is fed to the first input of the first groups

0 of the third element 2I-OR 18 and the slave device sets the second trigger 13 in the single position. The signal from the output of the trigger 13 is supplied to the third input of the second group of the first element 2I - OR 10,

d allowing passage from the output of this element of synchronization pulses to bus 11, to the fourth input of block 6, where the signal from the second output of the decoder 19 produces the control information code, to the third input of the first group of the second element 2I - OR 12, allowing passage from the output an element of pulses that reads the information produced in the controllable distributor 4 and block 6.

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The reset of the second trigger 13 to the initial (zero) position at the slave device is carried out by pulses from the output of the AND 25 element of the distributor 3, coming through the OR element 15 to the second input of this trigger. After that, the slave device 2Q stops the transmission of information via shields 5, 7 and 11, and the master device is put into operation.

Claims (1)

Invention Formula . A trunk exchange control device containing a pulse generator, a controlled pulse distributor, two triggers, three atements AND, an address generation unit, a clock counter, two single vibrators, two OR elements, three elements 0 2И - OR, two decoders, with the output of the address generation unit being the output of the device for connecting to the trunk information wounds, the first output of the controlled pulse distributor is the output of the device for 5 connections to the main line control cables, the output of the pulse generator is connected to the counting input of the clock counter, to the first inputs of the first and second groups of inputs of the first and second elements 2И-OR and through the first one-shot 0 to the first input of the first group of inputs of the third element 2Y-OR, pr my output of the first trigger is connected to the first input of the first element AND, to the second inputs of the second groups of inputs of the first and second elements 2I - OR, and to the first input of the second group of inputs of the third element 2I - OR, the inverse output of the first trigger chen to the first inputs of the second and third And elements, the second inputs of the first groups of inputs of the first, second and third elements 2И-OR, the output of the first element And through the second one-vibrator is connected to the first input of the first element OR and to the zero input of the first trigger, whose single input is connected to the output of the clock counter, input the reset of which is connected to the output of the first element 2I-OR, also connected to the trigger input of the controlled pulse distributor and the strobe input of the first decoder, the output of the first element 2I-OR is the output of the device for connecting The first, second and third outputs of the first depotfrater are connected to the second inputs of the second and third elements of the Inc. permissively, the input of the first one-oscillator, the first output of the controlled pulse distributor and the output of the address generation unit are connected to the information input the first decoder, the output of the second trigger is connected to the first input of the second element OR, the second input of the first element And the third inputs of the first groups of inputs of the first and second elements 2 and -OR, and to (M - (- 1) -m the input feature of the address block of the address generation unit (where M is the number of generated addresses), the output of the third element 2I OR is connected to the single input of the second trigger, the zero input of which is connected to the output of the first OR element, the output of the second element OR is connected to the third input of the second group of inputs the second element 2I- OR, the output of which is connected to the synchronization input of the block forming the address, the output of the second element AND is connected to the input of the - 5 5 0 5 0 The installation of a controlled distributor of pulses, the second output of which is connected to the information input of the second decoder, the first and second outputs of which are connected to the inputs of the attributes of the current address and the control address of the address generation unit, the first output of the second decoder is connected to the third input of the first And element, different the fact that, in order to expand the scope of application, an impulse distributor of address indicators containing a code counter, a group of triggers, an AND element and an The bridger, the forward outputs of all bits of the code counter, except the first, are connected to the counting inputs of the corresponding triggers, the inverse output of the higher bit of the code counter is connected to the one-shot input, the direct output of the first bit of the counters is connected to the first input of the AND element whose output connected to the zero inputs of the group triggers, the third output of the controlled pulse distributor is connected to the trigger input of the counter of the codes of the pulse distributor of the address signs, in which the direct output of the first discharge is The codes and the outputs of the group triggers are connected to the address inputs of the address generation unit and the corresponding inputs of the second OR element, the outputs of the AND element and the one-time impulse distributor of the address indicators are connected respectively to the second input of the first OR element and the second input of the second group of inputs of the third AND element, and the output of the third element And is connected to the input of the installation of the counter codes of the distributor of pulses of the characteristics of the address. Fig1 12 V. w 21CDiys. 2 eight 27 3 - 12 3-1 3-z W- (M Y) fpt / g four GU-2