SU773731A1 - Storage of 2d type with non-destructive reading-out of information multi-aperture ferrite elements - Google Patents

Description

I

 The invention relates to computing and can be used in the construction of discrete information storage devices with non-destructive readout.

A type 2D memory with non-destructive reading of information on multihole ferrite elements (MEF) is known, which contains a drive, write and read current drivers, impulse generators:, Q ow and logic elements IJ.

The disadvantage of this memory is low reliability.

The closest in technical essence to the invention is a ZU.Type 2D-5 with non-destructive reading of information on the IPM, which contains a drive, the first input of which is connected to the output of the write discharge current generator, the second input - to the output of the driver 20 address write currents, and a third input with the output of the read address current driver, the first input of which is connected to the GS by the address decoder output, and the second -

with the output of the first element OR, the first and second inputs of which are connected respectively to the outputs of the first and second elements AND, the third element AND whose output is connected to the second input of the address writing current shaper, the first input of which is connected to the output of the address decoder, a pulse generator connected to the first inputs of the first and fourth elements And, the clock counter, the input of which is connected to the output of the fourth element And and to the first inputs of the second and third elements And, and the first, second and third outputs are connected respectively, to the second inputs of the second and third AND gate and input of decoder cycles ,, fifth sixth and seventh AND gates, a second OR gate 2.

The disadvantage of such a device is a large write cycle time, since, in the write cycle, the ferrite elements affect the read current with a succession across all addresses of the storage array. covered by one bit of a record. The purpose of the invention is to increase the speed of a known type 2D charger with non-destructive reading of information on the IPM. The goal is achieved by the fact that the device contains the third element OR, the eighth element AND, the element NOT, the key and the energy storage unit, the first output of the decoder of clock cycles is connected to the control input of the key, the output of which is connected to the first input of the bit generator of recording currents and the storage unit energy, and the second and third outputs of the decoder clock cycles connected to the first inputs of the fifth, eighth and sixth, seventh elements And, respectively, the second inputs of the sixth and eighth elements And connected to the output element NOT, the input The first is connected to the second inputs of the fifth and seventh elements AND, the outputs of the fifth and sixth elements AND are connected respectively to the first and second inputs of the second element OR, the output of which is connected to the second input of the generator of discharge currents, the third input of which is connected to the output of the third element OR, and the first and second inputs of the third element OR are connected to the outputs of the seventh and eighth elements AND, respectively. The drawing shows a block diagram of the proposed memory. The device contains a drive 1, output numeric tires, 2, a shaper of 3 write write currents, a shaper of 4 read current currents and a shaper of 5 write write currents, the first element AND 6, the control bus Read 7, the first element OR 8, the address decoder 9, - input address bus 10, pulse generator 11, fourth And 12 element, control bus Record 13, second And 14 element, third And 15 element, 16 clock counter, 17 clock decoder, key 18, power storage unit 19 (for example, capacitor), the element is NOT 20, the input numeric STI 21, the fifth 22, sixth 2 seventh 24 and eighth 25 elements And, the second 26 and third 27 elements OR. The device operates as follows. In the information reading mode, if there is a permitting loss on the control bus, read 7, the synchronous pulse from the generator 11 and my circuit in the first element AND 6 and the first element OR 8 are fed to the driver of the 4 address read currents of the selected decoder 9 addresses, in accordance with the address code on the address 10 buses. As a result, the read current flows along the selected coordinate of drive 1; and on the output number lines 2, the code of the read number is generated. In the information recording mode on the governing bus, Record 13 has a resolving potential and a sync pulse from oscillator 11. It comes through the fourth element And 12 at the counter input 56 cycles, the second 14 and third 15 elements And, Second inputs of the second 14 and. of the third 15 elements And yn {equiped by the counter 16 in such a way that during a certain time the sync pulse. Alternately passes through one of these elements And, and, consequently, the shapers of write write 5 and read 4 turn off alternately. At the same time, a decoder of 17 clocks, based on a counter of 16 clocks, outputs at the first output a switch on key 18 that supplies power on the formers of 3 discharge currents and charges the block 19 of the energy actuators, moreover, at this time the decoder of 17 cycles on its second output issues a poll on the fifth 22th and eighth 25 elements I. A number code present on the number buses 21, or its inversion at the output of the element, HE 2O allows polling to pass through the fifth 22 or eighth 25 AND element, then through the second 26 or third 25 element OR the poll goes to the second or third inputs of the generator 3 discharge currents, ensuring the formation of the corresponding polarity of the discharge current of accumulator 1 . As a result, currents flow through the bit buses of accumulator 1, the direction of each of which corresponds to the code value of the corresponding bit of numerical tires 21, and different polarity of coordinates flow along the selected coordinate tire of drive 1 currents, providing the necessary changes in the magnetic states of the storage elements, i.e. information is recorded at the selected address. The time necessary for this is counted by a 16 clock counter, which, when a certain code combination is reached, prohibits the passage of clock pulses through the second 14 and third 15 elements AND, thereby preventing the operation of address read current 4 and write 5 drivers. Especially, the 17 raifTOB decoder removes the turn-on signal on key 18, issues a poll at its third exit and removes the onro from the second exit. In accordance with the number of tires on busbars 21 or its inversion 20, the sixth 23 or seventh 24 elements are opened AND and the poll from the decoder 17 through the third 27 or second 26 element OR is fed to the third or second input of the generator 3 discharge currents, providing the opposite polarity this current. At the next moment of time, the 17-cycle declimator again issues a poll at its second output and removes it from the third output, and so on, until a predetermined number (3-7) is reached, depending on the type of storage element of the different current discharge pulses. So, when this key of discharge current pulses passes the key 18 is turned off, the amplitude of the discharge currents in the pack is determined by the potential of the accumulated energy in block 19 (for example, on a capacitor), which decreases to zero as energy is consumed during the passage of these currents. Thus, the states of the storage elements are normalized to all bits and addresses, which ensures the stability of the drive output signals by the first address after the write cycle to any address in the read mode, except for the one selected during recording. In the subsequent period of time, which is also determined by the code combination of the counter 16, the known normalization of the magnetic state of the storage elements of the address selected at the time of recording is performed by affecting the selected coordinate of the accumulator 1 several times; these read currents by submitting several polls from counter 16 through the second element AND 14, the first element OR 8 to the shaper 4 address reading currents. This is where the write cycle ends. The proposed storage device differs from the well-known type 2D 2D on multihole ferrite elements, which has stable parameters of the output signals of the storage device, which significantly reduces the recording cycle time, which expands the scope of application of such storage devices. 7 31 3 оb r Formula et e and Storage device type 2D with a broken readout on multi-ferrite elements containing a storage device, the first input of which is connected to the output of the generator of discharge write current, the second input - with the output of the generator of address currents write, and the third input - with the output of the address reading current generator, the first input of which is connected to the output of the address decoder, and the second - to the output of the first OR element, the first and second inputs of which are connected respectively to the outputs of the first the third and the third element, the output of which is connected to the second input of the follower of write current addressing modes, the first input of which is connected to the output of the address decoder, a pulse generator connected to the first inputs of the first and fourth elements1 {ti, clock counter, input which is connected to the output of the fourth element And with the first inputs of the second and third elements And, and the first, second and third outputs are connected respectively to the second inputs of the second and third element And and the input of the decryptor clock, fifth, sixth and seventh My elements are AND, the second element is OR, characterized in that, in order to increase the speed of the memory device, it contains the third element OR, the eighth element AND, the element NOT, the key and the energy storage unit, the first output of the clock decoder is connected to the control input of the key, the output of which is connected to the first input of the generator of write discharge currents and the power storage unit ,. and the second and third - outputs of the decoder clock cycles connected to the first inputs of the fifth, eighth and sixth, seventh elements And, respectively, the second inputs of the sixth and eighth elements And connected to the output element NOT, the input of which is connected to the second inputs of the fifth and seventh elements And, the outputs of the fifth and sixth elements of I chen correspond to the first and second inputs of the second element OR, the output of the terminal is connected to the second input of the actuator of the discharge currents, the third input of which is connected to the output. the third element OR, and sometimes the second inputs of the third element OR are connected to the output of the eighth and eighth elements AND, respectively.

Sources of information taken into account in the examination 1. USSR Copyright Certificate № 631990, cl. Q11 C 17/00, 1977.

773731

, 2. USSR Author's Certificate in Application No. 2497585 / 18-24, cl. 11 11/08, 1977 (prototype).

Claims (1)

Claim A 2D storage device with a non-destructive reading of information on multi-hole ferrite elements, containing a drive, the first input of which is connected to the output of the write discharge current shaper, the second input is the output of the write address current shaper, and the third input is the output of the read current shaper, the first input of which is connected to the output of the address decoder, and the second to the output of the first OR element, the first and second inputs of which are connected respectively to the outputs of the first and second AND elements, a third element And, the output of which is connected to the second input of the shaper of the write address currents, the first input of which is connected to the output of the address decoder, a pulse generator connected to the first inputs of the first and fourth elements And, a clock counter, the input of which is connected to the output of the fourth element And and the first inputs of the second and third elements And, and the first, second and third outputs, respectively connected to the second inputs of the second and third element And and the input of the clock decoder, the fifth, sixth and seventh elements And, the second element OR element, characterized in that, in order to improve the performance of the storage device, it contains the third OR element, the eighth AND element, the NOT element, the key and the energy storage unit, the first output of the clock decoder is connected to the control input of the key, the output of which is connected to the first input of the discharge current generator and the energy storage unit, and the second and third outputs of the clock decoder are connected to the first inputs of the fifth, eighth and sixth, seventh elements And, accordingly, the second inputs of the sixth and eighth elements And connected to the output of NOT circuit having an input coupled to the second inputs of the fifth and seventh AND gates, the outputs of the fifth and sixth AND gates connected This completes the recording cycle. The proposed storage device differs from the known device type 2D on multi-hole ferrite elements having stable parameters of the output signals of the drive, a significantly shorter recording cycle time, which expands the scope of such storage devices. respectively, to the first and second inputs of the second OR element, the output of which is connected to the second input of the discharge current former, the third input of which is connected to the output. the third OR element, and the first and second inputs of the third OR element are connected to the outputs of the seventh and eighth AND elements, respectively.