SU763906A1 - Device for determining random process characteristics - Google Patents

Description

to the second input of the hypothesis analysis unit.

The drawing shows the block diagram of the device.

The device comprises an initial conditions setting unit 1, a comparison circuit 2, a control block 3, a memory block 4, a hypothesis analysis block 5, a block

6 quantizing and generator 7 sync pulses, switching unit 8 and element 9 I.

The 6th quantizing block pass and is connected to one of the inputs of the memory block 4 and the first input of the second circuit 2, the second and third inputs of which are connected respectively to the output of the switching unit 8 and one of the outputs of the control block 3, the output of circuit 2 the comparison is connected to the input of the hypothesis analysis unit 5; the output of the memory block 4 is connected to one of the inputs of the switching unit 8, the other input of which is connected to the output of the control unit 3, the first of the inputs of the control unit 3 being connected to the generator

7 sync pulses, and the second is connected to block 1 setting the initial conditions associated with block 5 analysis of hypotheses, the inputs of element 9 and are connected respectively to one of the outputs of block 3 of the control and the output of the generator 7 sync pulses, and the output of element 9 is connected to one

from the inputs of block 6 quantization, to the other input of which the process X under investigation is applied,

The proposed device implements a non-parametric criterion for testing the hypothesis of stationarity of a random process, based on n-differences of type Xi-X (2 / iT + i, where, .. p; T is the total number of sample values of the random process X, and. The device works in the following way .

Before starting work, the initial conditions are entered into the setting unit 1, the control unit 3 locks the comparison circuit 2, the switching unit 8 and permits the passage of clock pulses through the element 9 into the quantization unit 6. Sample values X arrive at block 4, and the sync pulses simultaneously arrive at control block 8. At the moment when the number of sample values reaches n, control block 3 locks element 9 and thereby stops the flow of values X, into block 4. At the same time the sync pulses go to control unit 3 and, with a number of 2p, control unit 3 turns on switching unit 8 and circuit 2. In scheme 2, the sample values of the serial numbers X (2/3) T + i are compared, where, 2, ..., n, and the number of positive and negative post differences paet unit 5 hypotheses analysis.

After the comparison operation, the sample value X is erased from memory block 4 and in its place the next sample value XT + I of the process under investigation is recorded. In block 5 of the analysis of hypotheses, the number of positive and negative differences is compared with the corresponding thresholds, the values of which are determined by the sample size T and a decision is made on whether to accept or reject the hypothesis of stationarity of the random process. The processing time of a random process in a known device is determined mainly by the time spent on the number of inversions. To do this, each sample value X of the random process X, Starting from the first, is alternately compared to all subsequent values in the comparison circuit 2.

Consequently, to determine the x-variation of inversions in a selective sequence of volume T, it is not necessary to perform (T - 1) operations in the comparison block.

Then the processing time Tp of the random process by the known device is

0tn - Cf-i) 4,

where t-i is the time delay of the circuit

compare;

tr is the time delay due to the remaining blocks of the known device. The proposed device can significantly reduce the processing time of a random process by eliminating the need to determine the number of inversions and reducing the number of comparison operations. In addition, the device performs a pairwise comparison of the sample values of the random process X with the sequence numbers X and X (2/3) T + i, and the processing time of the random process Tj is

,

0 where t is the time delay due to the remaining blocks of the proposed device. When using a single elemental base for the implementation of the proposed and known devices can be considered, then with the processing time of a random process the proposed device, as compared with the known, is reduced by

iTp / C-j: (T-1) times. (1) 0 In addition, the proposed device requires storing only 1/3 of the total number of random process sample values, which allows reducing the capacity of memory block 3 by three times.

Claims (1)

Claim A device for determining the characteristics of a random process, containing a quantization unit, the first input of which is the input of the device, and the output is connected to the input of the memory unit and the first input of the comparison circuit, the output of which is connected to the first input of the hypothesis analysis unit, the unit for setting the initial conditions, the first. " ^! the output of which is connected to the first 'input of the control unit, the second input of which is connected to the output of the clock generator, characterized in that, in order to increase the speed of the device, 15, a switching unit and an And element are introduced, the output of which is connected to the second input of the quantization unit, the first input is with the output of the clock generator, and the second input of the And element 20 is connected to the first output of the control unit, the second and third outputs of which are connected respectively to the control inputs of the unit switching and comparison circuits, the second input 25 of which is connected to the output of the switching unit, the information input of which is connected to the output of the memory block, while the second output of the unit for setting the initial conditions is connected to the input circuit the input of the hypothesis analysis block.