SU757997A1 - Analogue-digital device for determining relative difference and the ratio of two voltages - Google Patents

Description

The invention relates to electronic measuring equipment and can be used to control the parameters of electronic circuits and their elements.

A device for controlling the difference in the sequence of voltages is known, which contains a compensator, a code-analog converter, threshold devices, a comparison circuit, keys and triggers £ ΐ].

The device determines the difference of the voltages supplied in series at its input in analog form.

The disadvantage of the device is its complexity and as a consequence of low reliability, as well as narrow functionality as it determines only the difference of the input voltages in absolute units.

It is also known a device containing an integrator, the output of which is connected to the input of the comparison element, the generator of the reference frequency, a counter, a toggle key, and a control unit, which includes three flip-flops and three logic gates And £ 2].

The device determines the deviation of the input signal from the reference, in digital form, in absolute units.

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The disadvantage of the device is its complexity and narrow functionality, since the device determines only the deviation and only 5 in absolute units.

The aim of the invention is to enhance the functionality and simplify the device.

This goal is achieved due to the fact that in a device containing an integrator, the output of which is connected to the input of the comparison element, a reference frequency generator, a counter, reversible key, three flip-flops and three 15 logic gates And, the counter is reversible, one input of the reversible key with the input signal terminal and the integrator input, another key input is connected to the 20 second input signal terminal, and the key output is connected to the input of the reference element, the output of which is connected to the control unit, and the reversible counter is connected to the gene a reference frequency controller, with a bus, "division * and" add "," subtract "and" reset "tires of the control unit; the outputs of the reversible counter are connected to the inputs of the first element, And,

30 output of which is connected to the unit

one

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control, in addition, the outputs of the control unit are connected to the integrator and reversible key.

In addition, the control unit is made in the form of two pulse formers and an OR element, the input of the first driver is connected to the start ¹ 'bus and the first OR element, the driver output is connected to the input of the first trigger and the reset bus, another input of the first trigger is connected to the input the second trigger, and the third input of the first trigger is connected to another input of the OR element, to another input of the second trigger and one of the inputs of the second element AND, the other input of which is connected to the output of the third trigger and one of the inputs of the third element the stroke of the second element And is connected to the input of the second driver, the output of which is connected to the third input of the second trigger, another input of the third element I. is connected to the input of the first trigger and the output of the control unit, the inputs of the installation of all the triggers to zero are connected to the reset bus.

The drawing shows a block diagram of the device. It consists of an integrator 1, in which quality there can be an integrating DC amplifier with a key of parallel-integrating capacitance, reference element 2, reversible key 3, reversible counter 4, first element 5, generator of reference frequency 6, control unit 7 "V the control unit consists of pulse shapers 8.9, triggers first 10, third 11, second 12, And third elements 13, 14 second, OR 15 elements, input terminals 16,17, division signal terminal 18.

The operation of the device is as follows. In the initial state, the circuit is driven by a pulse "reset", the output of the integrator 1 is the maximum potential, the key 3 is in the normally closed position, the triggers 10 and 12 are in such a state that their output signals prohibit the operation of the counter 4, the counter 4 is reset in "0". The trigger 11 gives the resolving potential on the elements And 13 and 14.

When determining the relative difference of input voltages after the impulse "reset" is applied, the device returns to its original state. On the bus "division" zero potential. With the arrival of an impulse "start", integrator 1 is reset to the zero state via the element OR 15. The trailing edge of the "start" pulse, the shaper 8 generates a pulse arriving at the split input of the trigger 1C. The trigger 10 enters the state when

which its output signal through the element Re 13 switches the key 3 to another position, as a result of which the input of the comparison element 2 'is connected to the input terminal 16. The counter 4 from the trigger 10 receives permission for the counting of generator pulses 16 via the summing input.

At the same time, the integrator 1 begins to integrate the input voltage, as a result of which an increasing linear voltage appears at the output. The magnitude of this voltage at any time interval ι

V = - (y = - _ν

Output ВΛ I / 81 tons I

about

where T is a constant integrator 1;

output voltage applied to input 16.

With the passage of time ι there comes a moment at which the condition will be fulfilled

T ^ VX V " ¹ ·

Comparison element 2 at this moment produces a pulse, which flows through the element OR 15 to the reset input of the integrator 1, to the inputs of the flip-flops 10 and 12. The trigger 10 goes to another State and generates a inhibitory signal to the input of the element And 13 and to the input of the counter 4 , prohibiting the summation of generator pulses 6.

In addition, the impulse from the comparison circuit arrives through the element I 14 to the input of the imaging unit 9. The latter generates a short impulse from the trailing edge of the impulse, which arrives at the trigger points 11,12 and translates them into another state. The trigger 11 generates a prohibitory signal on the elements And 13 and 14.

At this time, the counter 4 will contain a certain number of pulses corresponding to the ratio C / T. The trigger 12 is set in such a position that its output signal permits the arrival of pulses from the generator 6 to the subtracting input of counter 4. The trigger 10, however, switches the key 3 to its initial state with its output potential, as a result of which another input terminal 17 is connected to the input of the comparison circuit 2 signal.

The integrator integrates the input voltage and _{& x1} . At its output, the voltage that will be applied to the input of the comparison element 2 will linearly vary.

Consider the time for the case when D _6M > and _in where where _{& hg} is the input voltage supplied to the input 17.

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Over time, момент there comes a time when the condition

Comparison element 6 at this moment generates a pulse, which comes through Element OR 15, to the reset input of the integrator, to the inputs of the flip-flops 10 and 12, and to the input of the And 14 element. The status of the flip-flop 10 does not change, because its input has already arrived .

The impulse will not pass to the output of element 14, since the inhibitory potential from trigger 11 arrives at the other input of this element. Trigger 12 is transferred by impulse of element 2 to another state, prohibiting the arrival of pulses from generator 6 to the subtracting input of counter 4.

The counter will be in the number of pulses equal to

ΔΝ = Ν ₁ –Ν ₂ = ί ₁ 1-1 ₂ £, ( ³ )

where Ν ₄ is the number of pulses arriving at the summing in Turn counter;

N2 “number of pulses received at the subtracting input of the counter;

ί and 1 _g is the integration time until the conditions (1? and (2) are met, respectively;

ί - oscillator frequency 6. Equation (3) can be rewritten with

considering (1) and (2)

From (k) it is clear that the device allows us to determine the deviation with respect to and _BX1 , since T is a constant value.

_{Consider the} case when υ _{Β χ1} ··: υ _{0 χ2} In this example, the condition N 2> Ν ι will be satisfied.

Before the moment comes when equality (2) holds,

counter 4 will go to zero. This moment will register the first element And 5, which will transfer the triggers 10 and 12 to another state with its output signal. In this case, the trigger 12 causes the arrival of pulses to the subtracting input of the Counter, and the trigger 10 gives permission for the passage of pulses to the totalizing input of the counter. Counter 4 will sum the impulses arriving at its input up to a point in time when condition (2) is fulfilled and the comparison element generates a pulse that transfers trigger 10 to another state.

The counter will contain the number of pulses, determined by equality (4), the device determines the deviation of two signals, regardless of what sign carries this deviation. To distinguish the sign of the deviation, you can use the signal from the output of the first element And 5.

When determining the relationship of the two voltages, the device is also reset to its initial state by applying a “reset” pulse. Potential bounce is applied to the potential at which the key 3 connects the voltage of the input element 2 of the comparison element 2 and _6x2 from the terminal 17 and the impulse from the generator 6 to the subtractive input of the counter 4 is prohibited.

With the arrival of "start" pulses, the integrator through the element OR 15 is reset to the zero state and through the driver 8, the trigger 10 is set to such a position that allows its output potential to sum the pulses with counter 4. The integrator begins to integrate the voltage υ _{& x A} acting on terminal 16 As time passes, a moment comes when equality holds.

where ί is the time of voltage integration and _{in 4} before the onset of equality. At this point, the comparison element 2 generates a pulse arriving through the OR element 15 to the integrator's reset input, to the trigger inputs 10 and 12 and to the second element 14. The trigger 10 is transferred by the pulse to another state in which it prohibits the summation of the pulses of the generator 6 by the counter 4 The impulse from the driver 9 will transfer the trigger 11 and 12 to another state, however, these triggers will not have any effect on the key 3 and the counter 4, since the signal from the bus "division" has a predominant effect on the key and the counter.

At the moment of performing equality (5) in the counter 4 there will be the number of pulses

N ". ΐ ί, (θ;

where 1 is the frequency of the generator 6.

Equation (6) can be rewritten with the expression (5)

Considering that T-ί copes from the equation

(7) It can be seen that the device determines

ratio of two voltages to digital

form.

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Claims (2)

Claim 1. An analog-digital device for determining the relative difference and the ratio of two voltages, containing an integrator whose output is connected to the input of the reference element, a reference frequency generator, a counter, a flip key, three flip-flops, three logical elements AND, differing from i, so 'that, in order to expand functionality ustroyst- ¹ va and its simplification is made reversible counter, one input coupled to the tumbler key signal input terminal and the input of the integrator, the other input of switch is connected to the other input terminal 15 signal, and the output is connected to the input of the comparison element, the output of which is connected to the control unit, the reversible counter is connected to the generator of the reference frequency, with 20 bus "division" and with tires "addition", "subtraction", "reset" of the control unit, the outputs of the reversible counter are connected to the outputs of the first element I, the output of which is connected to the control unit 25, in addition, the outputs of the control unit are connected to the integrator and flip key. 2. The device according to π.1, about τ l and that with the fact that the block is made in the form of two pulse shapers and an OR element, the input of the first driver is connected to the “start” bus and the OR element of the driver is connected to the input of the first trigger and bus "reset", another input of the first trigger is connected to the input of the second trigger, and the third input of the first trigger is connected to another input of the OR element, to another input of the second trigger and one of the inputs of the second element And, the other input is connected to the output of the third trigger and one from the inputs of the third ale The input And, the output of the second element And is connected to the input of the second driver, the output of which is connected to the third input of the second trigger, another input of the third element And connected to the input of the first trigger and the output of the control unit, the inputs to zero all triggers are connected to the reset bus.