SU849236A1 - Analogue-digital integrator - Google Patents

Description

(54) ANALOG-DIGITAL INTEGRATOR

one

The invention relates to hybrid computing and can be used in the construction of hybrid computing devices, information-measuring and computing systems and complexes.

A device for integrating a series-connected analog integrator is known. a comparator, a reversible counter, a digital-to-analog converter, the output of which is connected to the first input of the adder, a source for setting initial conditions and a source of a control signal, a control unit whose input is connected to the output of the adder, and another one with a control source of the signal, an additional analog integrator keys, the output of the adder is connected via the first key to the input of the analog integrator and through the second to the input of an additional analog integrator, the output of which is connected to the second input of the cSMMaTopa, t The third input of the accumulator is connected to the initial condition source, the control signal source is connected to the third key control input and the meter installation input to the zero position, and the control unit outputs are connected to the control inputs of the first and second keys and the control input analog. integrator

The closest in technical essence to the invention is the in-

4p voltage strainer containing

serially connected integrating amplifier and comparing device, keys, through the first key the input of the integrated amplifier is connected to the input of the device, and through

15 second and third keys - with sources of reference voltages, coincidence circuit, time measurement circuit, control trigger, single output of which is connected to the control input of the first key, input of the first circuit

20, the match is directly connected to the output of the comparator and the output of the measurement circuit, and the input of the second coincidence circuit via

25, the integrator and the permitting inputs of the matching circuits are connected to the zero output of the trigger, and the outputs to the control inputs of the second and third keys, the input of the time measurement circuit is connected

30 dinene to the input of the trigger control 2.

The disadvantages of the known integrators are the significant integration error associated with the mismatch between the end of the integration interval and the end of the physical process, as well as limited functionality

The purpose of the invention is to improve the accuracy of integration and enhance the functionality by automatically determining the sign of the integral.

The goal is achieved by integrating an integrating amplifier whose input is connected to an analog-digital integrator through a first switch, to a source of reference voltages through a second and third switch, and connected to the first input through a fourth switch the first comparing device, the second input of which is with a zero potential bus, and the output to the first input of the control trigger, the first and second elements and the first inputs of which are connected to the outputs of the trigger control, and the outputs are connected to the control inputs of the second and third keys, contains a character trigger, drivers of a given and real integration time, a reversible counter, the third and fourth elements And the second comparison device, the inputs of which are connected respectively to the source of the reference voltage and the output of the integrating the amplifier, and the output is connected to the second input of the control trigger, the outputs of which are connected respectively to the first inputs of the third and fourth elements And, the second inputs of all the elements Both s and the control input of the fourth key are connected to the first output of the real time integrator shaper, the first input of which is connected to the single control trigger output, the second input to the first shaper output of the specified integration time, the second output of which is connected to the control input of the first key, and the third output is connected to the clock inputs of the control trigger, the sign trigger and the third inputs of the third and fourth elements AND, the installation inputs of the control trigger and the sign are reverse About the counter and the real and predetermined integration time formers are connected to the installation input of the analog-digital integrator, the control inputs of which are connected to the inputs of the generator of the specified integration time, the inputs of the reversible counter are connected to the outputs of the third, its fourth and fourth elements, the first. to trigger state inputs

the sign, the output of which is a sign output, and the other outputs of the reversible counter - information outputs of the analog-digital integrator,

In addition, the real integration time driver contains a delay element, a pulse driver, an AND element, an OR element and a trigger, the input of which is set to zero through the OR connected in series, the AND element and a pulse shaper are connected to the first input of the real integrated time driver, And is the second input of the real time integrator, the input of the delay element is connected to the second input of the OR element and is the third input The actuator has a real integration time, the output of the delay element is connected to the input of the installation in the trigger unit, the unit output of which is the output of the real time integrator.

Figure 1 shows the functional diagram of the analog-digital integrator; Fig. 2 is a diagram of the real integration time generator; figure 3 - timing diagrams.

The analog-to-digital integrator contains an integrating amplifier 1 connected in series with the inverting input of the first 2 and the non-inverting input of the second 3 comparing devices; keys 4-7; through the first switch 4, the input of the integrating amplifier 1 is connected to the input 8 of the device, through the second 5 and third 6, respectively, to sources 9 and 10 of the voltage, and through the fourth switch 7, the output of the integrating amplifier is connected to the input; control trigger 11; four elements 12-15 AND / outputs of elements 12 and 13 AND are connected respectively to the control inputs of the second 5 and third b keys, and the outputs of elements 14 and 15 И to the summing and subtracting inputs of the reversible counter 16; trigger 17 characters; Formers of a given 18 and real 19 integration time.

The inverting input of the second comparing device 3 is connected to the input bus 20 of the integrator, and the output to one of the control trigger inputs. 11, the second input of which is connected to the output of the first comparator device 2. The unit output of the control trigger 11 is connected to the first inputs of the first 12 and fourth 15 elements AND of the real time integrator 19, and the zero inputs to the first inputs of the second. 13 and the third 14 of the element I. The second inputs of the elements 12-15 And connected to the output of the former 19

The first output of the imaging unit 18 is connected to the control input of the first key 4, the second output is connected to the clock inputs of the flip-flops 11 and 17 and the third inputs of the elements 14 and 15 And, the third output - to the second input of the imaging unit 19, one short-circuit input with the third input driver 19, input bus 21 analog-to-digital integrator, the input of the installation to zero of the reversible counter 16 and the trigger 11 and the installation of the unit in the unit of the trigger 17, the other inputs - with; control buses 22 analog-digital integrator-. The summing and subtracting inputs of the reversible counter 16 are connected to the outputs of elements 14 and 15, the output buses to the output buses 23 of the analog-digital integrator, and the outputs of overflow and zeroing, respectively, to the first and second inputs of the trigger 17, whose single output is connected to the sign output 24 of the analog -digital integrator.

The real integration time driver (FIG. 2) co-holds the delay element 25, pulse generator 26, element 27 AND, element 28 OR, and trigger 29. Input of setting trigger 29 to the zero through the serially connected element 28 OR and element 27 AND The 26 pulses are connected to the first input of the former 19. The second input of the element 27 I is the second input. (shaper 19. The input of element 25 is connected to the second input of element 28 OR and is the third input of shaper 19. The output of element 25 is connected to the input of the unit in trigger unit 29-, the single output of which is the output of shaper 19.

The integrator works as follows. in a way.

In the initial state, the pulse П, supplied to the installation input 21 of the analog-digital integrator, sets the trigger 17 to the state, and all other triggers to the state o. Keys 4-6 open .ty, key 7 is closed. The capacitor of the integrating amplifier 1 must be discharged in a time equal to the duration of the pulse Pj. After the end of the pulse P begins the integration process. The control inputs of keys 4 and 6 are fed with an enable signal, respectively, from the first output of the imaging unit 18 and the second element 13 I. The keys 4 and 6 are closed, the key 7 is opened. The integrator integrates the voltage U, applied to the input 8 of the device and the voltage - and o, coming from the source 10 of the reference voltage. If a

the voltage U at the output of the integrating amplifier 1 is greater than the voltage and, applied to the inverting input 20 of the second comparator, the signal from the output of the comparator 3 sets the control trigger 11 to the state

. As a result, key 6 opens and key 5 closes. In this case, the voltage Uy is applied to the integrator from input 8 of the device and

0 +0 voltage coming from source 9.

If the UK voltage at the output of the integrating amplifier 1 is negative, then the signal from the output of the first comparator device 2 sets

5, the trigger 11 is in the state of 1., and thus the voltage () is first initially integrated, and then (). Since Uv, (t) (fig.Za),

0

T .. (t) dt + h ,,, (t) dt.o,

where i and i ,, are the input currents of the integrator, respectively, on the first, O, t and second

5 t, t2 integration intervals.

If we assume that, and tj-t At, j (fig.Za), after the known transformations get i and (t) (At.,).

0

If for a given integration time Tg

complete n full cycles

integrating then

; ° u, (t) V- ,; i.ai

(bt. -uto;).

However, it may turn out that the end of the integration interval does not coincide with the end of the last clock cycle (Fig. 36, c). Due to this, an inaccuracy appears that corresponds to the voltage value at the integrator output at the instant of time

UU (TC

This error may

AND

5 to be eliminated. If, after a given TQ interval, the integration process is continued with the device input 8 turned off until the voltage Oc at the integrator output becomes zero. For this purpose, an additional integration time is introduced in order to complete the last integration cycle (at time T).

Thus, the integral value .J ° U) ((t) dt is determined at time T, i.e., somewhat later than the specified integration time TO

1and (t) Ut; -bt2;) J u (t) dt

o - tin

ol l ogch

0

where is the end of the last (nth) integer cycle.

l (n-ti | TO. TU

5 () dt - (- f (U.x + Uo) dt + J. -It r "lo

Claims (2)

1. Analog-to-digital integrator, containing an integrating amplifier, the input through the first key is connected to the input of the analog-digital integrator, through the second and third. keys - with sources of reference voltages and through a fourth key connected to the output of the integrating amplifier connected to the first input of the first comparator, the second input of which is connected to the zero potential bus, the output to the first input of the control trigger, the first and second elements And the first inputs which are connected to the outputs of the control trigger, and the outputs are connected to the control to the inputs of the second and third keys, characterized in that, for the purpose of increasing the accuracy of the integration of the expansion of functional possibilities spit five 2. The integrator according to claim 1, of which is that the driver of the real time of integration contains a delay element, a driver of pulses, g element AND, element OR and trigger the input of which is set to zero through the series-connected OR element, AND element and pulse generator is connected to the first input of the real integration time generator, the second input of the AND element is the second input of the real integration time generator, the input of the delay element is connected to the second input f of the OR element and the third input of the real time integrator shaper, the output of the delay element is connected to the input of the installation in the trigger unit, the unit output of which is an account of the automatic determination of the integral sign, it contains a sign trigger, shapers of a given and real integration time, a reversible counter, the third and fourth And elements, and a second comparison device, whose inputs are connected to the reference voltage source and the output of the integrating amplifier, respectively the output is connected to the second input of the control trigger, the outputs of which are connected respectively to the first inputs of the third: its And fourth elements And, the second inputs of all And elements and the control input of the fourth key is connected to the first output of the driver of the real integration time, the first input of which is connected to the single output of the control trigger, the second input to the first output of the driver of the specified integration time, the second output of which is connected to the control input of the first key, and the third the output is connected to the clock inputs of the trigger, control, sign trigger and the third inputs of the third and fourth elements And, the installation inputs of the control triggers and the sign of the reverse with A smart drive and real and predetermined integration time formers are connected to a setup input of an analog-digital integrator, the control inputs of which are connected to the second inputs of a predetermined time generator, integration, and the inputs of the reversible counter, are connected to the outputs of the third and fourth elements, first and second - to the inputs of the state of the sign trigger, the output of which is a sign output, and the other outputs of the reversible counter - information outputs of the analog; digital integrator. real time integrator shaper house. Sources of information taken into account in the examination USSR certificate 06 G 7/18, 1977. USSR certificate 06 G 7/18, 1975 L