SU744704A1 - Decoder - Google Patents

Description

(54) DEFINER

The invention relates to telemetry and can be used in multiple systems for transmitting and receiving information. Known decoders, sotsheraschie matrix, pulse generator, the elements And, triggers l. The device has a rigid structure due to the use of a matrix, which does not allow it to be used for decoding various types of code messages. The closest in technical terms is the decoder, which contains a set of triggers according to the number of interpretable parcels, the outputs of each of which are connected to the outputs of the device, the first inputs of the triggers are connected to the reset bus, and the AND elements. This device cannot be used in multi-purpose equipment, since measuring a set of interpretable code parcels will entail a restructuring of the circuits. The purpose of the invention is to expand the functionality of the device. : - i-. The goal is achieved by the fact that in the decoder containing a set of triggers by the number of interpretable parcels, the outputs of each of which are connected to the outputs of the device, the first inputs of the triggers are connected to the Reset bus; shift registers, pulse generator, AND elements, are entered into the input block in synchronization and counters by the number of interpretable parcels, the device input is connected to the input of the data input block and synchronization, the sync output of which is connected to the generator: pulses, output The data input and synchronization unit is connected to the first inputs of the elements I, the second inputs of which are connected to the outputs of the respective shift registers, the clock inputs of which are connected to the outputs of the clock pulse generator; the outputs of each of the elements AND

through the corresponding counter is connected to the trigger inputs, the output of each shift register is connected to its output.

The drawing shows a block diagram of the proposed device.

It contains 1 - 1 triggers, 2f - 2fl counters, AND 3f elements, 4p shift registers, data input and synchronization block 5, and 6 clock pulses.

The device contains a set of M triggers for the number of decoded code parcels, which ensure the fixation of the result of decoding. The reception of each code parcel corresponds to one state of the corresponding trigger: the first parcel - the first trigger 1, and - and the parcel - the n-th trigger i. The second state of the triggers is the initial state and is provided by the Reset signal. Triggers are transferred to the working state, the overflow pulse is output from the output of the corresponding binary counters 2Y - 2f. Binary counters 2 - 2f are designed in such a way that each of them overflows at the entrance to the input of K pulses, where is the number of bits in the code message. Pulses arrive at the inputs of binary counters from the outputs of the corresponding elements AND 3f - 3C 1. The output pulse of the elements AND appears only with simultaneous receipt of pulses at their inputs. At one of the inputs of the element And the pulse comes from the output of the corresponding shift register 4 4f | . Each of the shift registers contains one of the decoded code messages. The second input of the AND 3–3 elements is received in parallel with the pulses of the received code message from the output of the data input and synchronization unit 5 in the same order as the pulses of the code messages from the output of the corresponding registers. The pulses recorded in the shift registers of the code parcels are received on their outputs when 6 clock pulses arrive at their clock inputs from the generator output. In order to ensure synchronization of the arrival of the pulses of the received code parcel from the data input and synchronization block 5 and from the outputs of the shift registers 4f4f) to the corresponding inputs of the I 3 - Rear elements of the clock generator

synchronized by a signal from a data input and synchronization unit. An overflow pulse appears at the output of a binary counter connected through an AND element to a register, which contains the code message that matches the received one. Saving the code send record in the shift registers is provided by connecting the outputs of the register

shift with their inputs.

When changing the set of decrypted code messages, it is enough to change the original entry in the shift registers, there is no need to structurally change the decryption device, which allows the use of the proposed decryption device in a unified multi-purpose equipment.

Claims (2)

1. USSR Author's Certificate No. 419886, cl. G, 06 F 5/02, 1974. 2. USSR author's certificate number 557403, cl. G, 08 C 19/28, 1975 (prototype). Output