SU661255A1 - Electronic frequency relay - Google Patents

Description

one

The invention relates to measurement technology, control devices with automatic operation at a certain rotational speed, for example, automation devices that control the rotational speed of a hydraulic unit during its start, stop and acceleration.

A frequency relay is known, which is based on the principle of comparing the duration of a voltage period of a monitored network with a predetermined (reference) time determined by the required trigger setting flj. -; .-,

The disadvantages of this device are the dependence of the setpoint of triggering and releasing the relay on the ambient temperature, the supply voltage, and the absence of an adjustable hysteresis.

It is also known a device comprising a frequency divider connected via a driver to a signal source, an integrator, the first input of which is connected to the output of a frequency divider, and the second to the output of a relay element, a comparator connected by one input to the integrator's output, and the other to a reference voltage. and

connected in series between the output of the comparator and the input of the relay element one-shot and the drive of pulses

2

A disadvantage of this device is the instability of the setpoint of triggering and releasing the relay due to instability of the supply voltage, depending on the network voltage, ambient temperature, load and stabilizer drift, instability of the voltage drops on the output key elements of the frequency divider depending on temperature environment and instability of the reference voltage adjuster.

; The purpose of the invention is to improve the stability of the settings for triggering and releasing the frequency relay.

The goal is achieved in that an electronic frequency relay containing a frequency divider, whose input is connected to a signal source, a comparator and a serially connected pulse drive and a relay element through a shaper, is inserted into an RC bridge, a logic unit and a hysteresis generator, and to the same diagonal RC bridge

the first inputs of the logic unit and pulse niopitel are connected to the output of the frequency divider, the inputs of the comparator are connected to the second bridge, the output of which is connected to the second input of the logic unit, the output of the logic unit is connected to the second input of the pulse accumulator, and the output of the relay element is connected to the output hysteresis unit RC bridge.

FIG. 1 shows a block diagram of the proposed frequency relay; in fig. 2 is a simplified schematic diagram of the main part of the relay.

The source 1 of the signal through the driver 2 and the frequency divider 3 is connected to RC bridge 4. The RC bridge output is connected via co-coupling 5 to one of the inputs of logic unit 6, the other input of which is connected to the output of the frequency divider and one of the inputs of the accumulator 7 pulses. The second input of the accumulator is connected to the output of the logic unit, and the output of the accumulator through the relay element 8 and the block 9 of the hysteresis formation is connected to the RC - bridge.

To increase the noise immunity of the frequency relay, the drive of 7 pulses is expediently performed in the form of two counters, with the counting input of the first connected to the output of the splitter 3 frequency; and the setup inputs to the output of logic unit 6, the counting input of the second is connected to the output of logic unit 6, and the setup inputs are connected to the output of one of the intermediate triggers of the first counter. The outputs of the counters are connected to the installation inputs of the relay element 8.

The operation of the proposed frequency relay can be illustrated by the example of a specific implementation. The RC bridge includes a capacitor 10 and resistors 11-13. The resistor 12 adjusts the pick-up setting (with increasing frequency), and the resistor 13 adjusts the hysteresis. The logic block contains inverters 14 and 15. The accumulator is made in the form of two counters 16 and 17, and the relay element in the form of an RS flip-flop consisting of elements Y – HE 18-19. The hysteresis block is assembled with transistors 20 and 21, which can bypass the bridge resistor 13.

Let the measured frequency be less than the relay setting. In the half period of the voltage that arrives at the RC bridge from the frequency divider, the capacitor has time to recharge from to the potential level on the slider of the resistor 12, and the comparator 5 is activated, the pulses of a logical unit will appear at the output of the inverter 15. These pulses are reset every time

the counter 16 is zero, and the counter 17 operates in a frequency divider mode and periodically confirms the state of the RS flip-flop, the output of which (output of element 19) is a logical zero. At the same time, transistors 20 and 21 are open, and resistor 13 is shunted by an open transistor channel 21.

If the measured frequency is higher than the relay setpoint, the capacitor 10 does not have time to recharge before the comparator trigger threshold, and the reset pulses from the logic unit

do not come nh. the counter 16, the latter is switched to the frequency division mode of the main pulses and in the process of their counting performs a periodic reset of the counter 17 to zero. The outputs of the counters are connected to the setup inputs of the RS flip-flop, which

records the situation of overflow of counter 16 by changing the output signal level. Using an RC bridge greatly improves the stability of performance. As a result, it is less necessary to adjust the frequency settings.

Claims (2)

 1. Electric stations M., “Energie, 1974, -№ 11, p. 70-72. 2. Electric stations M., “Energie, 1976, No. 6, p. 63-65. iJfwSiJ lr DH FIG. 2