SU660193A1 - Automatic phase synchronization arrangement - Google Patents

Description

control inputs of both keys with memory blocks, and the second input to the output of the first threshold unit, the output of the control unit is also connected to the control input of the phase maniaultator, and the second threshold unit is connected between the output of the low-pass filter and the other input of the OR element.

The drawing shows a structural electrical circuit of the proposed device.

The automatic phase synchronization device contains a phase keypad 1, an in-phase phase detector 2, a low-pass filter 3, a controlled oscillator 4, a phase-out 1 on / 2, a quadrature phase detector b, the first threshold unit 7, the second threshold block 8, trigger 9 , the controlled phase shifter 10, the first key 11 e by the memory unit 12, the second key 13 with the memory unit 14, the control unit 15 and the OR element 16.

The device works in the following way.

The input clock signal through the phase manipulator 1 and the controlled phase switch; the holder 10 goes to the signal inputs of the in-phase and quadrature phase detectors 2 and 6, where it is compared in phase with the signal of the controlled oscillator 4. Since the signal of the controlled generator 4 goes to the quadrature phase the detector 6 through the phase shifter 5 on / 2, then the positive voltage at its output corresponds to the operation of the in-phase phase detector 2 in the phase locked loop containing the in-phase phase detector 2, f low-pass filter 3, the first key 11 with a memory block 12 and a controlled oscillator 4 on a stable branch of the characteristic. If the voltage at the output of the quadrature phase detector 6 is negative, the output signal of the control unit 15 acts on the phase manipulator 1, thus the in-phase phase detector 2 is transferred to a stable branch of the characteristic. At the same time, the signal from the output of the control unit 15 through the OR element 16 acts on the first input of the trigger 9, which locks the first key 11, which opens the loop of the phase-locked loop of the controlled generator 4, and opens the second key 13. Through the second key 13, the voltage from the output of the quadrature phase detector 6 is supplied to a memory unit 14, the output of which acts on the controlled phase shifter 10 in such a way that the positive output at the output of the quadrature phase detector 6 increases. When this voltage reaches the maximum negative value, the nerve threshold unit 7 is triggered and the trigger 9 closes the second key 13 and opens the first key 11, which closes the loop of the phase-locked loop of the controlled oscillator 4. Then the linear process of adjusting the controlled oscillator 4 begins, since searchless instability controlled oscillator 4 MSNI sync band.

Increasing the phase difference of the input clock signal and the signal of the controlled heater 4 to the value of the larger threshold of the second threshold unit 8 (but less than / 2) leads to an increase in voltage at the output of the filter 3 and the Bioporo processing unit of the threshold unit 8. Its

The signal through the element ILR1 16 affects the nerve input of the trgger 9 and establishes its 15th state, in which the oiincainujii BbiHie process of initial setting of the operating mode is repeated.

Due to the fact that the phase-locked phase detector 2 of the phase-locked loop operates on a stable branch of the characteristic in the device, it is ensured that the first frequency overshoot in the controlled oscillator 4 and the capture bandwidth of the filter 3 are different. The proposed device reduces

the timing of the acquisition of the acquisition and tracking in linear mode.

Ф о 1 м у л а and 3 о б r e te e} i and

An automatic phase synchronization device containing a phase mannpulator, serially connected in-phase phase detector n frequency filter, serially connected controlled oscillator, the output of which is connected to d) porio, that input C11pphase phase detector, pa / 2 phase shifter, quadrature phase detector, second

the input of which is connected to the signal input of the in-phase phase detector, the first noporoubtfi block, and the second threshold block n TptHTcp, which is HI e so that, in order to reduce the time

synchronization, a controlled phase detector between the phase manipulator output and the in-phase phase detector signal input is entered into it, the first key with the memory block between

a low-pass filter and a controlled generator, a second key with an Itami unit between the output of the quadrature phase detector and the control input of the controlled phase shifter, the serially coupled emission unit and the OR element between the output of the quadrature phase detector at the first trigger input, whose output and output terminals are connected to the inputs of the quadrature phase detector both keys with a memory block, and the second input - to the output

the first threshold unit, the output of the control unit is also connected to the control input of the phase shift key, and the second threshold unit is connected between the output of the low-pass filter and the other input element; that OR.

Sources of information taken into account in the examination

1. Author's certificate of the USSR L 321961, cl. H 04L 7/02, 1970.

2. USSR author's certificate number 296212, cl. H Ozv 3/04, 1969,