SU641453A1 - Arrangement for diagnosis of electronic computers - Google Patents

Description

one

The invention relates to computer technology and can be used in computers to localize predicted failures.

A device is known for determining a computer operating area from a supply voltage l, containing control and voltage switching units, a control unit for an increment sign on an independent voltage, a display device, 10

The disadvantage of this device is that the switching of the power levels is carried out by the computer itself and all the computer equipment is involved in this process. In addition, diagnostic programs for detecting failures use all computer equipment, which makes it difficult to determine the cause of the failure and only makes it possible to establish that the computer is inoperable. 20

Of the known devices, the closest in technical essence to the invention is the device described in 2.

It contains a memory block, the output of which is connected to the input of the information register, the register of setting data and the decoder of operations, the inputs of which are connected to the output of the information register, the switch, the information inputs of KIJ, which are connected to the device input group, and the control input data and to the first output of the device, a status register, the information input of which is connected to the switch's WELL-IN, the control input to the first output of the decoder, and the output to the first input the house of the first comparison circuit, the control input of which is connected to the second output of the decoder, the output is connected to the first control to the input of the memory unit, the zone register, whose input is connected to the second input of the first comparison circuit, and to the first output of the device and the first input of the second Comparison circuits, the second entry of which is connected to the output of the zone register, and the code to the second control input of the memory unit, the third output of the decoder is connected to the second output of the device. This device allows at each stage a check of a small amount of hardware associated with the elementary operation being tested (micro-operation). In this case, only diagnostics block tools, which are small in volume (up to 1% of the volume of computer equipment), are used. Diagnostic microprograms (microdiagnostics) are loaded from small accumulators such as tape recorders, bends, K disks, etc. With the help of this device, high accuracy of calibration faults is achieved. However, this device does not allow the localization of the predicted, failures on the elements, which as a result of the segeney changed their parameters and serve as a potential source of failures, which leads to a deterioration of the maintainability of the computer. The aim of the invention is to improve the maintainability of a computer. The goal is achieved by inserting a professional control register into the device, the information input of which is connected to the first output of the device, the counter whose input is connected to the fourth output of the decoder, the first code of the counter is connected to the first control inputs of the decoder , the second output with the first input of the third comparison circuit, the second and third inputs of which are connected, respectively, with the second output of the setup data register and the fifth output the decryptor, the output of the third comparison circuit is connected to the control register control unit, the address selection block, the output of which is connected to the control input of the zone register, the first input connected to the quarter output of the decoder, the second input - to the first output of the register preventive control, the third output - with the second control, in the direction of the input of the decoder and the input of the device and the voltage level switching unit (the input of which is connected to the second output of the register of the preventive control. The drawing shows a block diagram of the device, which includes; memory block 1 with information register 2 on output; setting data register 3; operation decoder 4; the switch 5j group of inputs of the device 6j register preventive control 7j output device 8; comparison circuit 9; counter 10; voltage level switching unit 11; block address selection 12 with inputs 13, 14, 15; Device 16; state register 17, zone 18 register; comparison circuits 19, 20; the output of the device 21, the device operates as follows "From the control panel of a computer. (in the drawing NS is shown) the control monitoring mode is set up, the memory unit 1 is turned on and the magnetic tape reading begins, and microdiagnostics tests are performed. During the proficient test, each microdiagnostics test is performed several times with various combinations of power supply voltages supplying the equipment tested by the test. Codes of operations of the installation of register 7 are recorded in certain places of the microdiagnostic array. The distance between successive set-up codes of the register 7 on the magnetic tape is determined by the response time of the voltage level switching unit 11. Thus, the magnetic delay of the magnetic tape performs the role of an electronic clock. Since each microdiagnostics test is performed at different values of the power supply voltages, then before the register set operation code 7, register 3 accumulates the setting information, including the power supply address, power supply voltage change code, and pro number. the course of the test on which this information is valid. This provides an individual power source setting for each pass. The setup operations of register 7 are performed only in professional control mode. If this mode is not set, the corresponding outputs of the decoder 4 are blocked. The number of repetitions of the microdiagnostics test is counted on the counter 10. The increment of the contents of the counter 10 is performed according to the end code of the test, which is recorded at the end of the last test zone. During the first pass, the micro-diagnostics test in the prof. is performed at nominal values of power supply voltages {because the register 7 setup operations are blocked by the zero state of the low-order bit of the counter 1O, the data from the memory block 1, B receives information register 2 and then either register 3 or decoder 4, depending on the value of the least significant bit of register 2. The data from register 3 by exciting the corresponding information. the outputs of the decoder 4 are transmitted to the register of microcomputer microcommands (not shown), after which the execution of the microcommand is started. After the diagnostic microprogram is executed as described above, the state of the checked registers is interrogated and compared with the standard. The address of the register to be checked comes from the setup data register 3B of the switch 5, as a result of which the output of the switch 5 receives information on the state of the check register that is received in the state register 17 by driving the output of the decoder 4 corresponding to the reception operation code 17. After that, the magnetic tape in register 3 receives the reference value of the state of the register to be checked and the comparison code. The reference value of the register state to its actual value from the outputs of register 3 and the register-: 17 receives the circuit comparison 19, the output of the comparison circuit 19 is interrogated by the comparison operation code by bulling the corresponding output of the analyzer 4 If a coincidence occurs, the microdiagnostics test continues, and if the signal from the output of the circuit cp9 fails to match, the visas of the NIN 19 stop reading the microdigmy ticks of the memory block 1. A faulty trigger is determined by the indication of the sk.e. a comparison. If the test did not detect an inconsistency, at the end of the zones The test results in the content of counter 10 are increased by Ij Toe "at the end of the first pass in counter 10 is contained in 1. There are two addresses recorded in the zntz of the test zone on the lepton: the address of the next zone and the address of the test zone of the test. In the normal mode, t, e, when there is no professional control center, the address of the next zone is selected and the transition to the next zone is performed. When the address of the following aoHbi is accumulated, the sign of the prof-control mode blocks the transfer of the address of the zone's jailbreaker to the register 18. This blocking is performed in the address selection block 12, then in the register 3 the address of the initial zone of the test is accumulated and block 12 allows its reception in the register zones 18a. When the next zone is read, its address is sent to register 3 and compared to the contents of register 18 using the comparison circuit 20. As a result of the address mismatch, the comparison circuit 20 generates reverse linkage and returns to the beginning of the test and tsn rhenium. During the second and all subsequent msix evens, the low bit of counter 10 contains 1. The single state of the dead bit of counter 1 O blocks B1 microdiagnostics and allows execution of register set 7 operations. After accumulating information in the register 3 containing the address of the power source, the change code the voltage and the pass number of the testag at which this information is to be sent to register 7, the Tbi reads the operation code of the installation of regis- ter 7, if the coincidence of the pass number contained in register 7, and the number of the pass indicated in register 3, the comparison circuit O the signal set-.-: register 7i With the subsequent repetitions of the test m: 1 cdiadio; a; The execution of operations is determined by the collision of the younger one, the bit counts iuKa South as indicated above, Piejs ББББ81: gn; w; prophylaxis in the register re 7 sets the control signal which end is O; changes the effect of the test mode formation of the address of the transition from to -1tots: from address selection 12, the USSTER for diagnostics allows to increase the efficiency of the computer figure for the burden of proffacial control to the tergneziruyemyk malfunction of the G ; ld; 1 computer of the computer, which is connected to the unit of the PMU, the output of which communicates with the input of the information register, the register of setup data and the oneparivni descriptor, whose inputs are connected by the output of the information register, switch; . and fork2sh-: the on-line inputs of which one unit with a group of inputs of the device and the control input are pushed to the first step of the setup register, data and to the first 5 output of the device, the register of which is connected to the output of the switch, the control 5th V.KHOD ™ with the first output of the decoder, and the output with the first input of the first comparison comparison, the control input connected to the CD. the second output of the decoder, Bbrxeia secured with the first control input of the memory block, the zone register the course of which is connected to the first input of the first circuit. With the first exit

the house of the device and the first input of the second comparison circuit, the second input of which is connected to the output of the zone register, and the output to the second control input of the PATHTHI unit with the third output of the decoder connected to the second output of the device, characterized in that, in order to increase the maintainability of the computer, into it A preventive control register has been entered; its information input is connected to the first output of the device; a counter, the output of which is connected to the fourth output of the decoder; the first output of the counter is connected to the first control input; Ator, the second output - to a first ahodom third comparing circuit, second and third inputs which respectively coedinenyi to the second output register setting data and a fifth output decrypts packagings output of the third comparing circuit

connected to the control input of the preventive control register, address selection block, the output of which is connected to the control input of the zone register, the first input connected to the fourth output of the decoder, the second input - to the first output of the preventive control register, the third B. RUN - to the second control the input of the decoder and the input of the device and the voltage level switching unit, the input of which is connected to the second output of the register of preventive control.

Sources of information taken into account in the examination:

1. USSR Author's Certificate No. 291206, cl. G 06 F 15/46,

G 01 R 31/30, 1968.

2, US Patent No. 3586599, cl. 340-172.5, 1970.