SU613512A1 - Noise-like signal synchronization device - Google Patents

Description

one

The invention relates to radio engineering and can be used in communication systems of various purposes with noise-like signals requiring accelerated synchronization in conditions of powerful interference.

A device for synchronizing noise-like signals is known, comprising two multipliers multiplied together by one of the inputs, to the other inputs of which the corresponding outputs of the reference voltage generator are connected, as well as an adder, to the inputs of which the outputs of quadrants 1 are connected.

However, the known device has a large synchronization time and low noise immunity.

The purpose of the invention is to reduce synchronization time and increase noise immunity.

To do this, a device for synchronizing noise-like signals containing two multipliers combined by one of the inputs, to the other inputs of which are connected the corresponding outputs of the reference voltage generator, as well as an adder, to the inputs of which are connected the outputs of the quadrators, two integrators, two digital-analog converters , two analog converters, signal modulator, switch, threshold block, two shift registers, L drives, N -} - 2 additional adders, with

In this case, the output of each multiplier is connected via a series-connected corresponding integrator, analog-to-digital converter, shift register and one of additional adders, to the other input of which the input of the shift register is connected, is connected to one of the modulator inputs of the signals, the outputs of which are connected to the corresponding the inputs of the drives, the outputs of which are connected to another input of the respective additional adders and to the corresponding inputs of the switch, each output of which through the converter, a digital analogue is connected to the input of the corresponding quadrator, in addition, the output of the adder is connected to the input of the threshold unit.

The drawing shows a structural electrical circuit of the proposed device.

The device contains two multipliers 1 and 2 combined by one of the inputs, the other outputs of which are connected to the corresponding outputs of the generator 3 of the reference voltage, with the output of each of the multipliers 1 and 2 through the sequentially connected respective integrators 4, 5, analog-to-digit converters 6 and 7, the shift registers 8 and 9 and the additional adders 10 and I, to the other inputs of which the inputs of the shift registers 8 and 9 are connected, are connected to one of the inputs of the modulator 12 signals, the outputs of which through other additional total The holes 13 are connected to the corresponding inputs of the drives 14, the outputs of which are connected to another input of additional adders 13 and to the corresponding inputs of the switch 15, each output of which is connected to the input of the corresponding quad by 18 and 19 through the corresponding converters the inputs of the adder 20, the output of the adder 20 is connected to the input of the threshold unit 21.

The device works as follows.

The signal mixture and input input to the device are multiplied in multipliers 1 and 2 with a sinusoidal reference voltage and voltage shifted in phase by / 2, coming from the reference voltage generator 3. The signals from multipliers 1 and 2 are integrated by integrators 4 and

5, respectively, with the first and second channel samples shifted in time also by / 2 carrier oscillations. The obtained analog values of the integrals are digitized into a digital-to-analog converter.

6 and 7 and successively go to shift registers 8 and 9 and adders 10 and I. In adders 10 and 11, the current values of the integrals are added and the time delayed in the registers are subtracted by the duration of the elementary symbol of the wideband signal. In this way, in adders 10 and 11, like a sliding slider, the values of the product of the input signal and the voltage of the carrier frequency in the elementary symbol interval are generated at each step.

The obtained values are manipulated (multiplied by +1 or -1) in the modulator 12 signals with pseudo-random sequences that are offset in time subsequent relative to the previous one by the duration of the elementary symbol and are fed to the N corresponding adders 13 and accumulators 14. The number L corresponds to the number of elementary symbols in the pseudo-random sequences.

In the adder 13, the current number coming from the modulator 12 is added to the number recorded in the last digit of the accumulator 14, after which the numbers in the accumulator 14 are shifted, and the resulting sum is recorded in the first digit of the accumulator 14. Thus, by the beginning of the next cycle in drive 14, updated numbers are set corresponding to the numbers in the previous cycle.

The accumulation in each channel continues until the end of the corresponding pseudo-random sequence. Thus, in each channel, the values of the direct and quadrature components of the quadrature intercorrelation function of the input mixture and copies of the signal are obtained with a discreteness defined by the value of 6 TclNm., Where

Go - the duration of the signal. The obtained values are sequentially read by the switch 15, after which the corresponding bits of the accumulator 14 are brought to the initial state and the process is repeated.

The values of the direct and quadrature components of the correlation function are converted into analogue form by digit-analog converters 16 and 17, respectively, squared by quadrators 18 and 19, pairwise summed by adder 20, then the resulting quadrature correlation function is compared with the threshold threshold block 21, when raising the threshold, are sync pulses.

The proposed device, in comparison with the known one, has greater noise immunity, which affects the shortening of the search process.

Claims (1)

1. Pestrkov V. B. Phase radio engineering systems. M., “Owls. Radio, 1968, p. 282.