SU613326A1 - Digital data processing arrangement - Google Patents

Description

nalnyh opportunities of the device by providing prompt changes in the choice of problems to be solved.

. The goal set is up to: arises from the fact that a block of temporary stationary input, an additional switch and a constant writhing unit with electrical information change are entered into the device, the inputs of which are (Connected respectively to the outputs of the clock pulse generator and the correct address, the output through the additional switch is connected to the input (the command register, and the switch output through the time interval forming unit is connected to the control input dopol; itelnogo komedutato-ra.

The drawing shows a block diagram of the device.

It contains the generator / ta; ktovy pulses; a permanent storage unit 2 with an electric change and information, including a polling generation unit 3, a tip 4 "buffer register 5; block 6 of the formation of temporary and "intervals; base address register 7; 8 address register; switch 5; Permanent memorize tuff G; block 10, vl: foliated,. for example, in the form of a set of modules; Do1polN: Ttelny switch P; repistr 12 coma.nd; unit 13 microprogram m. outputs 14 devices.

The device works as follows.

The generator / clock imkulssv produces impulses, enters the block 13 and the node 3. Block 13, decoding the next i.call produced by the generator /, outputs a strong signal to the outputs 14 for the corresponding device - calculator, input device, output device. Lokazannyh on the drawing. Node 3 for switch 9 according to the state of the register 8 address and upon receipt of an input g, from the generator / clock, the pulse generates a polling signal. The information read from accumulator 4 enters the buffer (register 5.

P | Vyra rabobote blokko1M 13 Oi; G: nala olrosy, o; limit the circulation: to the switch 9, zAVSI, bridge, and from the state of register 7 there are two possible situations: appeal to the permanent storage unit 10 silt (and access to the block K | y 6 of the formation of temporary inters.

In the first (the signal of the olros passes through; kam; M.utator 9 and the input of the block 10.fia. Ijforma114k, read from the block y to the address stored in the register 8, is sent to the INPUT of the repistor / 2: omag; a .

In the BTQpOM case, the pattern to block 10 does not occur. The polling signal from the output of the com.mogaTOipa 9, having passed the block b of the form.irozan time intervals, p.o. pushes at the entrance to the mmutator //, for which this | CI signal serves as the transmission resolution and:) from the buffer repnstra 5 to the register 12 teams.

ormuida isoregeni

A device for processing digital data, which contains a generator of M-pulses and (M1 pulses, the output of which is connected to the input of the unit MCCA, control unit, outputs

which is connected to the inputs of the device and through the commutator to the u1. General input of the permanent storage unit, input: Commutta t.ora is connected to the output of the base address register, the address input of the constant storage unit is connected to the external address register, informational. outputs - with the appropriate & input of the register to & mand, characterized in that, in order to expand the functional possibilities by providing operative changes, a set of tasks is entered into it; 1: -: temporal dantersalosis, dapo Compatible switch and permanent locking unit with electrical change Information, inputs

which are connected respectively to the outputs of the clock generator and the address register, the output through the additional switch is connected to the input of the register of commands, the switch output through the f-cp unit

temporary iltvr-shafts connected to (control the input of the additional switch.

Sources of information accepted in understanding by Eckery:

but. US Patent L. E & 596.36, cl. 340-172.5, 1975.

2. US patent X9 3859-36, cl. 340-172.5. 1975.