SU514443A1

SU514443A1 - Reverse frequency divider

Info

Publication number: SU514443A1
Application number: SU2025714A
Authority: SU
Inventors: Валерий Иванович Кочергин
Original assignee: Предприятие П/Я Г-4514
Priority date: 1974-05-20
Filing date: 1974-05-20
Publication date: 1976-05-15

Description

1one

Изобретение относитс к импульсной технике , в частности к реверсивным делител м частоты, которые могут также служить счетчиками импульсов в двоичном коде и используетс в электроприводах переменного и посто нного тока, устройствах автоматики и вычислительной техники.The invention relates to a pulse technique, in particular to reverse frequency dividers, which can also serve as pulse counters in a binary code and are used in AC and DC electric drives, automation devices and computer equipment.

Известен реверсивный делитель частоты,содержащий каналы делени , каждый из каналов состоит из кольцевого делител частоты, каждый разр д которого выполнен на двух триггерах.A reverse frequency divider is known, which contains division channels, each of the channels consists of an annular frequency divider, each bit of which is performed on two triggers.

Однако известное устройство не обладает высокой надежностью работы.,However, the known device does not have a high reliability.,

С целью повышени надежности работы устройства в каждый канал делени введены четыре элемента И и два элемента ИЛИ, к входам которых попарно подключены выходы элементов И, при этом входы первого элемеита И подключены к инверсным выходам триггеров каждого разр да кольцевого делител частоты, выходы второго элемента И - к пр мым выходам триггеров, входы третьего элемента И - к инверсному выходу первого и к пр мому выходу второго триггеров, входы четвертого элемента И - к пр мому выходу первого и к инверсному выходу второго упом нутых триггеров каждого разр да кольцевого делител частоты.In order to increase the reliability of the device, four AND elements and two OR elements are introduced into each division channel, the AND element inputs are connected to the inputs of which, the inputs of the first AND element are connected to the inverse outputs of the triggers of each bit of the ring splitter, the outputs of the second AND element - to the direct outputs of the triggers, inputs of the third element I - to the inverse output of the first and to the direct output of the second triggers, inputs of the fourth element I - to the direct output of the first and to the inverse output of the second mentioned triggers Ers of each bit of a ring frequency divider.

На чертеже приведена электрическа структурна схема одного канала делени реверсивного делител частоты.The drawing shows an electrical structural diagram of a single channel dividing a reverse frequency divider.

Канал делени содержит кольцевой делитель 1 частоты на двух триггерах 2 и 3 с входными шинами 4-7, элементы И 8-11 и элементы ИЛИ 12-13.The division channel contains an annular frequency divider 1 on two triggers 2 and 3 with input buses 4-7, elements AND 8-11, and elements OR 12-13.

Реверсивный делитель частоты работает следующим образом.Reversible frequency divider works as follows.

Подачей сигнала на входную шину 4 кольцевого делител устанавливают триггер 3 в одинаковое положение с триггером 2, а подачей на входную шину 5 устанавливают триггер 2 в противоположпое положение с триггером 3. Подачей сигнала на входную шину 6 устанавливают триггер 2 в одинаковое положение с триггером 3, а подачей сигнала па входную шипу 7 устанавливают триггер 3 в противоположное положение с триггером 2.By applying a signal to the input bus 4 of the annular splitter, trigger 3 is set in the same position as trigger 2, and by triggering on the input bus 5, trigger 2 is set in the opposite position with trigger 3. Trigger 2 is set in the same position with trigger 3, and by applying a signal to the input spike 7, the trigger 3 is set in the opposite position with the trigger 2.

Цифры «1 в разр де определ ют с выхода элемента ИЛИ 12, входы которого соединены с выходами элементов И 8 и 9. Цифру «О определ ют с выхода элемента ИЛИ 13, входы которого соедппены с выходами элементов И 10 и 11.The numbers "1 in the discharge are determined from the output of the element OR 12, whose inputs are connected to the outputs of the elements AND 8 and 9. The figure" O is determined from the output of the element OR 13, whose inputs are connected to the outputs of the elements 10 and 11.

Claims

The operation of the division channel of the reverse frequency divider for the direct and reverse following of the input pulses is given in the table. When the pulses follow the input buses 4, 6, 5, 7, the first pulse arrives at the input P1inu 4 and sets the trigger 3 to the same position as the trigger

2. The digit 1 is recorded in the bit divider, and a signal appears at the output of AND 9. The next pulse arrives at the input bus 6 to set the trigger 2 to the same position as the trigger 3, but there is no switching, because the triggers are already in the same position. The next order pulse arrives at the input bus 5 and sets trigger 2 to the opposite position with trigger

3. At the splitter digit, the digit "O and the output of the AND 10 element is given a signal. When a pulse arrives at the input bus 7 to set the trigger 3 to the opposite position with the trigger 2, the circuit does not switch, since they are already set in the opposite position, etc. Therefore, non-switching in the discharge circuit occurs only when pulses arrive at the input buses 4 and 5, and on the output the digits "1 and" O appear periodically, which corresponds to the summation mode. 8 is the time at the outputs of the elements And 8 and 10, 9 and 11 appear signals in the sequence of input pulses, but with a frequency of two times lower. When the input pulses arrive at the input buses 7, 5, 6, 4, the first pulses that switch in the circuit are the pulses arriving at the input spikes 7 and 6, and the pulses arriving at the input buses 4 and 5 do not cause switching therefore, switching occurs in accordance with the table from bottom to top, and the digits “O and” 1 periodically appear at the output, which corresponds to the subtraction mode, while the outputs of the And 9, 10, 8 and 11 elements appear in the sequence of input pulses, but with a frequency of two times lower. Claims of the invention A reverse frequency divider containing dividing channels, each of the channels consists of an annular frequency divider, each bit of which is performed on two triggers, different from the fact that, in order to increase the reliability of the device, four elements And two OR elements, to the inputs of which the outputs of the AND elements are pairwise connected, while the inputs of the first AND element are connected to the inverse outputs of the triggers of each bit of the ring frequency divider, the outputs of the second element And to the direct outputs of you triggers moves, inputs of the third I element to the inverse output of the first and to the output of the second flip-flops, inputs of the fourth I element to the direct output of the first and to the inverse output of the second triggers of each bit of the ring splitter.

4 j

five

7

eleven

Lj

13