SU511683A1 - Sync device - Google Patents

Description

one

This invention relates to a measurement technique.

A synchronization device is known which contains a controlled oscillator, the input of which is connected to the output of the integrating amplifier, and the output to the input of the first one, and a matching device whose input is connected to the input source.

However, the large phase instability of the output signal with respect to the input signal is due to the presence of a variable component in the signal at the output of the filter despite the large time constant, as well as the change in voltage at the output of the filter due to the drift of the generator and trigger parameters.

In order to increase the phase stability of the output signals, two keys are introduced into the device, the outputs of which are connected to the input of the integrated amplifier dego amplifier, three coincidence circuits, the second trigger, the input of which is connected to the output of the matching device, and the delay device whose output is connected to the second input 1

the first and second triggers, and the input through the coincidence circuit to the first outputs of both triggers. At the same time, the opposite outputs of the above-mentioned triggers are connected, respectively, via the first and second coincidence circuits to the inputs of the first and second keys.

FIG. 1 shows a diagram of a pre-synchronization device; on fng. 2 4 - time diagrams of his work.

The proposed device comprises a matching device 1, an integrating amplifier 2, a controlled oscillator 3, triggers 4 and 5, a matching circuit 6-8, a delay device 9 decoupling switches 1O and 11.

Claims (2)

The output of the matching device 1 is connected to the single input of the trigger 4, the zero output of which is connected to: the inputs of the matching circuits 6 and 8, and the single output to the input of the matching circuit 7. The output of the controlled generator 3 is connected to the output signal bus and the single input of the trigger 5 whose single output is connected to the input of the matching circuit 6, and zero to the inputs of the matching circuits 7 and 8. The outputs of the matching circuits 6 and 7 of the unlock switches 10 and 11, respectively, are connected to the input of the integrating amplifier 2, the output of which is connected to the control eaten 3 for generators, and the output of matching circuit 8 via the delay circuit 9 - with well levp / w vhodak1i flops 4 and 5. The device operates as follows: In the initial state flip-flops 4 and 5 are in a single state. In the case of the arrival of a signal at the single input of the termination 4 from the output of the matching device 1 (Fig. 2a) before the pulse from the controlled oscillator 3 (Fig. 26) arriving at the single input of the trigger 5, the trigger 4 changes its state (Fig. 2c), and the signal from its zero output goes to the first input of the coincidence circuit 6, at the second input of which there is still a resolving potential from the single output of the trigger 5 (Fig. 2d). At the output of the coincidence circuit 6, a single signal is generated (Fig. 2e) opening key 1O. With the arrival of the signal from the controlled oscillator 3 to the single input of the trigger 5, the latter changes its state and the resolving potential is removed from the input of the coincidence circuit 6. Thus, the duration of the control signal at the output of the coincidence circuit 6 is equal to the time interval between the time of arrival of the signal from the matching device 1 and the time of arrival of the signal from the controlled oscillator 3. In the case when the signal from the controlled oscillator 3 (see FIG. , 3b) is ahead of the signal from matching device 1 (Fig. 3a), trigger 5 (Fig. 3g) is first tilted, and a control signal is generated at the output of the coincidence circuit 7 (Fig. A). With the appearance of the last of the signals at the zero outputs of the flip-flops 4 and 5, the coincidence circuit 8 is turned on and through the delay circuit 9 sets the flip-flops 4 and 5 to the initial state (Fig. 2, Ze). If the signal from the controlled oscillator 3 and the input signal pass to the single inputs of the flip-flops 4 and 5, respectively, at the same time, then none of the matching schemes is turned on (Fig. 4d). When changing the phase of the input signal can be two options. Option 1. The input signal from the matching device 1 advances the signal from the controlled oscillator 3. In this case, as discussed above, the coincidence circuit 6 is turned on and the control signal through the key 1O is fed to the input of the integrating amplifier 2. If the increase in the oscillator tuning voltage 3 leads to an increase in the generation frequency, then the presence of a signal at the output of the coincidence circuit 6 should lead to an increase in the voltage at the output of the integrating amplifier 2. Option 2. The signal from generator 3 is ahead of the input signal. In this case, the adjustment process proceeds as in the previous version, but the coincidence circuit 7 is turned on, key 11. In this case, the voltage at the output of the integrating amplifier 2 decreases and the frequency of the oscillator 3 becomes smaller, which leads to the restoration of the state of equilibrium - eliminating phase mismatch. So, the error sipal has a pulsed character, its area is proportional to the phase mismatch, and the error signals of different signs are formed by different blocks, which creates additional control convenience — they can be subjected to various transformations without the need to eliminate the zero drift. The invention of the synchronization device, containing a controlled oscillator, the input of which is connected to the output of the integrating amplifier, and the output - to the input of the first trigger, and a matching device, the input of which is connected to the input source, characterized in that, in order to increase the phase stability of the output signals, two keys are entered into it, the outputs of which are connected to the input of the integrating amplifier, three coincidence circuits, the second trigger, whose input is connected to the output of the matching device, and the device for the holder, the output of which is connected to the second inputs of the first and second triggers, and the input through the third matching circuit to the first outputs of both triggers, while the opposite outputs of the above triggers are connected respectively to the first and second keys to the inputs of the first and second keys. GPi Fi2. one FIG. 2 Fig.Z FIG.