SU494844A1 - Single pulse shaper - Google Patents

Description

one

The invention relates to a pulse technique, can be used to set the memory elements to their initial state and to supply one-time command signals.

Known shaper single pulses containing input and forming "/ - / C triggers, circuit" AND "AND-NOT, and a single output input trigger connected to the input" / forming trigger, and the zero output input trigger - one of the inputs of the circuit " I-NOT, the second input of which is connected with a width of control pulses, the inputs “/ and” To the input trigger and the input “D of the forming trigger are connected with each other and with the bus unit.

The known device is characterized by failures when the control pulse and trailing edges do not coincide with at least two synchronizing pulses, which occurs when the duration of the control pulse is less than two periods of synchronization pulses.

The purpose of the invention is to expand the range of durations of control pulses and increase the reliability of the response of the driver.

In the proposed driver, the output of the circuit “AND is connected to the synchronizing input of the input trigger, the output of the circuit“ AND-NOT — to one of the inputs of the circuit “AND, the second input of which is connected to the zero output of the forming trigger.

FIG. 1 is a schematic diagram of the device; FIG. 2 - diagrams explaining his work.

The shaper contains an input “/ - / C trigger 1, which forms a“ / - / C trigger 2, circuit “AND 3, circuit“ AND-HE 4, clock bus 5, bus logical unit 6, spike of control pulses 7.

The output 8 of the AND 3 circuit is connected to the synchronization input of the trigger 1, the single output 9 of which is connected to the input of the trigger 2. The zero output 10 of the trigger 2 is connected to one of the inputs of the circuit AND 4, the second input of which is connected to the bus 7 Inputs "/ and" To trigger 1 and input "To trigger 2 are connected to each other and to bus 6. Bus 5 is connected to the synchronizing input of trigger 2, unit 11 and zero 12 of which are outputs of the device. The output of the circuit "AND-NO 4 is connected to one of the inputs of the circuit" AND 3, the second input of which is connected to the output 12 of the trigger 2.

The shaper works as follows. When the power is turned on, the clock pulses are applied to the bus 5 and the logical unit signal to the bus 6, the driver is automatically reset to its original state. In this case, at the outputs 9 and 11 of the flip-flops 1 and 2, the potentials of a logical zero appear.

After supplying the control pulse to bus 7 at time ti (Fig. 2), trigger 1 changes its state, since its inputs / / and К K have a signal of a logical unit (time). At time 4, through feedback from output 10 through the "AND-NOT 4" circuit, the output at the output 8 of the "And 3" circuit receives the initial value of the logical unit. In this case, the duration of the control pulse is blocked and does not affect the further operation of the device. Upon the completion of the first synchronizing pulse 1 at the moment 4, a logic unit signal appears at the output 11 of the shaping trigger 2, since its inputs "/ and" K are given logs} of the common unit. The feedback signal from the output 12 of the flip-flop 2 transfers into the initial "zero state the flip-flop 1 (moment tg).

The next clock pulse triggers trigger 2 to the "zero state", since there is a logical zero signal at its input "/, and a logical one signal at the input" / C. Outputs 11 and 12 simultaneously remove the direct and inverse pulses. Subsequent synchronization pulses do not change the "zero state of flip-flop 2, because the input flip-flop 1 does not change its state.

The former returns to its original state.

the state at the end of the action of either the control pulse or the output pulse, as shown in FIG. 2

For reliable operation of the device, the duration of the control pulse must be sufficient to trigger the input "/ - To trigger 1. At the same time, the signal at the output of the driver appears regardless of the timing ratios of the control and clock pulses.

Claims (1)

Invention Formula A single pulse shaper containing the input and forming “/ - / C triggers, the AND and“ NAND circuits, the single output of the trigger trigger is connected to the input of the “/ forming trigger, and the zero output of the trigger input is connected to one of the 0 inputs of the circuit "AND-NOT, the second input of which is connected to the control pulse bus, the inputs" / and "K of the input trigger and the input" K. the forming trigger is connected to each other and to the bus of the logical unit, about m5 that, in order to expand the range of durations of control pulses and increase the reliability of operation, the output of the "I" circuit is connected to the synchronizing input of the input trigger, the output 0 of the circuit "AND-NOT - with one of the inputs of the circuit" AND, the second input of which is connected to the zero output of the forming trigger. OPP P P P P P