SU470810A1 - Device for detecting errors in the control equipment - Google Patents

Description

Devices are known in which the checking equipment is checked by sending and convolving parity of a previously known code with incorrect parity at certain points in time.

However, to implement this method, additional equipment is required to form an incorrect value of the check bit at the time of checking the control circuits, and the cost of additional equipment is proportional to the number of parity convolutions in the device. In addition, for checking all the control equipment of devices containing several parity convolutions (which is practically the case), considerable time is required, since in the absence of parallel access to all parity convolutions, the wrong code must be transmitted sequentially from one block to another, and to implement these transfers, it is necessary to block the control circuits of the previous stage, since usually the operation of the control circuits of any node blocks the further propagation of incorrect information and.

The aim of the invention is to reduce the testing time of the control equipment. The essence of the invention is that two triggers are introduced into the device, the zero inputs of which are connected to the second

2

The output of the control unit, the single inputs to the third output of the control unit, the zero output of the first trigger and the unit output of the second trigger are connected to the third and fourth inputs of the convolution circuit, respectively.

FIG. 1 is a block diagram of the device; in fig. 2 - four-bottom of the paraphase convolution scheme.

Pa figs. 1 The following symbols are used; operation unit 1, convolution scheme 2, comparison scheme 3, error trigger 4, control unit 5, triggers 6, 7, input buses 8, 9, tires 10, And connection of trigger 6, 7 with a convolution scheme 2, tires 12, 13 is the communication of the control unit 5 with the inputs of the flip-flops.

FIG. The 2 figures 14–19 are marked with the schemes “AND -“ OR.

Operational unit 1 is implemented with a paraphase. M (two-wire) signal generation. In addition, each signal has a "one" and "zero" component. When the signal value is 1, on the "single component signal is 1, on the" zero signal is 0. When the signal value is 0, on the "single component signal is O, and on" the zero signal is 1.

Thus, in the normal operation of the operating unit 1, the components

Signals have on tires 8 and 9 the value “10 or“ 01.

With a single error, the value of the components will be either "00 or" I.

Paraphase circuit 2 collapses the signals of the operating unit 1 into one paraphase signal.

As the three bits of the circuit shown in FIG. 2, tires 8 and 9 are used, and the fourth bit, which will be explained below, is connected to tires 10 and I.

The schemes AND-OR 14-17 are the first stage, the schemes AND-OR 18 and 19 are the second stage of the paraphase convolution scheme 2. From the diagram in FIG. 2 it can be seen that with the proper functioning of the input signals and the normal operation of the circuit elements. We will have its outputs “10 or“ 01. In the case of a single error in the input signals or a single error of the circuit elements. We will have the outputs “00 or“ I.

The comparison circuit 3 at the values of "00 or" 11 at the outputs of the convolution scheme 2 generates at the output a signal that is received into the error fixing trigger 4 associated with the control unit 5, producing the synchronizing signals necessary for the operation of the device.

To check the functioning of the control equipment, additional triggers 6 and 7 are used.

When a signal is sent to the initial state bus 12, the triggers 6 and 7 are set to "O, the signals at the additional inputs 10, 11 of the phase-wise convolution circuit 2 take the value" O and do not affect the operation of the control circuit.

In the test mode, the control unit 5 generates a signal on the test mode buses 13, which sets the trigger 1 to 1. At the same time, the inputs 10, 11 of the convolution circuit 2 take the value 00, and the comparison circuit 3 generates a fault signal, which is fixed in the trigger 4.

If in this check trigger 4 is not set to b, then this means that the control equipment is defective.

Then, the control unit sets the triggers 4, 6 to its initial state and, via the buses 13, sets to 1 trigger 7. In this case, inputs 10, 11 of convolution scheme 2 take the value 11 and comparison circuit 3 also generates a fault signal received in trigger 4 If, in this test mode, trigger 4 is not set to "1, then this also means that the control equipment is defective.

Then the control unit 5 sets in the initial state the trigger 4, generates a signal on the bus 12 of the initial state and the device switches to the normal operation mode with the control.

Additional equipment for testing control circuits in the device does not require separate checks. If it goes out of order, it will either not affect the normal operation of the device, or a failure will be detected by the control circuits. At the same time, any failure of the additional equipment occurred during the inspection of the control circuits, since the absence of a failure fixation in this mode indicates a malfunction of either the control equipment itself or additional verification circuits.

Subject invention

A device for detecting errors in the control equipment, containing an error fixing trigger, a comparison circuit, a control unit, a convolution scheme, the first and second inputs of which are connected to the device inputs of the same name, output via the comparison circuit

connected to the first input of the error latch trigger, the output of which is connected to the input of the control unit, the first output of which is connected to the output of the device and to the second input of the trigger, characterized by

that, in order to reduce the control equipment test time, two triggers were introduced into it, zero inputs of which are connected to the second output of the control unit, single inputs to the third output

the control unit, the bullet output of the first trigger and the unit output of the second trigger are connected to the third and fourth inputs of the convolution circuit, respectively.

Fig 2