SU399999A1 - DEVICE FOR DEMODULATION OF FREQUENCY-MANIPULATED SIGNALS - Google Patents

Description

one

A device for demodulating frequency-manipulated signals, comprising, its successively connected filter, driver, and shift register with a clock pulse generator, is known.

The purpose of the invention is to improve noise immunity.

This is achieved by introducing a inhibit cascade, one input of which is connected to the output of the shift register, the second through the addition cascade to all taps of the shift register, and the output of the input ban cascade is connected to the additional input of the addition cascade.

The drawing shows a functional diagram of the proposed device.

The device consists of a low-pass filter 1, a driver 2, a shift register 3, a clock pulse generator 4, matching stages 5 and 6, counters 7 and 8, a ban stage 9, and addition stages 10 and 11.

The signal coming from the communication channel, together with the noise, is fed to the input of the low-pass filter 1. The signal from the filter output is fed to a driver 2, which converts a sinusoidal signal into a sequence of pulses following the same repetition frequency, with the duty cycle of the incoming pulses being at least a hundred.

For each positive half-wave, a unit is recorded in the shift register 3, and by the time the next unit arrives, the previous one is advanced by generator pulses

clock pulses up to a certain cascade shift register. The number of stages is chosen so that for one period of the highest received frequency, the pulses simultaneously arrive at two inputs of the stage 5 coincidence,

and at the lowest received frequency, the pulses arrived only at the inputs of the cascade 6 coincidence. Thus, the pulses arrive at the counter 7 or 8, depending on the received frequency. These counters are set

in the initial position by an automatic reset unit consisting of a prohibition stage 9 and a stage addition stage 10. The prohibition stage 9 outputs a pulse in the event that not a single unit is recorded in it after the pulse leaves the shift register 3, i.e. there is no signal at the output of the addition stage 11. The scheme of the cascade 10 addition receives pulses from the cascade 9 of the ban and all the outputs of the counters. Thus, in the absence of a signal

is reset whenever the time interval between pulses formed by noise exceeds the delay time of the shift register. If a signal is present, the reset will be reset only after receiving it.

Prev Invention

A device for demodulating frequency-controlled signals containing a filter connected in series, a driver and a shift register with a clock generator, some taps of the shift register connected in pairs to coincidence cascades whose outputs are connected to counters whose outputs, being the outputs of the device, are connected to the reset inputs of the mentioned counters, characterized in that, in order to improve the noise immunity, a prohibition cascade is introduced, one input of which is connected to the output of said register with Whig, through second stage adding ko all taps of the shift register and the output of the entered prohibition cascade connected to an additional input of adding stage.