SU1829782A1 - Mis transistor manufacturing process - Google Patents
Mis transistor manufacturing processInfo
- Publication number
- SU1829782A1 SU1829782A1 SU4949393/25A SU4949393A SU1829782A1 SU 1829782 A1 SU1829782 A1 SU 1829782A1 SU 4949393/25 A SU4949393/25 A SU 4949393/25A SU 4949393 A SU4949393 A SU 4949393A SU 1829782 A1 SU1829782 A1 SU 1829782A1
- Authority
- SU
- USSR - Soviet Union
- Prior art keywords
- dope
- conductivity
- mis transistor
- regions
- type
- Prior art date
Links
Landscapes
- Element Separation (AREA)
Abstract
FIELD: microelectronics; production of MIS highly integrated circuits. SUBSTANCE: gate with vertical walls is formed on surface of silicon semiconductor plate of first type of conductivity, nondoped silicon dioxide layer is applied to stepped-profile surface, layer applied is removed by anisotropic plasma etching to create wall dielectric regions, slowly diffusing and then quickly diffusing dope of second type of conductivity are introduced in turn by ion implanting on either side of wall regions into plate, highly doped and lightly-doped source-drain regions are produced by annealing introduced dope. EFFECT: improved yield and speed of MIS transistor due to reduced capacity. 2 dwg, 1 tbl
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SU4949393/25A SU1829782A1 (en) | 1991-06-26 | 1991-06-26 | Mis transistor manufacturing process |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SU4949393/25A SU1829782A1 (en) | 1991-06-26 | 1991-06-26 | Mis transistor manufacturing process |
Publications (1)
Publication Number | Publication Date |
---|---|
SU1829782A1 true SU1829782A1 (en) | 1996-10-10 |
Family
ID=60541340
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SU4949393/25A SU1829782A1 (en) | 1991-06-26 | 1991-06-26 | Mis transistor manufacturing process |
Country Status (1)
Country | Link |
---|---|
SU (1) | SU1829782A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
RU2710005C1 (en) * | 2019-04-26 | 2019-12-23 | Акционерное общество "ОКБ-Планета" АО "ОКБ-Планета" | Method of mounting semiconductor chips in a housing |
-
1991
- 1991-06-26 SU SU4949393/25A patent/SU1829782A1/en active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
RU2710005C1 (en) * | 2019-04-26 | 2019-12-23 | Акционерное общество "ОКБ-Планета" АО "ОКБ-Планета" | Method of mounting semiconductor chips in a housing |
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