SU1814445A1 - Method for manufacturing semiconductor structures with stepped shape of polycrystalline silicon islands - Google Patents
Method for manufacturing semiconductor structures with stepped shape of polycrystalline silicon islandsInfo
- Publication number
- SU1814445A1 SU1814445A1 SU4868794/25A SU4868794A SU1814445A1 SU 1814445 A1 SU1814445 A1 SU 1814445A1 SU 4868794/25 A SU4868794/25 A SU 4868794/25A SU 4868794 A SU4868794 A SU 4868794A SU 1814445 A1 SU1814445 A1 SU 1814445A1
- Authority
- SU
- USSR - Soviet Union
- Prior art keywords
- polycrystalline silicon
- layer
- thickness
- component interconnection
- semiconductor structures
- Prior art date
Links
Landscapes
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
FIELD: microelectronics; LSIC and VISIC manufacturing process. SUBSTANCE: in forming semiconductor structures with stepped shape of polycrystalline silicon islands, photoresists mask is etched selectively with respect to polycrystalline silicon layer and mask configuration is varied by forming step relative to edge of polycrystalline silicon island; step width, depth of blind (surface) anisotropic etching of polycrystalline silicon, thickness of component interconnection layer, and thickness of polycrystalline silicon layer are interrelated by expression h-h+h<X<h-h, where his thickness of polycrystalline silicon layer; x is width of photoresist mask step relative to edge of polycrystalline silicon island or depth of blind anisotropic etching of polycrystalline silicon layer; his thickness of component interconnection layer; his minimal permissible thickness of continuous layer of component interconnection. EFFECT: improved reproducibility of linear dimensions of polycrystalline silicon islands and reduced break probability in component interconnection layer. 5 dwg
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SU4868794/25A SU1814445A1 (en) | 1990-09-26 | 1990-09-26 | Method for manufacturing semiconductor structures with stepped shape of polycrystalline silicon islands |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SU4868794/25A SU1814445A1 (en) | 1990-09-26 | 1990-09-26 | Method for manufacturing semiconductor structures with stepped shape of polycrystalline silicon islands |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SU1814445A1 true SU1814445A1 (en) | 1996-09-10 |
Family
ID=60538279
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SU4868794/25A SU1814445A1 (en) | 1990-09-26 | 1990-09-26 | Method for manufacturing semiconductor structures with stepped shape of polycrystalline silicon islands |
Country Status (1)
| Country | Link |
|---|---|
| SU (1) | SU1814445A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2593633C1 (en) * | 2015-05-14 | 2016-08-10 | Федеральное государственное автономное образовательное учреждение высшего образования "Дальневосточный федеральный университет" | Method of forming ordered structures on surface of semiconductor substrates |
| CN116364827A (en) * | 2023-05-29 | 2023-06-30 | 江西兆驰半导体有限公司 | Mini LED and preparation method thereof |
-
1990
- 1990-09-26 SU SU4868794/25A patent/SU1814445A1/en active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2593633C1 (en) * | 2015-05-14 | 2016-08-10 | Федеральное государственное автономное образовательное учреждение высшего образования "Дальневосточный федеральный университет" | Method of forming ordered structures on surface of semiconductor substrates |
| CN116364827A (en) * | 2023-05-29 | 2023-06-30 | 江西兆驰半导体有限公司 | Mini LED and preparation method thereof |
| CN116364827B (en) * | 2023-05-29 | 2023-08-29 | 江西兆驰半导体有限公司 | Mini LED and preparation method thereof |
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